]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
wifi: rtw89: define TX/RX aggregation and MPDU capability per chip
authorKuan-Chung Chen <damon.chen@realtek.com>
Mon, 29 Dec 2025 03:09:19 +0000 (11:09 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Wed, 31 Dec 2025 08:18:55 +0000 (16:18 +0800)
Since TX/RX aggregation is different from chip to chip, define individual
number according to hardware ability. Also the coming chip RTL8922DE
can get expected performance.

Signed-off-by: Kuan-Chung Chen <damon.chen@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20251229030926.27004-6-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.c
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/rtw8851b.c
drivers/net/wireless/realtek/rtw89/rtw8852a.c
drivers/net/wireless/realtek/rtw89/rtw8852b.c
drivers/net/wireless/realtek/rtw89/rtw8852bt.c
drivers/net/wireless/realtek/rtw89/rtw8852c.c
drivers/net/wireless/realtek/rtw89/rtw8922a.c

index d07dc97e22d4cc50d1da1353a2fa5463b6612e3a..51aa3d0eb2ef8944beefc48dd6c4acd17d55729e 100644 (file)
@@ -5086,7 +5086,7 @@ static void rtw89_init_vht_cap(struct rtw89_dev *rtwdev,
        }
 
        vht_cap->vht_supported = true;
-       vht_cap->cap = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454 |
+       vht_cap->cap = chip->max_vht_mpdu_cap |
                       IEEE80211_VHT_CAP_SHORT_GI_80 |
                       IEEE80211_VHT_CAP_RXSTBC_1 |
                       IEEE80211_VHT_CAP_HTC_VHT |
@@ -5214,7 +5214,7 @@ static void rtw89_init_he_cap(struct rtw89_dev *rtwdev,
                                        IEEE80211_HE_6GHZ_CAP_MIN_MPDU_START) |
                       le16_encode_bits(IEEE80211_VHT_MAX_AMPDU_1024K,
                                        IEEE80211_HE_6GHZ_CAP_MAX_AMPDU_LEN_EXP) |
-                      le16_encode_bits(IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
+                      le16_encode_bits(chip->max_vht_mpdu_cap,
                                        IEEE80211_HE_6GHZ_CAP_MAX_MPDU_LEN);
                iftype_data->he_6ghz_capa.capa = capa;
        }
@@ -5252,7 +5252,7 @@ static void rtw89_init_eht_cap(struct rtw89_dev *rtwdev,
        eht_cap->has_eht = true;
 
        eht_cap_elem->mac_cap_info[0] =
-               u8_encode_bits(IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_7991,
+               u8_encode_bits(chip->max_eht_mpdu_cap,
                               IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_MASK);
        eht_cap_elem->mac_cap_info[1] = 0;
 
@@ -6399,8 +6399,8 @@ static int rtw89_core_register_hw(struct rtw89_dev *rtwdev)
 
        hw->extra_tx_headroom = tx_headroom;
        hw->queues = IEEE80211_NUM_ACS;
-       hw->max_rx_aggregation_subframes = RTW89_MAX_RX_AGG_NUM;
-       hw->max_tx_aggregation_subframes = RTW89_MAX_TX_AGG_NUM;
+       hw->max_rx_aggregation_subframes = chip->max_rx_agg_num;
+       hw->max_tx_aggregation_subframes = chip->max_tx_agg_num;
        hw->uapsd_max_sp_len = IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL;
 
        hw->radiotap_mcs_details |= IEEE80211_RADIOTAP_MCS_HAVE_FEC |
index 5b4f998e19788384e139840e5682d542dbf24ae0..8f9c49d2ec5b957fecc425985c9ead1c50f9457d 100644 (file)
@@ -3407,9 +3407,6 @@ struct rtw89_ra_info {
 #define RTW89_PPDU_MAC_RX_CNT_SIZE 96
 #define RTW89_PPDU_MAC_RX_CNT_SIZE_V1 128
 
-#define RTW89_MAX_RX_AGG_NUM 64
-#define RTW89_MAX_TX_AGG_NUM 128
-
 struct rtw89_ampdu_params {
        u16 agg_num;
        bool amsdu;
@@ -4429,6 +4426,10 @@ struct rtw89_chip_info {
        bool small_fifo_size;
        u32 dle_scc_rsvd_size;
        u16 max_amsdu_limit;
+       u16 max_vht_mpdu_cap;
+       u16 max_eht_mpdu_cap;
+       u16 max_tx_agg_num;
+       u16 max_rx_agg_num;
        bool dis_2g_40m_ul_ofdma;
        u32 rsvd_ple_ofst;
        const struct rtw89_hfc_param_ini *hfc_param_ini[RTW89_HCI_TYPE_NUM];
index 97254fe638d19800007feae33ce78515671fef5e..7e97220b723a2daecf13cabb7330130e62b67f05 100644 (file)
@@ -2591,6 +2591,10 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
        .small_fifo_size        = true,
        .dle_scc_rsvd_size      = 98304,
        .max_amsdu_limit        = 3500,
+       .max_vht_mpdu_cap       = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
+       .max_eht_mpdu_cap       = 0,
+       .max_tx_agg_num         = 128,
+       .max_rx_agg_num         = 64,
        .dis_2g_40m_ul_ofdma    = true,
        .rsvd_ple_ofst          = 0x2f800,
        .hfc_param_ini          = {rtw8851b_hfc_param_ini_pcie,
index f44ea4cd4c9ee62fb10c78708081b104ea80be48..58e041016c26923bcffc985da706740c330755dd 100644 (file)
@@ -2276,6 +2276,10 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
        .small_fifo_size        = false,
        .dle_scc_rsvd_size      = 0,
        .max_amsdu_limit        = 3500,
+       .max_vht_mpdu_cap       = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
+       .max_eht_mpdu_cap       = 0,
+       .max_tx_agg_num         = 128,
+       .max_rx_agg_num         = 64,
        .dis_2g_40m_ul_ofdma    = true,
        .rsvd_ple_ofst          = 0x6f800,
        .hfc_param_ini          = {rtw8852a_hfc_param_ini_pcie,
index b1ea0a6e38c289570661b8ebfebde99dda06d987..f813ec9242eb4f156b084333506dc2ba28453ca8 100644 (file)
@@ -900,6 +900,10 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
        .small_fifo_size        = true,
        .dle_scc_rsvd_size      = 98304,
        .max_amsdu_limit        = 5000,
+       .max_vht_mpdu_cap       = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
+       .max_eht_mpdu_cap       = 0,
+       .max_tx_agg_num         = 128,
+       .max_rx_agg_num         = 64,
        .dis_2g_40m_ul_ofdma    = true,
        .rsvd_ple_ofst          = 0x2f800,
        .hfc_param_ini          = {rtw8852b_hfc_param_ini_pcie,
index 362d92d86aa1c205f3ec2a66ef03827c866edc17..534ac137b43fb72fd10b8aebc700246872e47b42 100644 (file)
@@ -766,6 +766,10 @@ const struct rtw89_chip_info rtw8852bt_chip_info = {
        .small_fifo_size        = true,
        .dle_scc_rsvd_size      = 98304,
        .max_amsdu_limit        = 5000,
+       .max_vht_mpdu_cap       = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
+       .max_eht_mpdu_cap       = 0,
+       .max_tx_agg_num         = 128,
+       .max_rx_agg_num         = 64,
        .dis_2g_40m_ul_ofdma    = true,
        .rsvd_ple_ofst          = 0x6f800,
        .hfc_param_ini          = {rtw8852bt_hfc_param_ini_pcie, NULL, NULL},
index bc31f563ad938775f26e2168dce8187de81baa4b..2110c714394dd3bf373d0069e979ae4e3b717d24 100644 (file)
@@ -3117,6 +3117,10 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
        .small_fifo_size        = false,
        .dle_scc_rsvd_size      = 0,
        .max_amsdu_limit        = 8000,
+       .max_vht_mpdu_cap       = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
+       .max_eht_mpdu_cap       = 0,
+       .max_tx_agg_num         = 128,
+       .max_rx_agg_num         = 64,
        .dis_2g_40m_ul_ofdma    = false,
        .rsvd_ple_ofst          = 0x6f800,
        .hfc_param_ini          = {rtw8852c_hfc_param_ini_pcie,
index cfd42b0145d3c2fe4a80470b3cb9f1cd28a65d25..0383c3bd60dd126ce1b6b4d609bbe2cf36ac4928 100644 (file)
@@ -2890,6 +2890,10 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
        .small_fifo_size        = false,
        .dle_scc_rsvd_size      = 0,
        .max_amsdu_limit        = 8000,
+       .max_vht_mpdu_cap       = IEEE80211_VHT_CAP_MAX_MPDU_LENGTH_11454,
+       .max_eht_mpdu_cap       = IEEE80211_EHT_MAC_CAP0_MAX_MPDU_LEN_7991,
+       .max_tx_agg_num         = 128,
+       .max_rx_agg_num         = 64,
        .dis_2g_40m_ul_ofdma    = false,
        .rsvd_ple_ofst          = 0x8f800,
        .hfc_param_ini          = {rtw8922a_hfc_param_ini_pcie, NULL, NULL},