iommu/vt-d: Remove LPIG from page group response descriptor

[ Upstream commit 4402e8f39d0bfff5c0a5edb5e1afe27a56545e11 ]

Bit 66 in the page group response descriptor used to be the LPIG (Last
Page in Group), but it was marked as Reserved since Specification 4.0.
Remove programming on this bit to make it consistent with the latest
specification.

Existing hardware all treats bit 66 of the page group response descriptor
as "ignored", therefore this change doesn't break any existing hardware.

Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>
Link: https://lore.kernel.org/r/20250901053943.1708490-1-baolu.lu@linux.intel.com
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/iommu/intel/iommu.h b/drivers/iommu/intel/iommu.h
index 2c261c069001c53e793c1f5c8c7131e829aa24c8..21b2c3f85ddc5810ee915cdf08fd18ae705f9a57 100644 (file)
--- a/drivers/iommu/intel/iommu.h
+++ b/drivers/iommu/intel/iommu.h
@@ -462,7 +462,6 @@ enum {
 #define QI_PGRP_PASID(pasid)   (((u64)(pasid)) << 32)
 
 /* Page group response descriptor QW1 */
-#define QI_PGRP_LPIG(x)                (((u64)(x)) << 2)
 #define QI_PGRP_IDX(idx)       (((u64)(idx)) << 3)
 
 

diff --git a/drivers/iommu/intel/prq.c b/drivers/iommu/intel/prq.c
index 52570e42a14c05b7492957909568805dc9c7b6ef..ff63c228e6e19d9a01be6f9eac307957d846dd6f 100644 (file)
--- a/drivers/iommu/intel/prq.c
+++ b/drivers/iommu/intel/prq.c
@@ -151,8 +151,7 @@ static void handle_bad_prq_event(struct intel_iommu *iommu,
                        QI_PGRP_PASID_P(req->pasid_present) |
                        QI_PGRP_RESP_CODE(result) |
                        QI_PGRP_RESP_TYPE;
-       desc.qw1 = QI_PGRP_IDX(req->prg_index) |
-                       QI_PGRP_LPIG(req->lpig);
+       desc.qw1 = QI_PGRP_IDX(req->prg_index);
 
        qi_submit_sync(iommu, &desc, 1, 0);
 }
@@ -379,19 +378,17 @@ void intel_iommu_page_response(struct device *dev, struct iopf_fault *evt,
        struct iommu_fault_page_request *prm;
        struct qi_desc desc;
        bool pasid_present;
-       bool last_page;
        u16 sid;
 
        prm = &evt->fault.prm;
        sid = PCI_DEVID(bus, devfn);
        pasid_present = prm->flags & IOMMU_FAULT_PAGE_REQUEST_PASID_VALID;
-       last_page = prm->flags & IOMMU_FAULT_PAGE_REQUEST_LAST_PAGE;
 
        desc.qw0 = QI_PGRP_PASID(prm->pasid) | QI_PGRP_DID(sid) |
                        QI_PGRP_PASID_P(pasid_present) |
                        QI_PGRP_RESP_CODE(msg->code) |
                        QI_PGRP_RESP_TYPE;
-       desc.qw1 = QI_PGRP_IDX(prm->grpid) | QI_PGRP_LPIG(last_page);
+       desc.qw1 = QI_PGRP_IDX(prm->grpid);
        desc.qw2 = 0;
        desc.qw3 = 0;