bus-range = <0x10 0x1f>;
clocks = <&cru ACLK_PCIE30X1_MST>, <&cru ACLK_PCIE30X1_SLV>,
<&cru ACLK_PCIE30X1_DBI>, <&cru PCLK_PCIE30X1>,
- <&cru CLK_PCIE30X1_AUX_NDFT>;
+ <&cru CLK_PCIE30X1_AUX_NDFT>,
+ <&cru CLK_PCIE30X1_PIPE_DFT>;
clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk", "aux";
+ "aclk_dbi", "pclk", "aux",
+ "pipe";
device_type = "pci";
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
bus-range = <0x20 0x2f>;
clocks = <&cru ACLK_PCIE30X2_MST>, <&cru ACLK_PCIE30X2_SLV>,
<&cru ACLK_PCIE30X2_DBI>, <&cru PCLK_PCIE30X2>,
- <&cru CLK_PCIE30X2_AUX_NDFT>;
+ <&cru CLK_PCIE30X2_AUX_NDFT>,
+ <&cru CLK_PCIE30X2_PIPE_DFT>;
clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk", "aux";
+ "aclk_dbi", "pclk", "aux",
+ "pipe";
device_type = "pci";
interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
bus-range = <0x0 0xf>;
clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
<&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>,
- <&cru CLK_PCIE20_AUX_NDFT>;
+ <&cru CLK_PCIE20_AUX_NDFT>,
+ <&cru CLK_PCIE20_PIPE_DFT>;
clock-names = "aclk_mst", "aclk_slv",
- "aclk_dbi", "pclk", "aux";
+ "aclk_dbi", "pclk", "aux",
+ "pipe";
device_type = "pci";
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 7>;