arm64: dts: imx8mm-phygate-tauri-l: Update pad ctl for USB OC pin

Disable Hysteresis Enable Field in pad ctl register for USB OC pin
as this is more appropriate for the signal form in our case.

Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
index 755cf9cacd227403f1bd2c2822b5920b1830618f..2ecc8b3c67dabd11261cb64b4a4f88482dfcc26e 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-phygate-tauri-l.dts
@@ -452,7 +452,7 @@
 
        pinctrl_usbotg1: usbotg1grp {
                fsl,pins = <
-                       MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC     0x80
+                       MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC     0x00
                >;
        };