]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
drm/amdgpu/hdp4: use memcfg register to post the write for HDP flush
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 30 Apr 2025 16:45:04 +0000 (12:45 -0400)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sun, 18 May 2025 06:24:07 +0000 (08:24 +0200)
commit f690e3974755a650259a45d71456decc9c96a282 upstream.

Reading back the remapped HDP flush register seems to cause
problems on some platforms. All we need is a read, so read back
the memcfg register.

Fixes: c9b8dcabb52a ("drm/amdgpu/hdp4.0: do a posting read when flushing HDP")
Reported-by: Alexey Klimov <alexey.klimov@linaro.org>
Link: https://lists.freedesktop.org/archives/amd-gfx/2025-April/123150.html
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4119
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3908
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
(cherry picked from commit 5c937b4a6050316af37ef214825b6340b5e9e391)
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/amd/amdgpu/hdp_v4_0.c

index 30210613dc5c47a65ae75a0988b050dcd87e19b4..2f3054ed7b1b5be090e0eaf8048d1c11d9ea9756 100644 (file)
@@ -42,7 +42,12 @@ static void hdp_v4_0_flush_hdp(struct amdgpu_device *adev,
 {
        if (!ring || !ring->funcs->emit_wreg) {
                WREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
-               RREG32((adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2);
+               /* We just need to read back a register to post the write.
+                * Reading back the remapped register causes problems on
+                * some platforms so just read back the memory size register.
+                */
+               if (adev->nbio.funcs->get_memsize)
+                       adev->nbio.funcs->get_memsize(adev);
        } else {
                amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> 2, 0);
        }