/** Hypervisor is present */
#define CPUID_FEATURES_INTEL_ECX_HYPERVISOR 0x80000000UL
+/** TSC is present */
+#define CPUID_FEATURES_INTEL_EDX_TSC 0x00000010UL
+
/** FXSAVE and FXRSTOR are supported */
#define CPUID_FEATURES_INTEL_EDX_FXSR 0x01000000UL
#include <biosint.h>
#include <pic8259.h>
#include <rtc.h>
+#include <ipxe/cpuid.h>
#include <ipxe/entropy.h>
/** Maximum time to wait for an RTC interrupt, in milliseconds */
* @ret rc Return status code
*/
static int rtc_entropy_enable ( void ) {
+ struct x86_features features;
int rc;
+ /* Check that TSC is supported */
+ x86_features ( &features );
+ if ( ! ( features.intel.edx & CPUID_FEATURES_INTEL_EDX_TSC ) ) {
+ DBGC ( &rtc_flag, "RTC has no TSC\n" );
+ rc = -ENOTSUP;
+ goto err_no_tsc;
+ }
+
/* Hook ISR and enable RTC interrupts */
rtc_hook_isr();
enable_irq ( RTC_IRQ );
rtc_disable_int();
disable_irq ( RTC_IRQ );
rtc_unhook_isr();
+ err_no_tsc:
return rc;
}