wifi: ath12k: parse and save hardware mode info from WMI_SERVICE_READY_EXT_EVENTID...

WLAN hardware might support various hardware modes such as DBS (dual
band simultaneously), SBS (single band simultaneously) and DBS_OR_SBS
etc, see enum wmi_host_hw_mode_config_type. Firmware advertises actual
supported modes in WMI_SERVICE_READY_EXT_EVENTID event. For each mode,
firmware advertises frequency range each hardware MAC can operate on.
In MLO case such information is necessary during vdev activation and
link selection (which is done in following patches), so add a new
structure ath12k_svc_ext_info to ath12k_wmi_base, then parse and save
those information to it for later use.

Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c5-00284-QCAHMTSWPL_V1.0_V2.0_SILICONZ-1
Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.4.1-00199-QCAHKSWPL_SILICONZ-1

Signed-off-by: Baochen Qiang <quic_bqiang@quicinc.com>
Reviewed-by: Vasanthakumar Thiagarajan <vasanthakumar.thiagarajan@oss.qualcomm.com>
Link: https://patch.msgid.link/20250522-ath12k-sbs-dbs-v1-1-54a29e7a3a88@quicinc.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>

diff --git a/drivers/net/wireless/ath/ath12k/wmi.c b/drivers/net/wireless/ath/ath12k/wmi.c
index 2d2444417e2b2d9281754d113f2b073034e27739..edb38fbb4ed4e6b1ae9413bce5f0df1d950f3a19 100644 (file)
--- a/drivers/net/wireless/ath/ath12k/wmi.c
+++ b/drivers/net/wireless/ath/ath12k/wmi.c
@@ -4395,6 +4395,7 @@ static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc,
 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
                                   u16 len, const void *ptr, void *data)
 {
+       struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info;
        struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data;
        const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps;
        enum wmi_host_hw_mode_config_type mode, pref;
@@ -4427,8 +4428,11 @@ static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc,
                }
        }
 
-       ath12k_dbg(soc, ATH12K_DBG_WMI, "preferred_hw_mode:%d\n",
-                  soc->wmi_ab.preferred_hw_mode);
+       svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps;
+
+       ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n",
+                  svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode);
+
        if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX)
                return -EINVAL;
 
@@ -4658,6 +4662,65 @@ free_dir_buff:
        return ret;
 }
 
+static void
+ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab,
+                            const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap,
+                            struct ath12k_svc_ext_mac_phy_info *mac_phy_info)
+{
+       mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id);
+       mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands);
+       mac_phy_info->hw_freq_range.low_2ghz_freq =
+                                       __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq);
+       mac_phy_info->hw_freq_range.high_2ghz_freq =
+                                       __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq);
+       mac_phy_info->hw_freq_range.low_5ghz_freq =
+                                       __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq);
+       mac_phy_info->hw_freq_range.high_5ghz_freq =
+                                       __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq);
+}
+
+static void
+ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab,
+                                struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext)
+{
+       struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info;
+       const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap;
+       const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap;
+       struct ath12k_svc_ext_mac_phy_info *mac_phy_info;
+       u32 hw_mode_id, phy_bit_map;
+       u8 hw_idx;
+
+       mac_phy_info = &svc_ext_info->mac_phy_info[0];
+       mac_phy_cap = svc_rdy_ext->mac_phy_caps;
+
+       for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) {
+               hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx];
+               hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id);
+               phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map);
+
+               while (phy_bit_map) {
+                       ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info);
+                       mac_phy_info->hw_mode_config_type =
+                                       le32_get_bits(hw_mode_cap->hw_mode_config_type,
+                                                     WMI_HW_MODE_CAP_CFG_TYPE);
+                       ath12k_dbg(ab, ATH12K_DBG_WMI,
+                                  "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n",
+                                  hw_idx, hw_mode_id,
+                                  mac_phy_info->hw_mode_config_type,
+                                  mac_phy_info->supported_bands, mac_phy_info->phy_id,
+                                  mac_phy_info->hw_freq_range.low_2ghz_freq,
+                                  mac_phy_info->hw_freq_range.high_2ghz_freq,
+                                  mac_phy_info->hw_freq_range.low_5ghz_freq,
+                                  mac_phy_info->hw_freq_range.high_5ghz_freq);
+
+                       mac_phy_cap++;
+                       mac_phy_info++;
+
+                       phy_bit_map >>= 1;
+               }
+       }
+}
+
 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
                                        u16 tag, u16 len,
                                        const void *ptr, void *data)
@@ -4706,6 +4769,8 @@ static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab,
                                return ret;
                        }
 
+                       ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext);
+
                        svc_rdy_ext->mac_phy_done = true;
                } else if (!svc_rdy_ext->ext_hal_reg_done) {
                        ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext);

diff --git a/drivers/net/wireless/ath/ath12k/wmi.h b/drivers/net/wireless/ath/ath12k/wmi.h
index ac18f75e04492b62594acb159e3b43b81bd6c392..96c31b7820ec14ec8df2fa0d060da6d257d7a083 100644 (file)
--- a/drivers/net/wireless/ath/ath12k/wmi.h
+++ b/drivers/net/wireless/ath/ath12k/wmi.h
@@ -2617,6 +2617,8 @@ struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params {
        __le32 num_chainmask_tables;
 } __packed;
 
+#define WMI_HW_MODE_CAP_CFG_TYPE       GENMASK(27, 0)
+
 struct ath12k_wmi_hw_mode_cap_params {
        __le32 tlv_header;
        __le32 hw_mode_id;
@@ -2666,6 +2668,12 @@ struct ath12k_wmi_mac_phy_caps_params {
        __le32 he_cap_info_2g_ext;
        __le32 he_cap_info_5g_ext;
        __le32 he_cap_info_internal;
+       __le32 wireless_modes;
+       __le32 low_2ghz_chan_freq;
+       __le32 high_2ghz_chan_freq;
+       __le32 low_5ghz_chan_freq;
+       __le32 high_5ghz_chan_freq;
+       __le32 nss_ratio;
 } __packed;
 
 struct ath12k_wmi_hal_reg_caps_ext_params {
@@ -5049,6 +5057,27 @@ struct ath12k_wmi_pdev {
        u32 rx_decap_mode;
 };
 
+struct ath12k_hw_mode_freq_range_arg {
+       u32 low_2ghz_freq;
+       u32 high_2ghz_freq;
+       u32 low_5ghz_freq;
+       u32 high_5ghz_freq;
+};
+
+struct ath12k_svc_ext_mac_phy_info {
+       enum wmi_host_hw_mode_config_type hw_mode_config_type;
+       u32 phy_id;
+       u32 supported_bands;
+       struct ath12k_hw_mode_freq_range_arg hw_freq_range;
+};
+
+#define ATH12K_MAX_MAC_PHY_CAP 8
+
+struct ath12k_svc_ext_info {
+       u32 num_hw_modes;
+       struct ath12k_svc_ext_mac_phy_info mac_phy_info[ATH12K_MAX_MAC_PHY_CAP];
+};
+
 struct ath12k_wmi_base {
        struct ath12k_base *ab;
        struct ath12k_wmi_pdev wmi[MAX_RADIOS];
@@ -5066,6 +5095,8 @@ struct ath12k_wmi_base {
        enum wmi_host_hw_mode_config_type preferred_hw_mode;
 
        struct ath12k_wmi_target_cap_arg *targ_cap;
+
+       struct ath12k_svc_ext_info svc_ext_info;
 };
 
 struct wmi_pdev_set_bios_interface_cmd {