drm/amd/pm: Add message control for SMUv12

Initialize smu message control in SMUv12 SOCs.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h
index 0886d8cffbd0a649e3ac221f2e4af05c3917a7ef..fd3937b086621f3c3d305fa449de16b3c8434614 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h
@@ -62,5 +62,8 @@ int smu_v12_0_set_driver_table_location(struct smu_context *smu);
 
 int smu_v12_0_get_vbios_bootup_values(struct smu_context *smu);
 
+void smu_v12_0_init_msg_ctl(struct smu_context *smu,
+                           const struct cmn2asic_msg_mapping *message_map);
+
 #endif
 #endif

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
index c72ddef3fce5f75c142f9eb2ff93d2b5af9d8068..7e41991f140e4b7cf5280d3e32823689ecd71837 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/renoir_ppt.c
@@ -1507,4 +1507,5 @@ void renoir_set_ppt_funcs(struct smu_context *smu)
        smu->param_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
        smu->msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
        smu->resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
+       smu_v12_0_init_msg_ctl(smu, renoir_message_map);
 }

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
index 942bc3b0f700de01962b968f815d4535474dd44e..2c20624caca450f35d2f0153e8d23484a669f95d 100644 (file)
--- a/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu12/smu_v12_0.c
@@ -405,3 +405,20 @@ int smu_v12_0_get_vbios_bootup_values(struct smu_context *smu)
 
        return 0;
 }
+
+void smu_v12_0_init_msg_ctl(struct smu_context *smu,
+                           const struct cmn2asic_msg_mapping *message_map)
+{
+       struct amdgpu_device *adev = smu->adev;
+       struct smu_msg_ctl *ctl = &smu->msg_ctl;
+
+       ctl->smu = smu;
+       mutex_init(&ctl->lock);
+       ctl->config.msg_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_66);
+       ctl->config.resp_reg = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_90);
+       ctl->config.arg_regs[0] = SOC15_REG_OFFSET(MP1, 0, mmMP1_SMN_C2PMSG_82);
+       ctl->config.num_arg_regs = 1;
+       ctl->ops = &smu_msg_v1_ops;
+       ctl->default_timeout = adev->usec_timeout * 20;
+       ctl->message_map = message_map;
+}