]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: rockchip: Enable mipi dsi on rk3568-evb1-v10
authorAndy Yan <andy.yan@rock-chips.com>
Sun, 6 Jul 2025 11:38:24 +0000 (19:38 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 10 Jul 2025 08:55:19 +0000 (10:55 +0200)
Enable the w552793baa 1080x1920 dsi panel on rk3568 evb1.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Link: https://lore.kernel.org/r/20250706113831.330799-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
arch/arm64/boot/dts/rockchip/rk3568-evb1-v10.dts

index b073a4d03e4fbc27e9c59d779c4c5f35ee2dd182..b01f952b640ed1a2c72a3653a3681267dee0f7e0 100644 (file)
                mmc1 = &sdhci;
        };
 
+       backlight: backlight {
+               compatible = "pwm-backlight";
+               brightness-levels = <20 220>;
+               default-brightness-level = <100>;
+               num-interpolated-steps = <200>;
+               power-supply = <&vcc3v3_sys>;
+               pwms = <&pwm4 0 25000 0>;
+       };
+
        chosen: chosen {
                stdout-path = "serial2:1500000n8";
        };
        cpu-supply = <&vdd_cpu>;
 };
 
+&dsi0 {
+       clock-master;
+       #address-cells = <1>;
+       #size-cells = <0>;
+       status = "okay";
+
+       panel@0 {
+               compatible = "wanchanglong,w552793baa", "raydium,rm67200";
+               reg = <0>;
+               backlight = <&backlight>;
+               iovcc-supply = <&vcc3v3_lcd0_n>;
+               reset-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>;
+               vdd-supply = <&vcc3v3_lcd0_n>;
+               vsn-supply = <&vcc5v0_sys>;
+               vsp-supply = <&vcc5v0_sys>;
+
+               port {
+                       panel_in_dsi: endpoint {
+                               remote-endpoint = <&dsi0_out_panel>;
+                       };
+               };
+       };
+
+};
+
+&dsi0_in {
+       dsi0_in_vp1: endpoint {
+               remote-endpoint = <&vp1_out_dsi0>;
+       };
+};
+
+&dsi0_out {
+       dsi0_out_panel: endpoint {
+               remote-endpoint = <&panel_in_dsi>;
+       };
+};
+
+&dsi_dphy0 {
+       status = "okay";
+};
+
 &gmac0 {
        assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
        assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
        status = "okay";
 };
 
+&pwm4 {
+       status = "okay";
+};
+
 &saradc {
        vref-supply = <&vcca_1v8>;
        status = "okay";
 };
 
 &vop {
-       assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
-       assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
+       assigned-clocks = <&cru DCLK_VOP0>, <&cru PLL_VPLL>, <&cru DCLK_VOP1>;
+       assigned-clock-parents = <&pmucru PLL_HPLL>, <&xin24m>, <&cru PLL_VPLL>;
+       assigned-clock-rates = <0>, <132000000>, <132000000>;
        status = "okay";
 };
 
                remote-endpoint = <&hdmi_in_vp0>;
        };
 };
+
+&vp1 {
+       vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 {
+               reg = <ROCKCHIP_VOP2_EP_MIPI0>;
+               remote-endpoint = <&dsi0_in_vp1>;
+       };
+};