soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset

Add the RK3588_SYSGRF_SOC_CON6 register offset to the RK3588 GRF
header. This register contains the I2S MCLK output to IO gate bits,
needed by the clock driver.

Signed-off-by: Daniele Briguglio <hello@superkali.me>
Reviewed-by: Nicolas Frattaroli <nicolas.frattaroli@collabora.com>
Link: https://patch.msgid.link/20260419-rk3588-mclk-gate-grf-v4-4-513a42dd1dcc@superkali.me
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/include/soc/rockchip/rk3588_grf.h b/include/soc/rockchip/rk3588_grf.h
index 02a7b2432d9942e15a77424c44fefec189faaa33..db0092fc66ad9a664b20e0364661d8e0b6436042 100644 (file)
--- a/include/soc/rockchip/rk3588_grf.h
+++ b/include/soc/rockchip/rk3588_grf.h
@@ -19,4 +19,6 @@
 /* Whether the LPDDR5 is in 2:1 (= 0) or 4:1 (= 1) CKR a.k.a. DQS mode */
 #define RK3588_PMUGRF_OS_REG6_LP5_CKR                  BIT(0)
 
+#define RK3588_SYSGRF_SOC_CON6                 0x0318
+
 #endif /* __SOC_RK3588_GRF_H */