arm64: dts: qcom: sm6350: Add OPP table support to UFSHC

UFS host controller, when scaling gears, should choose appropriate
performance state of RPMh power domain controller along with clock
frequency. So let's add the OPP table support to specify both clock
frequency and RPMh performance states replacing the old "freq-table-hz"
property.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://lore.kernel.org/r/20251023-sm6350-ufs-things-v3-2-b68b74e29d35@fairphone.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 0d2eb51ecc503b4d2b213e53ba92318aafe032d0..c00ba5bb8c519602e8713715593d419b8e50974a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1175,18 +1175,40 @@
                                 <&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
                                 <&gcc GCC_UFS_PHY_RX_SYMBOL_1_CLK>,
                                 <&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
-                       freq-table-hz =
-                               <50000000 200000000>,
-                               <0 0>,
-                               <0 0>,
-                               <37500000 150000000>,
-                               <0 0>,
-                               <0 0>,
-                               <0 0>,
-                               <0 0>,
-                               <75000000 300000000>;
+
+                       operating-points-v2 = <&ufs_opp_table>;
 
                        status = "disabled";
+
+                       ufs_opp_table: opp-table {
+                               compatible = "operating-points-v2";
+
+                               opp-50000000 {
+                                       opp-hz = /bits/ 64 <50000000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <37500000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <75000000>;
+                                       required-opps = <&rpmhpd_opp_low_svs>;
+                               };
+
+                               opp-200000000 {
+                                       opp-hz = /bits/ 64 <200000000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <150000000>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <0>,
+                                                /bits/ 64 <300000000>;
+                                       required-opps = <&rpmhpd_opp_nom>;
+                               };
+                       };
                };
 
                ufs_mem_phy: phy@1d87000 {