[gcc]
2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r215880
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Issue a warning message when vec_lvsl or vec_lvsr is used with a
little endian target.
Backport from mainline r215882
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* altivec.md (altivec_lvsl): New define_expand.
(altivec_lvsl_direct): Rename define_insn from altivec_lvsl.
(altivec_lvsr): New define_expand.
(altivec_lvsr_direct): Rename define_insn from altivec_lvsr.
* rs6000.c (rs6000_expand_builtin): Change to use
altivec_lvs[lr]_direct; remove commented-out code.
[gcc/testsuite]
2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
Backport from mainline r215880
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* g++.dg/ext/altivec-2.C: Compile with -Wno-deprecated to avoid
failing with the new warning message.
* gcc.dg/vmx/3c-01a.c: Likewise.
* gcc.dg/vmx/ops-long-1.c: Likewise.
* gcc.dg/vmx/ops.c: Likewise.
* gcc.target/powerpc/altivec-20.c: Likewise.
* gcc.target/powerpc/altivec-6.c: Likewise.
* gcc.target/powerpc/altivec-vec-merge.c: Likewise.
* gcc.target/powerpc/vsx-builtin-8.c: Likewise.
* gcc.target/powerpc/warn-lvsl-lvsr.c: New test.
Backport from mainline r215882
2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/lvsl-lvsr.c: New test.
Backport from mainline r216017
2014-10-08 Pat Haugen <pthaugen@us.ibm.com>
* gcc.dg/vmx/3c-01a.c: Add default options from vmx.exp.
* gcc.dg/vmx/ops.c: Likewise.
* gcc.dg/vmx/ops-long-1.c: Likewise.
From-SVN: r216135
+2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ Backport from mainline r215880
+ 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
+ Issue a warning message when vec_lvsl or vec_lvsr is used with a
+ little endian target.
+
+ Backport from mainline r215882
+ 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * altivec.md (altivec_lvsl): New define_expand.
+ (altivec_lvsl_direct): Rename define_insn from altivec_lvsl.
+ (altivec_lvsr): New define_expand.
+ (altivec_lvsr_direct): Rename define_insn from altivec_lvsr.
+ * rs6000.c (rs6000_expand_builtin): Change to use
+ altivec_lvs[lr]_direct; remove commented-out code.
+
2014-10-09 Uros Bizjak <ubizjak@gmail.com>
Backport from mainline
"dststt %0,%1,%2"
[(set_attr "type" "vecsimple")])
-(define_insn "altivec_lvsl"
+(define_expand "altivec_lvsl"
+ [(use (match_operand:V16QI 0 "register_operand" ""))
+ (use (match_operand:V16QI 1 "memory_operand" ""))]
+ "TARGET_ALTIVEC"
+{
+ if (VECTOR_ELT_ORDER_BIG)
+ emit_insn (gen_altivec_lvsl_direct (operands[0], operands[1]));
+ else
+ {
+ int i;
+ rtx mask, perm[16], constv, vperm;
+ mask = gen_reg_rtx (V16QImode);
+ emit_insn (gen_altivec_lvsl_direct (mask, operands[1]));
+ for (i = 0; i < 16; ++i)
+ perm[i] = GEN_INT (i);
+ constv = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm));
+ constv = force_reg (V16QImode, constv);
+ vperm = gen_rtx_UNSPEC (V16QImode, gen_rtvec (3, mask, mask, constv),
+ UNSPEC_VPERM);
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], vperm));
+ }
+ DONE;
+})
+
+(define_insn "altivec_lvsl_direct"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(unspec:V16QI [(match_operand:V16QI 1 "memory_operand" "Z")]
UNSPEC_LVSL))]
"lvsl %0,%y1"
[(set_attr "type" "vecload")])
-(define_insn "altivec_lvsr"
+(define_expand "altivec_lvsr"
+ [(use (match_operand:V16QI 0 "register_operand" ""))
+ (use (match_operand:V16QI 1 "memory_operand" ""))]
+ "TARGET_ALTIVEC"
+{
+ if (VECTOR_ELT_ORDER_BIG)
+ emit_insn (gen_altivec_lvsr_direct (operands[0], operands[1]));
+ else
+ {
+ int i;
+ rtx mask, perm[16], constv, vperm;
+ mask = gen_reg_rtx (V16QImode);
+ emit_insn (gen_altivec_lvsr_direct (mask, operands[1]));
+ for (i = 0; i < 16; ++i)
+ perm[i] = GEN_INT (i);
+ constv = gen_rtx_CONST_VECTOR (V16QImode, gen_rtvec_v (16, perm));
+ constv = force_reg (V16QImode, constv);
+ vperm = gen_rtx_UNSPEC (V16QImode, gen_rtvec (3, mask, mask, constv),
+ UNSPEC_VPERM);
+ emit_insn (gen_rtx_SET (VOIDmode, operands[0], vperm));
+ }
+ DONE;
+})
+
+(define_insn "altivec_lvsr_direct"
[(set (match_operand:V16QI 0 "register_operand" "=v")
(unspec:V16QI [(match_operand:V16QI 1 "memory_operand" "Z")]
UNSPEC_LVSR))]
if (TARGET_DEBUG_BUILTIN)
fprintf (stderr, "altivec_resolve_overloaded_builtin, code = %4d, %s\n",
(int)fcode, IDENTIFIER_POINTER (DECL_NAME (fndecl)));
+
+ /* vec_lvsl and vec_lvsr are deprecated for use with LE element order. */
+ if (fcode == ALTIVEC_BUILTIN_VEC_LVSL && !VECTOR_ELT_ORDER_BIG)
+ warning (OPT_Wdeprecated, "vec_lvsl is deprecated for little endian; use \
+assignment for unaligned loads and stores");
+ else if (fcode == ALTIVEC_BUILTIN_VEC_LVSR && !VECTOR_ELT_ORDER_BIG)
+ warning (OPT_Wdeprecated, "vec_lvsr is deprecated for little endian; use \
+assignment for unaligned loads and stores");
/* For now treat vec_splats and vec_promote as the same. */
if (fcode == ALTIVEC_BUILTIN_VEC_SPLATS
case ALTIVEC_BUILTIN_MASK_FOR_LOAD:
case ALTIVEC_BUILTIN_MASK_FOR_STORE:
{
- int icode = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr
- : (int) CODE_FOR_altivec_lvsl);
+ int icode = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct
+ : (int) CODE_FOR_altivec_lvsl_direct);
enum machine_mode tmode = insn_data[icode].operand[0].mode;
enum machine_mode mode = insn_data[icode].operand[1].mode;
tree arg;
|| ! (*insn_data[icode].operand[0].predicate) (target, tmode))
target = gen_reg_rtx (tmode);
- /*pat = gen_altivec_lvsr (target, op);*/
pat = GEN_FCN (icode) (target, op);
if (!pat)
return 0;
+2014-10-12 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ Backport from mainline r215880
+ 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * g++.dg/ext/altivec-2.C: Compile with -Wno-deprecated to avoid
+ failing with the new warning message.
+ * gcc.dg/vmx/3c-01a.c: Likewise.
+ * gcc.dg/vmx/ops-long-1.c: Likewise.
+ * gcc.dg/vmx/ops.c: Likewise.
+ * gcc.target/powerpc/altivec-20.c: Likewise.
+ * gcc.target/powerpc/altivec-6.c: Likewise.
+ * gcc.target/powerpc/altivec-vec-merge.c: Likewise.
+ * gcc.target/powerpc/vsx-builtin-8.c: Likewise.
+ * gcc.target/powerpc/warn-lvsl-lvsr.c: New test.
+
+ Backport from mainline r215882
+ 2014-10-03 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
+
+ * gcc.target/powerpc/lvsl-lvsr.c: New test.
+
+ Backport from mainline r216017
+ 2014-10-08 Pat Haugen <pthaugen@us.ibm.com>
+
+ * gcc.dg/vmx/3c-01a.c: Add default options from vmx.exp.
+ * gcc.dg/vmx/ops.c: Likewise.
+ * gcc.dg/vmx/ops-long-1.c: Likewise.
+
2014-10-10 Jakub Jelinek <jakub@redhat.com>
PR fortran/59488
/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -Wall -Wno-unused-but-set-variable" } */
+/* { dg-options "-maltivec -Wall -Wno-unused-but-set-variable -Wno-deprecated" } */
/* This test checks if AltiVec builtins accept const-qualified
arguments. */
/* { dg-do compile } */
+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mno-vsx -Wno-deprecated" } */
#include <altivec.h>
typedef const volatile unsigned int _1;
typedef const unsigned int _2;
/* { dg-do compile } */
+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mno-vsx -Wno-deprecated" } */
/* Checks from the original ops.c that pass pointers to long or
unsigned long for operations that support that in released versions
/* { dg-do compile } */
+/* { dg-options "-maltivec -mabi=altivec -std=gnu99 -mno-vsx -Wno-deprecated" } */
#include <altivec.h>
#include <stdlib.h>
extern char * *var_char_ptr;
/* { dg-do compile { target powerpc_altivec_ok } } */
-/* { dg-options "-maltivec -mcpu=G5 -O2" } */
+/* { dg-options "-maltivec -mcpu=G5 -O2 -Wno-deprecated" } */
#include <altivec.h>
/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O0 -Wall" } */
+/* { dg-options "-maltivec -O0 -Wall -Wno-deprecated" } */
#include <altivec.h>
/* { dg-do run { target { powerpc*-*-* && vmx_hw } } } */
/* { dg-do compile { target { powerpc*-*-* && { ! vmx_hw } } } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O2" } */
+/* { dg-options "-maltivec -O2 -Wno-deprecated" } */
#include <altivec.h>
--- /dev/null
+/* Test expected code generation for lvsl and lvsr on little endian.
+ Note that lvsl and lvsr are each produced once, but the filename
+ causes them to appear twice in the file. */
+
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-options "-O0 -Wno-deprecated" } */
+/* { dg-final { scan-assembler-times "lvsl" 2 } } */
+/* { dg-final { scan-assembler-times "lvsr" 2 } } */
+/* { dg-final { scan-assembler-times "lxvd2x" 2 } } */
+/* { dg-final { scan-assembler-times "vperm" 2 } } */
+
+
+#include <altivec.h>
+
+float f[20];
+
+void foo ()
+{
+ vector unsigned char a = vec_lvsl (4, f);
+ vector unsigned char b = vec_lvsr (8, f);
+}
/* { dg-do compile { target { powerpc*-*-* } } } */
/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */
/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O3 -mcpu=power7" } */
+/* { dg-options "-O3 -mcpu=power7 -Wno-deprecated" } */
/* Test the various load/store varients. */
--- /dev/null
+/* Test for deprecation messages on use of lvsl and lvsr for little endian. */
+
+/* { dg-do compile { target { powerpc64le-*-* } } } */
+/* { dg-options "-O0 -Wdeprecated" } */
+
+#include <altivec.h>
+
+float f[20];
+
+void foo ()
+{
+ vector unsigned char a = vec_lvsl (4, f); /* { dg-warning "vec_lvsl is deprecated for little endian; use assignment for unaligned loads and stores" } */
+ vector unsigned char b = vec_lvsr (8, f); /* { dg-warning "vec_lvsr is deprecated for little endian; use assignment for unaligned loads and stores" } */
+}
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