spi: cadence-qspi: Support per spi-mem operation frequency switches

Every ->exec_op() call correctly configures the spi bus speed to the
maximum allowed frequency for the memory using the constant spi default
parameter. Since we can now have per-operation constraints, let's use
the value that comes from the spi-mem operation structure instead. In
case there is no specific limitation for this operation, the default spi
device value will be given anyway.

The per-operation frequency capability is thus advertised to the spi-mem
core.

Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://patch.msgid.link/20241224-winbond-6-11-rc1-quad-support-v2-6-ad218dbc406f@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index a031ecb358e0821821c1fbf62734be60c721ff5c..c2379ad13327d2fd762150b7fe4a7255b3fbf349 100644 (file)
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1409,7 +1409,7 @@ static int cqspi_mem_process(struct spi_mem *mem, const struct spi_mem_op *op)
        struct cqspi_flash_pdata *f_pdata;
 
        f_pdata = &cqspi->f_pdata[spi_get_chipselect(mem->spi, 0)];
-       cqspi_configure(f_pdata, mem->spi->max_speed_hz);
+       cqspi_configure(f_pdata, op->max_freq);
 
        if (op->data.dir == SPI_MEM_DATA_IN && op->data.buf.in) {
        /*
@@ -1658,6 +1658,7 @@ static const struct spi_controller_mem_ops cqspi_mem_ops = {
 
 static const struct spi_controller_mem_caps cqspi_mem_caps = {
        .dtr = true,
+       .per_op_freq = true,
 };
 
 static int cqspi_setup_flash(struct cqspi_st *cqspi)