perf/x86/intel: Update event constraints for DMR

Add missed event constraint for 0x0200 event and add comments to show
the event names in pnc_hw_cache_extra_regs[].

Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://patch.msgid.link/20260515061143.338553-4-dapeng1.mi@linux.intel.com

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index 932f612a99f3f7db0a483b19f6bb51e02cd15e89..da2ade0bb6c4762041acde1560d665e1a3e0ba82 100644 (file)
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -466,11 +466,12 @@ static struct extra_reg intel_lnc_extra_regs[] __read_mostly = {
 
 static struct event_constraint intel_pnc_event_constraints[] = {
        FIXED_EVENT_CONSTRAINT(0x00c0, 0),      /* INST_RETIRED.ANY */
-       FIXED_EVENT_CONSTRAINT(0x0100, 0),      /* INST_RETIRED.PREC_DIST */
+       FIXED_EVENT_CONSTRAINT(0x0100, 0),      /* pseudo INST_RETIRED.ANY */
        FIXED_EVENT_CONSTRAINT(0x003c, 1),      /* CPU_CLK_UNHALTED.CORE */
-       FIXED_EVENT_CONSTRAINT(0x0300, 2),      /* CPU_CLK_UNHALTED.REF */
+       FIXED_EVENT_CONSTRAINT(0x0200, 1),      /* pseudo CPU_CLK_UNHALTED.THREAD */
+       FIXED_EVENT_CONSTRAINT(0x0300, 2),      /* pseudo CPU_CLK_UNHALTED.REF_TSC */
        FIXED_EVENT_CONSTRAINT(0x013c, 2),      /* CPU_CLK_UNHALTED.REF_TSC_P */
-       FIXED_EVENT_CONSTRAINT(0x0400, 3),      /* SLOTS */
+       FIXED_EVENT_CONSTRAINT(0x0400, 3),      /* pseudo TOPDOWN.SLOTS */
        METRIC_EVENT_CONSTRAINT(INTEL_TD_METRIC_RETIRING, 0),
        METRIC_EVENT_CONSTRAINT(INTEL_TD_METRIC_BAD_SPEC, 1),
        METRIC_EVENT_CONSTRAINT(INTEL_TD_METRIC_FE_BOUND, 2),
@@ -821,12 +822,12 @@ static __initconst const u64 pnc_hw_cache_extra_regs
 {
  [ C(LL  ) ] = {
        [ C(OP_READ) ] = {
-               [ C(RESULT_ACCESS) ] = 0x4000000000000001,
-               [ C(RESULT_MISS)   ] = 0xFFFFF000000001,
+               [ C(RESULT_ACCESS) ] = 0x4000000000000001,      /* OMR.DEMAND_DATA_RD.ANY_RESPONSE */
+               [ C(RESULT_MISS)   ] = 0xFFFFF000000001,        /* OMR.DEMAND_DATA_RD.L3_MISS */
        },
        [ C(OP_WRITE) ] = {
-               [ C(RESULT_ACCESS) ] = 0x4000000000000002,
-               [ C(RESULT_MISS)   ] = 0xFFFFF000000002,
+               [ C(RESULT_ACCESS) ] = 0x4000000000000002,      /* OMR.DEMAND_RFO.ANY_RESPONSE */
+               [ C(RESULT_MISS)   ] = 0xFFFFF000000002,        /* OMR.DEMAND_RFO.L3_MISS */
        },
  },
 };