arm64: dts: qcom: qcs615: add AOSS_QMP node

Add the Always-On Subsystem Qualcomm Message Protocol(AOSS_QMP) node for
QCS615 SoC. The AOSS_QMP enables the system to send and receive messages
on the SoC and uses the same hardware version as sdm845.

Signed-off-by: Kyle Deng <quic_chunkaid@quicinc.com>
Link: https://lore.kernel.org/r/20241018073417.2338864-4-quic_chunkaid@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
index 868808918fd2cdf3f23fcb43ead61b2abfc776f7..b45f16efd5ee4806749a9217ac986a1f8b60c02b 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
@@ -512,6 +512,16 @@
                        interrupt-controller;
                };
 
+               aoss_qmp: power-controller@c300000 {
+                       compatible = "qcom,qcs615-aoss-qmp", "qcom,aoss-qmp";
+                       reg = <0x0 0x0c300000 0x0 0x400>;
+                       interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
+                       mboxes = <&apss_shared 0>;
+
+                       #clock-cells = <0>;
+                       #power-domain-cells = <1>;
+               };
+
                sram@c3f0000 {
                        compatible = "qcom,rpmh-stats";
                        reg = <0x0 0x0c3f0000 0x0 0x400>;
@@ -528,6 +538,13 @@
                        redistributor-stride = <0x0 0x20000>;
                };
 
+               apss_shared: mailbox@17c00000 {
+                       compatible = "qcom,qcs615-apss-shared",
+                                    "qcom,sdm845-apss-shared";
+                       reg = <0x0 0x17c00000 0x0 0x1000>;
+                       #mbox-cells = <1>;
+               };
+
                watchdog: watchdog@17c10000 {
                        compatible = "qcom,apss-wdt-qcs615", "qcom,kpss-wdt";
                        reg = <0x0 0x17c10000 0x0 0x1000>;