rockchip: fix asm-operand-widths clang warning

CONFIG_COUNTER_FREQUENCY is currently 24000000 for all SoCs, meaning it
fits in a 32b type. For 64b SoCs, it's an issue since the registers are
64b.

clang complains that we're trying to fit a 32b value into a 64b
register:

arch/arm/mach-rockchip/rk3528/rk3528.c:98:45: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]
   98 |         asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
      |                                                    ^
include/generated/autoconf.h:372:34: note: expanded from macro 'CONFIG_COUNTER_FREQUENCY'
  372 | #define CONFIG_COUNTER_FREQUENCY 24000000
      |                                  ^
/home/qschulz/work/upstream/u-boot/arch/arm/mach-rockchip/rk3528/rk3528.c:98:32: note: use constraint modifier "w"
   98 |         asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
      |                                       ^~
      |                                       %w0

Even though cntfrq_el0[1] is only using the 32b LSB of its 64b, use the
'x' operand modifier[2] to force the value to be 64b and fix the
warning.

[1] https://developer.arm.com/documentation/ddi0601/2026-03/AArch64-Registers/CNTFRQ-EL0--Counter-timer-Frequency-Register?lang=en
[2] https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#AArch64-Operand-Modifiers

Suggested-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Link: https://patch.msgid.link/20260423-rk35-cnt-freq-v1-1-8f07677be5ca@cherry.de
Signed-off-by: Quentin Schulz <u-boot@0leil.net>

diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c
index f9bfc445b8571dd66e4048af537e47b483f3b9ce..a39cb8be9a13258a5200a03a1b17d94786222ef3 100644 (file)
--- a/arch/arm/mach-rockchip/rk3528/rk3528.c
+++ b/arch/arm/mach-rockchip/rk3528/rk3528.c
@@ -95,7 +95,7 @@ void rockchip_stimer_init(void)
        if (reg & TIMER_EN)
                return;
 
-       asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
+       asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
        writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
        writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
        writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);

diff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c
index 1def4e8797195bfc06a783c366489582e520eb50..e3e93f6639597b1cafdff333191319f0cbdc5a9f 100644 (file)
--- a/arch/arm/mach-rockchip/rk3576/rk3576.c
+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c
@@ -131,7 +131,7 @@ void rockchip_stimer_init(void)
        if (reg & TIMER_EN)
                return;
 
-       asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
+       asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
        writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
        writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
        writel((TIMER_EN << 16) | TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);

diff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c
index c8de1a21024987bf7089f9417e3a74d299cd1fa0..f69792670d06e70a15ea4874f5aaec7e89476e9a 100644 (file)
--- a/arch/arm/mach-rockchip/rk3588/rk3588.c
+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c
@@ -167,7 +167,7 @@ void rockchip_stimer_init(void)
        if (reg & TIMER_EN)
                return;
 
-       asm volatile("msr cntfrq_el0, %0" : : "r" (CONFIG_COUNTER_FREQUENCY));
+       asm volatile("msr cntfrq_el0, %x0" : : "r" (CONFIG_COUNTER_FREQUENCY));
        writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);
        writel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);
        writel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);