KVM: arm64: GICv2: Always trap GICV_DIR register

Since we can't decide to trap the DIR register on a per-vcpu basis,
always trap the second page of the GIC CPU interface. Yes, this is
costly. On the bright side, no sane SW should use EOImode==1 on
GICv2...

Tested-by: Fuad Tabba <tabba@google.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Tested-by: Mark Brown <broonie@kernel.org>
Link: https://msgid.link/20251120172540.2267180-40-maz@kernel.org
Signed-off-by: Oliver Upton <oupton@kernel.org>

diff --git a/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c b/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c
index 78579b31a4205fe1e8877f3da172faddacb4b42f..5fd99763b54de536229f35c5305e8d17f9bfc065 100644 (file)
--- a/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c
+++ b/arch/arm64/kvm/hyp/vgic-v2-cpuif-proxy.c
@@ -63,6 +63,10 @@ int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu)
                return -1;
        }
 
+       /* Handle deactivation as a normal exit */
+       if ((fault_ipa - vgic->vgic_cpu_base) >= GIC_CPU_DEACTIVATE)
+               return 0;
+
        rd = kvm_vcpu_dabt_get_rd(vcpu);
        addr  = kvm_vgic_global_state.vcpu_hyp_va;
        addr += fault_ipa - vgic->vgic_cpu_base;

diff --git a/arch/arm64/kvm/vgic/vgic-v2.c b/arch/arm64/kvm/vgic/vgic-v2.c
index bc52d44a573d5bf6a6d64bca07a6f687477fb589..585491fbda807706380d3dd431190b94207d13ac 100644 (file)
--- a/arch/arm64/kvm/vgic/vgic-v2.c
+++ b/arch/arm64/kvm/vgic/vgic-v2.c
@@ -457,7 +457,7 @@ int vgic_v2_map_resources(struct kvm *kvm)
        if (!static_branch_unlikely(&vgic_v2_cpuif_trap)) {
                ret = kvm_phys_addr_ioremap(kvm, dist->vgic_cpu_base,
                                            kvm_vgic_global_state.vcpu_base,
-                                           KVM_VGIC_V2_CPU_SIZE, true);
+                                           KVM_VGIC_V2_CPU_SIZE - SZ_4K, true);
                if (ret) {
                        kvm_err("Unable to remap VGIC CPU to VCPU\n");
                        return ret;