coresight: etm4x: Fix save/restore during cpu idle

[ Upstream commit 342c8a1d1d9e418d32fa02d635cf96989f9a986e ]

The ETM state save/restore incorrectly reads/writes some of the 64bit
registers (e.g, address comparators, vmid/cid comparators etc.) using
32bit accesses. Ensure we use the appropriate width accessors for
the registers.

Fixes: f188b5e76aae ("coresight: etm4x: Save/restore state across CPU low power states")
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Link: https://lore.kernel.org/r/20200716175746.3338735-18-mathieu.poirier@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c
index 942b362a1f220b69dc5bee2d7b95f1242876e2b7..13c362cddd6a690787ca69a3e84e2c0d04ab217f 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x.c
+++ b/drivers/hwtracing/coresight/coresight-etm4x.c
@@ -1213,8 +1213,8 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
        }
 
        for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
-               state->trcacvr[i] = readl(drvdata->base + TRCACVRn(i));
-               state->trcacatr[i] = readl(drvdata->base + TRCACATRn(i));
+               state->trcacvr[i] = readq(drvdata->base + TRCACVRn(i));
+               state->trcacatr[i] = readq(drvdata->base + TRCACATRn(i));
        }
 
        /*
@@ -1225,10 +1225,10 @@ static int etm4_cpu_save(struct etmv4_drvdata *drvdata)
         */
 
        for (i = 0; i < drvdata->numcidc; i++)
-               state->trccidcvr[i] = readl(drvdata->base + TRCCIDCVRn(i));
+               state->trccidcvr[i] = readq(drvdata->base + TRCCIDCVRn(i));
 
        for (i = 0; i < drvdata->numvmidc; i++)
-               state->trcvmidcvr[i] = readl(drvdata->base + TRCVMIDCVRn(i));
+               state->trcvmidcvr[i] = readq(drvdata->base + TRCVMIDCVRn(i));
 
        state->trccidcctlr0 = readl(drvdata->base + TRCCIDCCTLR0);
        state->trccidcctlr1 = readl(drvdata->base + TRCCIDCCTLR1);
@@ -1326,18 +1326,18 @@ static void etm4_cpu_restore(struct etmv4_drvdata *drvdata)
        }
 
        for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
-               writel_relaxed(state->trcacvr[i],
+               writeq_relaxed(state->trcacvr[i],
                               drvdata->base + TRCACVRn(i));
-               writel_relaxed(state->trcacatr[i],
+               writeq_relaxed(state->trcacatr[i],
                               drvdata->base + TRCACATRn(i));
        }
 
        for (i = 0; i < drvdata->numcidc; i++)
-               writel_relaxed(state->trccidcvr[i],
+               writeq_relaxed(state->trccidcvr[i],
                               drvdata->base + TRCCIDCVRn(i));
 
        for (i = 0; i < drvdata->numvmidc; i++)
-               writel_relaxed(state->trcvmidcvr[i],
+               writeq_relaxed(state->trcvmidcvr[i],
                               drvdata->base + TRCVMIDCVRn(i));
 
        writel_relaxed(state->trccidcctlr0, drvdata->base + TRCCIDCCTLR0);

diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtracing/coresight/coresight-etm4x.h
index b0d633daf7162b248fc1cf52cea4811a2810b828..47729e04aac729972bcc8872df5bf45c652bb3dd 100644 (file)
--- a/drivers/hwtracing/coresight/coresight-etm4x.h
+++ b/drivers/hwtracing/coresight/coresight-etm4x.h
@@ -334,7 +334,7 @@ struct etmv4_save_state {
        u64     trcacvr[ETM_MAX_SINGLE_ADDR_CMP];
        u64     trcacatr[ETM_MAX_SINGLE_ADDR_CMP];
        u64     trccidcvr[ETMv4_MAX_CTXID_CMP];
-       u32     trcvmidcvr[ETM_MAX_VMID_CMP];
+       u64     trcvmidcvr[ETM_MAX_VMID_CMP];
        u32     trccidcctlr0;
        u32     trccidcctlr1;
        u32     trcvmidcctlr0;