Make several more files compile cleanly with icc -Wall. Hopefully

this doesn't break anything.

git-svn-id: svn://svn.valgrind.org/vex/trunk@1066

diff --git a/VEX/priv/guest-arm/ghelpers.c b/VEX/priv/guest-arm/ghelpers.c
index 429b18a10f08ce7289c834360004d9923c5e687b..a814b72a8c03249fe3f9bd05bec99277492889b9 100644 (file)
--- a/VEX/priv/guest-arm/ghelpers.c
+++ b/VEX/priv/guest-arm/ghelpers.c
@@ -193,7 +193,7 @@ UInt armg_calculate_flags_all ( UInt cc_op,
 
    default:
       /* shouldn't really make these calls from generated code */
-      vex_printf("armg_calculate_flags_all(ARM)( %d, 0x%x, 0x%x )\n",
+      vex_printf("armg_calculate_flags_all(ARM)( %u, 0x%x, 0x%x )\n",
                  cc_op, cc_dep1_formal, cc_dep2_formal );
       vpanic("armg_calculate_flags_all(ARM)");
    }
@@ -272,7 +272,7 @@ UInt armg_calculate_condition ( UInt/*ARMCondcode*/ cond,
    case ARMCondNV:   // should never get here: Illegal instr
    default:
       /* shouldn't really make these calls from generated code */
-      vex_printf("armg_calculate_condition(ARM)( %d, %d, 0x%x, 0x%x )\n",
+      vex_printf("armg_calculate_condition(ARM)( %u, %u, 0x%x, 0x%x )\n",
                  cond, cc_op, cc_dep1, cc_dep2 );
       vpanic("armg_calculate_condition(ARM)");
    }

diff --git a/VEX/priv/host-amd64/isel.c b/VEX/priv/host-amd64/isel.c
index 02d83069c5240908cbc82b800a65db0853d4d0b7..048cba9766353e943e6c7fe5877fd5b27d0067be 100644 (file)
--- a/VEX/priv/host-amd64/isel.c
+++ b/VEX/priv/host-amd64/isel.c
@@ -2,7 +2,7 @@
 /*---------------------------------------------------------------*/
 /*---                                                         ---*/
 /*--- This file (host-amd64/isel.c) is                        ---*/
-/*--- Copyright (c) 2005 OpenWorks LLP.  All rights reserved. ---*/
+/*--- Copyright (c) OpenWorks LLP.  All rights reserved.      ---*/
 /*---                                                         ---*/
 /*---------------------------------------------------------------*/
 
@@ -10,7 +10,7 @@
    This file is part of LibVEX, a library for dynamic binary
    instrumentation and translation.
 
-   Copyright (C) 2004-2005 OpenWorks, LLP.
+   Copyright (C) 2004-2005 OpenWorks LLP.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -248,14 +248,16 @@ static Bool sane_AMode ( AMD64AMode* am )
 {
    switch (am->tag) {
       case Aam_IR:
-         return hregClass(am->Aam.IR.reg) == HRcInt64
-                && (hregIsVirtual(am->Aam.IR.reg)
-                    || am->Aam.IR.reg == hregAMD64_RBP());
+         return 
+            toBool( hregClass(am->Aam.IR.reg) == HRcInt64
+                    && (hregIsVirtual(am->Aam.IR.reg)
+                        || am->Aam.IR.reg == hregAMD64_RBP()) );
       case Aam_IRRS:
-         return hregClass(am->Aam.IRRS.base) == HRcInt64
-                && hregIsVirtual(am->Aam.IRRS.base)
-                && hregClass(am->Aam.IRRS.index) == HRcInt64
-                && hregIsVirtual(am->Aam.IRRS.index);
+         return 
+            toBool( hregClass(am->Aam.IRRS.base) == HRcInt64
+                    && hregIsVirtual(am->Aam.IRRS.base)
+                    && hregClass(am->Aam.IRRS.index) == HRcInt64
+                    && hregIsVirtual(am->Aam.IRRS.index) );
       default:
         vpanic("sane_AMode: unknown amd64 amode tag");
    }
@@ -943,7 +945,7 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
          HReg      rax     = hregAMD64_RAX();
          HReg      rdx     = hregAMD64_RDX();
          HReg      dst     = newVRegI(env);
-         Bool      syned   = e->Iex.Binop.op == Iop_DivModS64to32;
+         Bool      syned   = toBool(e->Iex.Binop.op == Iop_DivModS64to32);
          AMD64RM*  rmRight = iselIntExpr_RM(env, e->Iex.Binop.arg2);
          /* Compute the left operand into a reg, and then 
             put the top half in edx and the bottom in eax. */
@@ -1369,7 +1371,7 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       if (ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32) {
          HReg dst = newVRegI(env);
          addInstr(env, AMD64Instr_LoadEX(
-                          ty==Ity_I8 ? 1 : (ty==Ity_I16 ? 2 : 4),
+                          toBool(ty==Ity_I8 ? 1 : (ty==Ity_I16 ? 2 : 4)),
                           False,
                           AMD64AMode_IR(e->Iex.Get.offset,hregAMD64_RBP()),
                           dst));
@@ -1500,7 +1502,7 @@ static AMD64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, IRExpr* e )
           && simm32->Iex.Const.con->tag == Ico_U64
           && fitsIn32Bits(simm32->Iex.Const.con->Ico.U64)) {
          UInt shift = imm8->Iex.Const.con->Ico.U8;
-         UInt offset = (UInt)(0xFFFFFFFF & simm32->Iex.Const.con->Ico.U64);
+         UInt offset = toUInt(simm32->Iex.Const.con->Ico.U64);
          HReg r1 = iselIntExpr_R(env, expr1);
          HReg r2 = iselIntExpr_R(env, expr2);
          vassert(shift == 0 || shift == 1 || shift == 2 || shift == 3);
@@ -1531,7 +1533,7 @@ static AMD64AMode* iselIntExpr_AMode_wrk ( ISelEnv* env, IRExpr* e )
        && fitsIn32Bits(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64)) {
       HReg r1 = iselIntExpr_R(env, e->Iex.Binop.arg1);
       return AMD64AMode_IR(
-                (UInt)(0xFFFFFFFF & e->Iex.Binop.arg2->Iex.Const.con->Ico.U64), 
+                toUInt(e->Iex.Binop.arg2->Iex.Const.con->Ico.U64), 
                 r1
              );
    }
@@ -1581,7 +1583,7 @@ static AMD64RMI* iselIntExpr_RMI_wrk ( ISelEnv* env, IRExpr* e )
       switch (e->Iex.Const.con->tag) {
         case Ico_U64:
            if (fitsIn32Bits(e->Iex.Const.con->Ico.U64)) {
-              return AMD64RMI_Imm(0xFFFFFFFF & e->Iex.Const.con->Ico.U64);
+              return AMD64RMI_Imm(toUInt(e->Iex.Const.con->Ico.U64));
            }
            break;
          case Ico_U32:
@@ -1649,7 +1651,7 @@ static AMD64RI* iselIntExpr_RI_wrk ( ISelEnv* env, IRExpr* e )
       switch (e->Iex.Const.con->tag) {
         case Ico_U64:
            if (fitsIn32Bits(e->Iex.Const.con->Ico.U64)) {
-              return AMD64RI_Imm(0xFFFFFFFF & e->Iex.Const.con->Ico.U64);
+              return AMD64RI_Imm(toUInt(e->Iex.Const.con->Ico.U64));
            }
            break;
          case Ico_U32:
@@ -2036,7 +2038,7 @@ static void iselInt128Expr_wrk ( HReg* rHi, HReg* rLo,
                which. */
             HReg     tLo    = newVRegI(env);
             HReg     tHi    = newVRegI(env);
-            Bool     syned  = e->Iex.Binop.op == Iop_MullS64;
+            Bool     syned  = toBool(e->Iex.Binop.op == Iop_MullS64);
             AMD64RM* rmLeft = iselIntExpr_RM(env, e->Iex.Binop.arg1);
             HReg     rRight = iselIntExpr_R(env, e->Iex.Binop.arg2);
             addInstr(env, mk_iMOVsd_RR(rRight, hregAMD64_RAX()));
@@ -2057,7 +2059,7 @@ static void iselInt128Expr_wrk ( HReg* rHi, HReg* rLo,
             HReg sHi, sLo;
             HReg     tLo     = newVRegI(env);
             HReg     tHi     = newVRegI(env);
-            Bool     syned   = e->Iex.Binop.op == Iop_DivModS128to64;
+            Bool     syned   = toBool(e->Iex.Binop.op == Iop_DivModS128to64);
             AMD64RM* rmRight = iselIntExpr_RM(env, e->Iex.Binop.arg2);
             iselInt128Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
             addInstr(env, mk_iMOVsd_RR(sHi, hregAMD64_RDX()));
@@ -3413,8 +3415,9 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
       }
       if (tyd == Ity_I8 || tyd == Ity_I16 || tyd == Ity_I32) {
          HReg r = iselIntExpr_R(env, stmt->Ist.STle.data);
-         addInstr(env, AMD64Instr_Store(tyd==Ity_I8 ? 1 : (tyd==Ity_I16 ? 2 : 4),
-                                        r,am));
+         addInstr(env, AMD64Instr_Store(
+                          toUChar(tyd==Ity_I8 ? 1 : (tyd==Ity_I16 ? 2 : 4)),
+                          r,am));
          return;
       }
       if (tyd == Ity_F64) {
@@ -3464,7 +3467,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
       if (ty == Ity_I8 || ty == Ity_I16 || ty == Ity_I32) {
          HReg r = iselIntExpr_R(env, stmt->Ist.Put.data);
          addInstr(env, AMD64Instr_Store(
-                          ty==Ity_I8 ? 1 : (ty==Ity_I16 ? 2 : 4),
+                          toUChar(ty==Ity_I8 ? 1 : (ty==Ity_I16 ? 2 : 4)),
                           r,
                           AMD64AMode_IR(stmt->Ist.Put.offset,
                                         hregAMD64_RBP())));
@@ -3577,7 +3580,8 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
 
       if (d->nFxState == 0)
          vassert(!d->needsBBP);
-      passBBP = d->nFxState > 0 && d->needsBBP;
+
+      passBBP = toBool(d->nFxState > 0 && d->needsBBP);
 
       /* Marshal args, do the call, clear stack. */
       doHelperCall( env, passBBP, d->guard, d->cee, d->args );

diff --git a/VEX/priv/host-arm/isel.c b/VEX/priv/host-arm/isel.c
index 6ceaa4507f50f89334d06f5d9b230440c30ad4bd..3c56dd533143c28c4853b7e23019b826c46314f2 100644 (file)
--- a/VEX/priv/host-arm/isel.c
+++ b/VEX/priv/host-arm/isel.c
@@ -834,7 +834,8 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
 
       if (d->nFxState == 0)
          vassert(!d->needsBBP);
-      passBBP = d->nFxState > 0 && d->needsBBP;
+
+      passBBP = toBool(d->nFxState > 0 && d->needsBBP);
 
       /* Marshal args, do the call, clear stack. */
       doHelperCall( env, passBBP, d->guard, d->cee, d->args );

diff --git a/VEX/priv/host-ppc32/hdefs.c b/VEX/priv/host-ppc32/hdefs.c
index 27e7249a66e37e5e9e808800ffa73123ac40244a..926fee64937c6ef86bb0553711f6edb32099912e 100644 (file)
--- a/VEX/priv/host-ppc32/hdefs.c
+++ b/VEX/priv/host-ppc32/hdefs.c
@@ -2,7 +2,7 @@
 /*---------------------------------------------------------------*/
 /*---                                                         ---*/
 /*--- This file (host-ppc32/hdefs.c) is                       ---*/
-/*--- Copyright (c) 2005 OpenWorks LLP.  All rights reserved. ---*/
+/*--- Copyright (c) OpenWorks LLP.  All rights reserved.      ---*/
 /*---                                                         ---*/
 /*---------------------------------------------------------------*/
 
@@ -10,7 +10,7 @@
    This file is part of LibVEX, a library for dynamic binary
    instrumentation and translation.
 
-   Copyright (C) 2004-2005 OpenWorks, LLP.
+   Copyright (C) 2004-2005 OpenWorks LLP.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -786,7 +786,7 @@ void ppPPC32Instr ( PPC32Instr* i )
       ppPPC32RI(i->Pin.Sh32.shft);
       return;
    case Pin_Cmp32:
-      vex_printf("%s%s %%crf%d,", showPPC32CmpOp(i->Pin.Cmp32.op),
+      vex_printf("%s%s %%crf%u,", showPPC32CmpOp(i->Pin.Cmp32.op),
                  i->Pin.Cmp32.srcR->tag == Pri_Imm ? "i" : "",
                  (7 - i->Pin.Cmp32.crfD));
       ppHRegPPC32(i->Pin.Cmp32.srcL);
@@ -883,7 +883,7 @@ void ppPPC32Instr ( PPC32Instr* i )
    case Pin_Load: {
       UChar sz = i->Pin.Load.sz;
       Bool syned = i->Pin.Load.syned;
-      Bool idxd = (i->Pin.Load.src->tag == Pam_RR) ? True : False;
+      Bool idxd = toBool(i->Pin.Load.src->tag == Pam_RR);
       vex_printf("l%c%c%s ",
                  (sz==1) ? 'b' : (sz==2 ? 'h' : 'w'),
                  syned ? 'a' : 'z',
@@ -895,7 +895,7 @@ void ppPPC32Instr ( PPC32Instr* i )
    }
    case Pin_Store: {
       UChar sz = i->Pin.Store.sz;
-      Bool idxd = (i->Pin.Store.dst->tag == Pam_RR) ? True : False;
+      Bool idxd = toBool(i->Pin.Store.dst->tag == Pam_RR);
       vex_printf("st%c%s ",
                  (sz==1) ? 'b' : (sz==2 ? 'h' : 'w'),
                  idxd ? "x" : "" );
@@ -915,7 +915,7 @@ void ppPPC32Instr ( PPC32Instr* i )
       } else {
          vex_printf(": { mfcr r0 ; rlwinm ");
          ppHRegPPC32(i->Pin.Set32.dst);
-         vex_printf(",r0,%d,31,31", cc.flag+1);
+         vex_printf(",r0,%u,31,31", cc.flag+1);
          if (cc.test == Pct_FALSE) {
             vex_printf("; xori ");
             ppHRegPPC32(i->Pin.Set32.dst);
@@ -1076,7 +1076,7 @@ void ppPPC32Instr ( PPC32Instr* i )
       return;
 
    default:
-      vex_printf("\nppPPC32Instr(ppc32): No such tag(%d)\n", i->tag);
+      vex_printf("\nppPPC32Instr(ppc32): No such tag(%d)\n", (Int)i->tag);
       vpanic("ppPPC32Instr(ppc32)");
    }
 }
@@ -1610,10 +1610,10 @@ static UInt iregNo ( HReg r )
 /* Emit 32bit instruction big-endianly */
 static UChar* emit32 ( UChar* p, UInt w32 )
 {
-   *p++ = (w32 >> 24) & 0x000000FF;
-   *p++ = (w32 >> 16) & 0x000000FF;
-   *p++ = (w32 >>  8) & 0x000000FF;
-   *p++ = (w32)       & 0x000000FF;
+   *p++ = toUChar((w32 >> 24) & 0x000000FF);
+   *p++ = toUChar((w32 >> 16) & 0x000000FF);
+   *p++ = toUChar((w32 >>  8) & 0x000000FF);
+   *p++ = toUChar((w32)       & 0x000000FF);
    return p;
 }
 

diff --git a/VEX/priv/host-x86/isel.c b/VEX/priv/host-x86/isel.c
index 247a3148f726333d03dd3e8c87367d81ac22284f..7a893538d22766c1acaf20740b6e0aac5d86ace7 100644 (file)
--- a/VEX/priv/host-x86/isel.c
+++ b/VEX/priv/host-x86/isel.c
@@ -2,7 +2,7 @@
 /*---------------------------------------------------------------*/
 /*---                                                         ---*/
 /*--- This file (host-x86/isel.c) is                          ---*/
-/*--- Copyright (c) 2004 OpenWorks LLP.  All rights reserved. ---*/
+/*--- Copyright (c) OpenWorks LLP.  All rights reserved.      ---*/
 /*---                                                         ---*/
 /*---------------------------------------------------------------*/
 
@@ -10,7 +10,7 @@
    This file is part of LibVEX, a library for dynamic binary
    instrumentation and translation.
 
-   Copyright (C) 2004 OpenWorks, LLP.
+   Copyright (C) 2004-2005 OpenWorks LLP.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -258,9 +258,9 @@ static HReg        iselVecExpr     ( ISelEnv* env, IRExpr* e );
 
 static Bool isZero32 ( IRExpr* e )
 {
-   return e->tag == Iex_Const
-          && e->Iex.Const.con->tag == Ico_U32
-          && e->Iex.Const.con->Ico.U32 == 0;
+   return toBool( e->tag == Iex_Const
+                  && e->Iex.Const.con->tag == Ico_U32
+                  && e->Iex.Const.con->Ico.U32 == 0 );
 }
 
 /* Make a int reg-reg move. */
@@ -352,7 +352,7 @@ void callHelperAndClearArgs ( ISelEnv* env, X86CondCode cc,
       parameters. */
    vassert(sizeof(void*) == 4);
 
-   addInstr(env, X86Instr_Call( cc, (UInt)Ptr_to_ULong(cee->addr), 
+   addInstr(env, X86Instr_Call( cc, toUInt(Ptr_to_ULong(cee->addr)),
                                     cee->regparms));
    if (n_arg_ws > 0)
       add_to_esp(env, 4*n_arg_ws);
@@ -956,7 +956,8 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
         set_FPU_rounding_mode( env, e->Iex.Binop.arg1 );
 
          /* gistw/l %rf, 0(%esp) */
-         addInstr(env, X86Instr_FpLdStI(False/*store*/, sz, rf, zero_esp));
+         addInstr(env, X86Instr_FpLdStI(False/*store*/, 
+                                        toUChar(sz), rf, zero_esp));
 
          if (sz == 2) {
             /* movzwl 0(%esp), %dst */
@@ -1156,7 +1157,7 @@ static HReg iselIntExpr_R_wrk ( ISelEnv* env, IRExpr* e )
       if (ty == Ity_I8 || ty == Ity_I16) {
          HReg dst = newVRegI(env);
          addInstr(env, X86Instr_LoadEX(
-                          ty==Ity_I8 ? 1 : 2,
+                          toUChar(ty==Ity_I8 ? 1 : 2),
                           False,
                           X86AMode_IR(e->Iex.Get.offset,hregX86_EBP()),
                           dst));
@@ -1247,14 +1248,16 @@ static Bool sane_AMode ( X86AMode* am )
 {
    switch (am->tag) {
       case Xam_IR:
-         return hregClass(am->Xam.IR.reg) == HRcInt32
-                && (hregIsVirtual(am->Xam.IR.reg)
-                    || am->Xam.IR.reg == hregX86_EBP());
+         return 
+            toBool( hregClass(am->Xam.IR.reg) == HRcInt32
+                    && (hregIsVirtual(am->Xam.IR.reg)
+                        || am->Xam.IR.reg == hregX86_EBP()) );
       case Xam_IRRS:
-         return hregClass(am->Xam.IRRS.base) == HRcInt32
-                && hregIsVirtual(am->Xam.IRRS.base)
-                && hregClass(am->Xam.IRRS.index) == HRcInt32
-                && hregIsVirtual(am->Xam.IRRS.index);
+         return 
+            toBool( hregClass(am->Xam.IRRS.base) == HRcInt32
+                    && hregIsVirtual(am->Xam.IRRS.base)
+                    && hregClass(am->Xam.IRRS.index) == HRcInt32
+                    && hregIsVirtual(am->Xam.IRRS.index) );
       default:
         vpanic("sane_AMode: unknown x86 amode tag");
    }
@@ -1683,8 +1686,8 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
    /* 64-bit literal */
    if (e->tag == Iex_Const) {
       ULong w64 = e->Iex.Const.con->Ico.U64;
-      UInt  wHi = ((UInt)(w64 >> 32)) & 0xFFFFFFFF;
-      UInt  wLo = ((UInt)w64) & 0xFFFFFFFF;
+      UInt  wHi = toUInt(w64 >> 32);
+      UInt  wLo = toUInt(w64);
       HReg  tLo = newVRegI(env);
       HReg  tHi = newVRegI(env);
       vassert(e->Iex.Const.con->tag == Ico_U64);
@@ -1776,7 +1779,7 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
                which. */
             HReg   tLo    = newVRegI(env);
             HReg   tHi    = newVRegI(env);
-            Bool   syned  = e->Iex.Binop.op == Iop_MullS32;
+            Bool   syned  = toBool(e->Iex.Binop.op == Iop_MullS32);
             X86RM* rmLeft = iselIntExpr_RM(env, e->Iex.Binop.arg1);
             HReg   rRight = iselIntExpr_R(env, e->Iex.Binop.arg2);
             addInstr(env, mk_iMOVsd_RR(rRight, hregX86_EAX()));
@@ -1797,7 +1800,7 @@ static void iselInt64Expr_wrk ( HReg* rHi, HReg* rLo, ISelEnv* env, IRExpr* e )
             HReg sHi, sLo;
             HReg   tLo     = newVRegI(env);
             HReg   tHi     = newVRegI(env);
-            Bool   syned   = e->Iex.Binop.op == Iop_DivModS64to32;
+            Bool   syned   = toBool(e->Iex.Binop.op == Iop_DivModS64to32);
             X86RM* rmRight = iselIntExpr_RM(env, e->Iex.Binop.arg2);
             iselInt64Expr(&sHi,&sLo, env, e->Iex.Binop.arg1);
             addInstr(env, mk_iMOVsd_RR(sHi, hregX86_EDX()));
@@ -3167,8 +3170,8 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
       }
       if (tyd == Ity_I8 || tyd == Ity_I16) {
          HReg r = iselIntExpr_R(env, stmt->Ist.STle.data);
-         addInstr(env, X86Instr_Store(tyd==Ity_I8 ? 1 : 2,
-                                      r,am));
+         addInstr(env, X86Instr_Store( toUChar(tyd==Ity_I8 ? 1 : 2),
+                                       r,am ));
          return;
       }
       if (tyd == Ity_F64) {
@@ -3217,7 +3220,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
       if (ty == Ity_I8 || ty == Ity_I16) {
          HReg r = iselIntExpr_R(env, stmt->Ist.Put.data);
          addInstr(env, X86Instr_Store(
-                          ty==Ity_I8 ? 1 : 2,
+                          toUChar(ty==Ity_I8 ? 1 : 2),
                           r,
                           X86AMode_IR(stmt->Ist.Put.offset,
                                       hregX86_EBP())));
@@ -3337,7 +3340,8 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
 
       if (d->nFxState == 0)
          vassert(!d->needsBBP);
-      passBBP = d->nFxState > 0 && d->needsBBP;
+
+      passBBP = toBool(d->nFxState > 0 && d->needsBBP);
 
       /* Marshal args, do the call, clear stack. */
       doHelperCall( env, passBBP, d->guard, d->cee, d->args );