clk: sunxi: a523: add MBUS_EMAC1 clock gate

The Allwinner sun55i (A523/A527/T527) platform requires the MBUS clock
gate enabled for the gmac1 controller to function. Add the clock gate
definition for CLK_MBUS_EMAC1.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

diff --git a/drivers/clk/sunxi/clk_a523.c b/drivers/clk/sunxi/clk_a523.c
index 1de95fbaf2f6c856dd244f18faf5783832b3b7ed..494ee19559952d4d392eda508762ade24caaf5fc 100644 (file)
--- a/drivers/clk/sunxi/clk_a523.c
+++ b/drivers/clk/sunxi/clk_a523.c
@@ -16,6 +16,7 @@ static struct ccu_clk_gate a523_gates[] = {
        [CLK_PLL_PERIPH0_200M]  = GATE_DUMMY,
        [CLK_APB1]              = GATE_DUMMY,
 
+       [CLK_MBUS_EMAC1]        = GATE(0x804, BIT(12)),
        [CLK_BUS_MMC0]          = GATE(0x84c, BIT(0)),
        [CLK_BUS_MMC1]          = GATE(0x84c, BIT(1)),
        [CLK_BUS_MMC2]          = GATE(0x84c, BIT(2)),