value = prev = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~(AMD_CPPC_MAX_PERF_MASK | AMD_CPPC_MIN_PERF_MASK |
- AMD_CPPC_DES_PERF_MASK | AMD_CPPC_EPP_PERF_MASK);
- value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf);
- value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, des_perf);
- value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf);
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_MAX_PERF_MASK, &value, max_perf);
+ FIELD_MODIFY(AMD_CPPC_DES_PERF_MASK, &value, des_perf);
+ FIELD_MODIFY(AMD_CPPC_MIN_PERF_MASK, &value, min_perf);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
if (trace_amd_pstate_epp_perf_enabled()) {
union perf_cached perf = READ_ONCE(cpudata->perf);
int ret;
value = prev = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~AMD_CPPC_EPP_PERF_MASK;
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
if (trace_amd_pstate_epp_perf_enabled()) {
union perf_cached perf = cpudata->perf;
}
value = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~AMD_CPPC_EPP_PERF_MASK;
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
WRITE_ONCE(cpudata->cppc_req_cached, value);
return ret;
value = prev = READ_ONCE(cpudata->cppc_req_cached);
- value &= ~(AMD_CPPC_MAX_PERF_MASK | AMD_CPPC_MIN_PERF_MASK |
- AMD_CPPC_DES_PERF_MASK | AMD_CPPC_EPP_PERF_MASK);
- value |= FIELD_PREP(AMD_CPPC_MAX_PERF_MASK, max_perf);
- value |= FIELD_PREP(AMD_CPPC_DES_PERF_MASK, des_perf);
- value |= FIELD_PREP(AMD_CPPC_MIN_PERF_MASK, min_perf);
- value |= FIELD_PREP(AMD_CPPC_EPP_PERF_MASK, epp);
+ FIELD_MODIFY(AMD_CPPC_MAX_PERF_MASK, &value, max_perf);
+ FIELD_MODIFY(AMD_CPPC_DES_PERF_MASK, &value, des_perf);
+ FIELD_MODIFY(AMD_CPPC_MIN_PERF_MASK, &value, min_perf);
+ FIELD_MODIFY(AMD_CPPC_EPP_PERF_MASK, &value, epp);
if (trace_amd_pstate_epp_perf_enabled()) {
union perf_cached perf = READ_ONCE(cpudata->perf);