arm64: dts: qcom: x1e80100: Add missing TCSR ref clock to the DP PHYs

The DP PHYs on X1E80100 need the ref clock which is provided by the
TCSR CC.

The current X Elite devices supported upstream work fine without this
clock, because the boot firmware leaves this clock enabled. But we should
not rely on that. Also, even though this change breaks the ABI, it is
needed in order to make the driver disables this clock along with the
other ones, for a proper bring-down of the entire PHY.

So lets attach it to each of the DP PHYs in order to do that.

Cc: stable@vger.kernel.org # v6.9
Fixes: 1940c25eaa63 ("arm64: dts: qcom: x1e80100: Add display nodes")
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20251224-phy-qcom-edp-add-missing-refclk-v5-3-3f45d349b5ac@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/hamoa.dtsi b/arch/arm64/boot/dts/qcom/hamoa.dtsi
index 51ad2b2e6375f1642f281c52af048e7ba77c4c25..03629639dcfb60284a013b5ae1d75a03339ea679 100644 (file)
--- a/arch/arm64/boot/dts/qcom/hamoa.dtsi
+++ b/arch/arm64/boot/dts/qcom/hamoa.dtsi
@@ -5929,9 +5929,11 @@
                              <0 0x0aec2000 0 0x1c8>;
 
                        clocks = <&dispcc DISP_CC_MDSS_DPTX2_AUX_CLK>,
-                                <&dispcc DISP_CC_MDSS_AHB_CLK>;
+                                <&dispcc DISP_CC_MDSS_AHB_CLK>,
+                                <&tcsr TCSR_EDP_CLKREF_EN>;
                        clock-names = "aux",
-                                     "cfg_ahb";
+                                     "cfg_ahb",
+                                     "ref";
 
                        power-domains = <&rpmhpd RPMHPD_MX>;
 
@@ -5949,9 +5951,11 @@
                              <0 0x0aec5000 0 0x1c8>;
 
                        clocks = <&dispcc DISP_CC_MDSS_DPTX3_AUX_CLK>,
-                                <&dispcc DISP_CC_MDSS_AHB_CLK>;
+                                <&dispcc DISP_CC_MDSS_AHB_CLK>,
+                                <&tcsr TCSR_EDP_CLKREF_EN>;
                        clock-names = "aux",
-                                     "cfg_ahb";
+                                     "cfg_ahb",
+                                     "ref";
 
                        power-domains = <&rpmhpd RPMHPD_MX>;