--- /dev/null
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin guest_s390_toIR.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm and Christian Borntraeger */
+
+/* Translates s390 code to IR. */
+
+#include "libvex_basictypes.h"
+#include "libvex_ir.h"
+#include "libvex_guest_s390x.h" /* VexGuestS390XState */
+#include "libvex.h" /* needed for bb_to_IR.h */
+#include "libvex_guest_offsets.h" /* OFFSET_s390x_SYSNO */
+
+#include "main_util.h" /* vassert */
+#include "main_globals.h" /* vex_traceflags */
+#include "guest_generic_bb_to_IR.h" /* DisResult */
+#include "guest_s390_defs.h" /* prototypes for this file's functions */
+#include "host_s390_disasm.h"
+#include "host_s390_defs.h" /* S390_ROUND_xyzzy */
+
+#undef likely
+#undef unlikely
+#define likely(x) __builtin_expect(!!(x), 1)
+#define unlikely(x) __builtin_expect(!!(x), 0)
+
+
+
+/*------------------------------------------------------------*/
+/*--- Globals ---*/
+/*------------------------------------------------------------*/
+
+/* The IRSB* into which we're generating code. */
+static IRSB *irsb;
+
+/* The guest address for the instruction currently being
+ translated. */
+static Addr64 guest_IA_curr_instr;
+
+/* The guest address for the instruction following the current instruction. */
+static Addr64 guest_IA_next_instr;
+
+/* Result of disassembly step. */
+static DisResult *dis_res;
+
+/* The last seen execute target instruction */
+ULong last_execute_target;
+
+/* The possible outcomes of a decoding operation */
+typedef enum {
+ S390_DECODE_OK,
+ S390_DECODE_UNKNOWN_INSN,
+ S390_DECODE_UNIMPLEMENTED_INSN,
+ S390_DECODE_UNKNOWN_SPECIAL_INSN,
+ S390_DECODE_ERROR
+} s390_decode_t;
+
+/*------------------------------------------------------------*/
+/*--- Helpers for constructing IR. ---*/
+/*------------------------------------------------------------*/
+
+/* Sign extend a value with the given number of bits. This is a
+ macro because it allows us to overload the type of the value.
+ Note that VALUE must have a signed type! */
+#undef sign_extend
+#define sign_extend(value,num_bits) \
+(((value) << (sizeof(__typeof__(value)) * 8 - (num_bits))) >> \
+ (sizeof(__typeof__(value)) * 8 - (num_bits)))
+
+
+/* Add a statement to the current irsb. */
+static __inline__ void
+stmt(IRStmt *st)
+{
+ addStmtToIRSB(irsb, st);
+}
+
+/* Allocate a new temporary of the given type. */
+static __inline__ IRTemp
+newTemp(IRType type)
+{
+ vassert(isPlausibleIRType(type));
+
+ return newIRTemp(irsb->tyenv, type);
+}
+
+/* Create an expression node for a temporary */
+static __inline__ IRExpr *
+mkexpr(IRTemp tmp)
+{
+ return IRExpr_RdTmp(tmp);
+}
+
+/* Add a statement that assigns to a temporary */
+static __inline__ void
+assign(IRTemp dst, IRExpr *expr)
+{
+ stmt(IRStmt_WrTmp(dst, expr));
+}
+
+/* Create a temporary of the given type and assign the expression to it */
+static __inline__ IRTemp
+mktemp(IRType type, IRExpr *expr)
+{
+ IRTemp temp = newTemp(type);
+
+ assign(temp, expr);
+
+ return temp;
+}
+
+/* Create a unary expression */
+static __inline__ IRExpr *
+unop(IROp kind, IRExpr *op)
+{
+ return IRExpr_Unop(kind, op);
+}
+
+/* Create a binary expression */
+static __inline__ IRExpr *
+binop(IROp kind, IRExpr *op1, IRExpr *op2)
+{
+ return IRExpr_Binop(kind, op1, op2);
+}
+
+/* Create a ternary expression */
+static __inline__ IRExpr *
+triop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3)
+{
+ return IRExpr_Triop(kind, op1, op2, op3);
+}
+
+/* Create a quaternary expression */
+static __inline__ IRExpr *
+qop(IROp kind, IRExpr *op1, IRExpr *op2, IRExpr *op3, IRExpr *op4)
+{
+ return IRExpr_Qop(kind, op1, op2, op3, op4);
+}
+
+/* Create an expression node for an 8-bit integer constant */
+static __inline__ IRExpr *
+mkU8(UInt value)
+{
+ vassert(value < 256);
+
+ return IRExpr_Const(IRConst_U8((UChar)value));
+}
+
+/* Create an expression node for a 16-bit integer constant */
+static __inline__ IRExpr *
+mkU16(UInt value)
+{
+ vassert(value < 65536);
+
+ return IRExpr_Const(IRConst_U16((UShort)value));
+}
+
+/* Create an expression node for a 32-bit integer constant */
+static __inline__ IRExpr *
+mkU32(UInt value)
+{
+ return IRExpr_Const(IRConst_U32(value));
+}
+
+/* Create an expression node for a 64-bit integer constant */
+static __inline__ IRExpr *
+mkU64(ULong value)
+{
+ return IRExpr_Const(IRConst_U64(value));
+}
+
+/* Create an expression node for a 32-bit floating point constant
+ whose value is given by a bit pattern. */
+static __inline__ IRExpr *
+mkF32i(UInt value)
+{
+ return IRExpr_Const(IRConst_F32i(value));
+}
+
+/* Create an expression node for a 32-bit floating point constant
+ whose value is given by a bit pattern. */
+static __inline__ IRExpr *
+mkF64i(ULong value)
+{
+ return IRExpr_Const(IRConst_F64i(value));
+}
+
+/* Little helper function for my sanity. ITE = if-then-else */
+static IRExpr *
+mkite(IRExpr *condition, IRExpr *iftrue, IRExpr *iffalse)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
+
+ return IRExpr_Mux0X(unop(Iop_1Uto8, condition), iffalse, iftrue);
+}
+
+/* Add a statement that stores DATA at ADDR. This is a big-endian machine. */
+static void __inline__
+store(IRExpr *addr, IRExpr *data)
+{
+ stmt(IRStmt_Store(Iend_BE, addr, data));
+}
+
+/* Create an expression that loads a TYPE sized value from ADDR.
+ This is a big-endian machine. */
+static __inline__ IRExpr *
+load(IRType type, IRExpr *addr)
+{
+ return IRExpr_Load(Iend_BE, type, addr);
+}
+
+/* Function call */
+static void
+call_function(IRExpr *callee_address)
+{
+ irsb->next = callee_address;
+ irsb->jumpkind = Ijk_Call;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* Function return sequence */
+static void
+return_from_function(IRExpr *return_address)
+{
+ irsb->next = return_address;
+ irsb->jumpkind = Ijk_Ret;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* A conditional branch whose target is not known at instrumentation time.
+
+ if (condition) goto computed_target;
+
+ Needs to be represented as:
+
+ if (! condition) goto next_instruction;
+ goto computed_target;
+
+ This inversion is being handled at code generation time. So we just
+ take the condition here as is.
+*/
+static void
+if_not_condition_goto_computed(IRExpr *condition, IRExpr *target)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
+
+ stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(guest_IA_next_instr)));
+
+ irsb->next = target;
+ irsb->jumpkind = Ijk_Boring;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* A conditional branch whose target is known at instrumentation time. */
+static void
+if_condition_goto(IRExpr *condition, Addr64 target)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, condition) == Ity_I1);
+
+ stmt(IRStmt_Exit(condition, Ijk_Boring, IRConst_U64(target)));
+ dis_res->whatNext = Dis_Continue;
+}
+
+/* An unconditional branch. Target may or may not be known at instrumentation
+ time. */
+static void
+always_goto(IRExpr *target)
+{
+ irsb->next = target;
+ irsb->jumpkind = Ijk_Boring;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* A system call */
+static void
+system_call(IRExpr *sysno)
+{
+ /* Store the system call number in the pseudo register. */
+ stmt(IRStmt_Put(OFFSET_s390x_SYSNO, sysno));
+
+ /* Store the current IA into guest_IP_AT_SYSCALL. libvex_ir.h says so.
+ fixs390: As we do not use it, can we get rid of it ?? */
+ stmt(IRStmt_Put(OFFSET_s390x_IP_AT_SYSCALL, mkU64(guest_IA_curr_instr)));
+
+ /* It's important that all ArchRegs carry their up-to-date value
+ at this point. So we declare an end-of-block here, which
+ forces any TempRegs caching ArchRegs to be flushed. */
+ irsb->next = mkU64(guest_IA_next_instr);
+
+ irsb->jumpkind = Ijk_Sys_syscall;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* Encode the s390 rounding mode as it appears in the m3/m4 fields of certain
+ instructions to VEX's IRRoundingMode. */
+static IRRoundingMode
+encode_rounding_mode(UChar mode)
+{
+ switch (mode) {
+ case S390_ROUND_NEAREST_EVEN: return Irrm_NEAREST;
+ case S390_ROUND_ZERO: return Irrm_ZERO;
+ case S390_ROUND_POSINF: return Irrm_PosINF;
+ case S390_ROUND_NEGINF: return Irrm_NegINF;
+ }
+ vpanic("encode_rounding_mode");
+}
+
+static __inline__ IRExpr *get_fpr_dw0(UInt);
+static __inline__ void put_fpr_dw0(UInt, IRExpr *);
+
+/* Read a floating point register pair and combine their contents into a
+ 128-bit value */
+static IRExpr *
+get_fpr_pair(UInt archreg)
+{
+ IRExpr *high = get_fpr_dw0(archreg);
+ IRExpr *low = get_fpr_dw0(archreg + 2);
+
+ return binop(Iop_F64HLtoF128, high, low);
+}
+
+/* Write a 128-bit floating point value into a register pair. */
+static void
+put_fpr_pair(UInt archreg, IRExpr *expr)
+{
+ IRExpr *high = unop(Iop_F128HItoF64, expr);
+ IRExpr *low = unop(Iop_F128LOtoF64, expr);
+
+ put_fpr_dw0(archreg, high);
+ put_fpr_dw0(archreg + 2, low);
+}
+
+
+/* Flags thunk offsets */
+#define S390X_GUEST_OFFSET_CC_OP S390_GUEST_OFFSET(guest_CC_OP)
+#define S390X_GUEST_OFFSET_CC_DEP1 S390_GUEST_OFFSET(guest_CC_DEP1)
+#define S390X_GUEST_OFFSET_CC_DEP2 S390_GUEST_OFFSET(guest_CC_DEP2)
+#define S390X_GUEST_OFFSET_CC_NDEP S390_GUEST_OFFSET(guest_CC_NDEP)
+
+/*------------------------------------------------------------*/
+/*--- Build the flags thunk. ---*/
+/*------------------------------------------------------------*/
+
+/* Completely fill the flags thunk. We're always filling all fields.
+ Apparently, that is better for redundant PUT elimination. */
+static void
+s390_cc_thunk_fill(IRExpr *op, IRExpr *dep1, IRExpr *dep2, IRExpr *ndep)
+{
+ UInt op_off, dep1_off, dep2_off, ndep_off;
+
+ op_off = S390X_GUEST_OFFSET_CC_OP;
+ dep1_off = S390X_GUEST_OFFSET_CC_DEP1;
+ dep2_off = S390X_GUEST_OFFSET_CC_DEP2;
+ ndep_off = S390X_GUEST_OFFSET_CC_NDEP;
+
+ stmt(IRStmt_Put(op_off, op));
+ stmt(IRStmt_Put(dep1_off, dep1));
+ stmt(IRStmt_Put(dep2_off, dep2));
+ stmt(IRStmt_Put(ndep_off, ndep));
+}
+
+
+/* Create an expression for V and widen the result to 64 bit. */
+static IRExpr *
+s390_cc_widen(IRTemp v, Bool sign_extend)
+{
+ IRExpr *expr;
+
+ expr = mkexpr(v);
+
+ switch (typeOfIRTemp(irsb->tyenv, v)) {
+ case Ity_I64:
+ break;
+ case Ity_I32:
+ expr = unop(sign_extend ? Iop_32Sto64 : Iop_32Uto64, expr);
+ break;
+ case Ity_I16:
+ expr = unop(sign_extend ? Iop_16Sto64 : Iop_16Uto64, expr);
+ break;
+ case Ity_I8:
+ expr = unop(sign_extend ? Iop_8Sto64 : Iop_8Uto64, expr);
+ break;
+ default:
+ vpanic("s390_cc_widen");
+ }
+
+ return expr;
+}
+
+static void
+s390_cc_thunk_put1(UInt opc, IRTemp d1, Bool sign_extend)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(d1, sign_extend);
+ dep2 = mkU64(0);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+static void
+s390_cc_thunk_put2(UInt opc, IRTemp d1, IRTemp d2, Bool sign_extend)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(d1, sign_extend);
+ dep2 = s390_cc_widen(d2, sign_extend);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+/* memcheck believes that the NDEP field in the flags thunk is always
+ defined. But for some flag computations (e.g. add with carry) that is
+ just not true. We therefore need to convey to memcheck that the value
+ of the ndep field does matter and therefore we make the DEP2 field
+ depend on it:
+
+ DEP2 = original_DEP2 ^ NDEP
+
+ In s390_calculate_cc we exploit that (a^b)^b == a
+ I.e. we xor the DEP2 value with the NDEP value to recover the
+ original_DEP2 value. */
+static void
+s390_cc_thunk_put3(UInt opc, IRTemp d1, IRTemp d2, IRTemp nd, Bool sign_extend)
+{
+ IRExpr *op, *dep1, *dep2, *ndep, *dep2x;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(d1, sign_extend);
+ dep2 = s390_cc_widen(d2, sign_extend);
+ ndep = s390_cc_widen(nd, sign_extend);
+
+ dep2x = binop(Iop_Xor64, dep2, ndep);
+
+ s390_cc_thunk_fill(op, dep1, dep2x, ndep);
+}
+
+
+/* Write one floating point value into the flags thunk */
+static void
+s390_cc_thunk_put1f(UInt opc, IRTemp d1)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = mkexpr(d1);
+ dep2 = mkU64(0);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+/* Write a floating point value and an integer into the flags thunk. The
+ integer value is zero-extended first. */
+static void
+s390_cc_thunk_putFZ(UInt opc, IRTemp d1, IRTemp d2)
+{
+ IRExpr *op, *dep1, *dep2, *ndep;
+
+ op = mkU64(opc);
+ dep1 = mkexpr(d1);
+ dep2 = s390_cc_widen(d2, False);
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, dep1, dep2, ndep);
+}
+
+
+/* Write a 128-bit floating point value into the flags thunk. This is
+ done by splitting the value into two 64-bits values. */
+static void
+s390_cc_thunk_put1f128(UInt opc, IRTemp d1)
+{
+ IRExpr *op, *hi, *lo, *ndep;
+
+ op = mkU64(opc);
+ hi = unop(Iop_F128HItoF64, mkexpr(d1));
+ lo = unop(Iop_F128LOtoF64, mkexpr(d1));
+ ndep = mkU64(0);
+
+ s390_cc_thunk_fill(op, hi, lo, ndep);
+}
+
+
+/* Write a 128-bit floating point value and an integer into the flags thunk.
+ The integer value is zero-extended first. */
+static void
+s390_cc_thunk_put1f128Z(UInt opc, IRTemp d1, IRTemp nd)
+{
+ IRExpr *op, *hi, *lo, *lox, *ndep;
+
+ op = mkU64(opc);
+ hi = unop(Iop_F128HItoF64, mkexpr(d1));
+ lo = unop(Iop_ReinterpF64asI64, unop(Iop_F128LOtoF64, mkexpr(d1)));
+ ndep = s390_cc_widen(nd, False);
+
+ lox = binop(Iop_Xor64, lo, ndep); /* convey dependency */
+
+ s390_cc_thunk_fill(op, hi, lox, ndep);
+}
+
+
+static void
+s390_cc_set(UInt val)
+{
+ s390_cc_thunk_fill(mkU64(S390_CC_OP_SET),
+ mkU64(val), mkU64(0), mkU64(0));
+}
+
+/* Build IR to calculate the condition code from flags thunk.
+ Returns an expression of type Ity_I32 */
+static IRExpr *
+s390_call_calculate_cc(void)
+{
+ IRExpr **args, *call, *op, *dep1, *dep2, *ndep;
+
+ op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
+ dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
+ dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
+ ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
+
+ args = mkIRExprVec_4(op, dep1, dep2, ndep);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_calculate_cc", &s390_calculate_cc, args);
+
+ /* Exclude OP and NDEP from definedness checking. We're only
+ interested in DEP1 and DEP2. */
+ call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<3);
+
+ return call;
+}
+
+/* Build IR to calculate the internal condition code for a "compare and branch"
+ insn. Returns an expression of type Ity_I32 */
+static IRExpr *
+s390_call_calculate_icc(UInt opc, IRTemp op1, IRTemp op2, Bool sign_extend)
+{
+ IRExpr **args, *call, *op, *dep1, *dep2;
+
+ op = mkU64(opc);
+ dep1 = s390_cc_widen(op1, sign_extend);
+ dep2 = s390_cc_widen(op2, sign_extend);
+
+ args = mkIRExprVec_3(op, dep1, dep2);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_calculate_icc", &s390_calculate_icc, args);
+
+ /* Exclude OP from definedness checking. We're only
+ interested in DEP1 and DEP2. */
+ call->Iex.CCall.cee->mcx_mask = (1<<0);
+
+ return call;
+}
+
+/* Build IR to calculate the condition code from flags thunk.
+ Returns an expression of type Ity_I32 */
+static IRExpr *
+s390_call_calculate_cond(UInt m)
+{
+ IRExpr **args, *call, *op, *dep1, *dep2, *ndep, *mask;
+
+ mask = mkU64(m);
+ op = IRExpr_Get(S390X_GUEST_OFFSET_CC_OP, Ity_I64);
+ dep1 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP1, Ity_I64);
+ dep2 = IRExpr_Get(S390X_GUEST_OFFSET_CC_DEP2, Ity_I64);
+ ndep = IRExpr_Get(S390X_GUEST_OFFSET_CC_NDEP, Ity_I64);
+
+ args = mkIRExprVec_5(mask, op, dep1, dep2, ndep);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_calculate_cond", &s390_calculate_cond, args);
+
+ /* Exclude the requested condition, OP and NDEP from definedness
+ checking. We're only interested in DEP1 and DEP2. */
+ call->Iex.CCall.cee->mcx_mask = (1<<0) | (1<<1) | (1<<4);
+
+ return call;
+}
+
+#define s390_cc_thunk_putZ(op,dep1) s390_cc_thunk_put1(op,dep1,False)
+#define s390_cc_thunk_putS(op,dep1) s390_cc_thunk_put1(op,dep1,True)
+#define s390_cc_thunk_putF(op,dep1) s390_cc_thunk_put1f(op,dep1)
+#define s390_cc_thunk_putZZ(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,False)
+#define s390_cc_thunk_putSS(op,dep1,dep2) s390_cc_thunk_put2(op,dep1,dep2,True)
+#define s390_cc_thunk_putFF(op,dep1,dep2) s390_cc_thunk_put2f(op,dep1,dep2)
+#define s390_cc_thunk_putZZZ(op,dep1,dep2,ndep) \
+ s390_cc_thunk_put3(op,dep1,dep2,ndep,False)
+#define s390_cc_thunk_putSSS(op,dep1,dep2,ndep) \
+ s390_cc_thunk_put3(op,dep1,dep2,ndep,True)
+#define s390_call_calculate_iccZZ(op,dep1,dep2) \
+ s390_call_calculate_icc(op,dep1,dep2,False)
+#define s390_call_calculate_iccSS(op,dep1,dep2) \
+ s390_call_calculate_icc(op,dep1,dep2,True)
+
+
+#define OFFB_TISTART offsetof(VexGuestS390XState, guest_TISTART)
+#define OFFB_TILEN offsetof(VexGuestS390XState, guest_TILEN)
+
+
+/*------------------------------------------------------------*/
+/*--- Guest register access ---*/
+/*------------------------------------------------------------*/
+
+
+/*------------------------------------------------------------*/
+/*--- ar registers ---*/
+/*------------------------------------------------------------*/
+
+/* Return the guest state offset of a ar register. */
+static UInt
+ar_offset(UInt archreg)
+{
+ static const UInt offset[16] = {
+ offsetof(VexGuestS390XState, guest_a0),
+ offsetof(VexGuestS390XState, guest_a1),
+ offsetof(VexGuestS390XState, guest_a2),
+ offsetof(VexGuestS390XState, guest_a3),
+ offsetof(VexGuestS390XState, guest_a4),
+ offsetof(VexGuestS390XState, guest_a5),
+ offsetof(VexGuestS390XState, guest_a6),
+ offsetof(VexGuestS390XState, guest_a7),
+ offsetof(VexGuestS390XState, guest_a8),
+ offsetof(VexGuestS390XState, guest_a9),
+ offsetof(VexGuestS390XState, guest_a10),
+ offsetof(VexGuestS390XState, guest_a11),
+ offsetof(VexGuestS390XState, guest_a12),
+ offsetof(VexGuestS390XState, guest_a13),
+ offsetof(VexGuestS390XState, guest_a14),
+ offsetof(VexGuestS390XState, guest_a15),
+ };
+
+ vassert(archreg < 16);
+
+ return offset[archreg];
+}
+
+
+/* Return the guest state offset of word #0 of a ar register. */
+static __inline__ UInt
+ar_w0_offset(UInt archreg)
+{
+ return ar_offset(archreg) + 0;
+}
+
+/* Write word #0 of a ar to the guest state. */
+static __inline__ void
+put_ar_w0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(ar_w0_offset(archreg), expr));
+}
+
+/* Read word #0 of a ar register. */
+static __inline__ IRExpr *
+get_ar_w0(UInt archreg)
+{
+ return IRExpr_Get(ar_w0_offset(archreg), Ity_I32);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- fpr registers ---*/
+/*------------------------------------------------------------*/
+
+/* Return the guest state offset of a fpr register. */
+static UInt
+fpr_offset(UInt archreg)
+{
+ static const UInt offset[16] = {
+ offsetof(VexGuestS390XState, guest_f0),
+ offsetof(VexGuestS390XState, guest_f1),
+ offsetof(VexGuestS390XState, guest_f2),
+ offsetof(VexGuestS390XState, guest_f3),
+ offsetof(VexGuestS390XState, guest_f4),
+ offsetof(VexGuestS390XState, guest_f5),
+ offsetof(VexGuestS390XState, guest_f6),
+ offsetof(VexGuestS390XState, guest_f7),
+ offsetof(VexGuestS390XState, guest_f8),
+ offsetof(VexGuestS390XState, guest_f9),
+ offsetof(VexGuestS390XState, guest_f10),
+ offsetof(VexGuestS390XState, guest_f11),
+ offsetof(VexGuestS390XState, guest_f12),
+ offsetof(VexGuestS390XState, guest_f13),
+ offsetof(VexGuestS390XState, guest_f14),
+ offsetof(VexGuestS390XState, guest_f15),
+ };
+
+ vassert(archreg < 16);
+
+ return offset[archreg];
+}
+
+
+/* Return the guest state offset of word #0 of a fpr register. */
+static __inline__ UInt
+fpr_w0_offset(UInt archreg)
+{
+ return fpr_offset(archreg) + 0;
+}
+
+/* Write word #0 of a fpr to the guest state. */
+static __inline__ void
+put_fpr_w0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F32);
+
+ stmt(IRStmt_Put(fpr_w0_offset(archreg), expr));
+}
+
+/* Read word #0 of a fpr register. */
+static __inline__ IRExpr *
+get_fpr_w0(UInt archreg)
+{
+ return IRExpr_Get(fpr_w0_offset(archreg), Ity_F32);
+}
+
+/* Return the guest state offset of double word #0 of a fpr register. */
+static __inline__ UInt
+fpr_dw0_offset(UInt archreg)
+{
+ return fpr_offset(archreg) + 0;
+}
+
+/* Write double word #0 of a fpr to the guest state. */
+static __inline__ void
+put_fpr_dw0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_F64);
+
+ stmt(IRStmt_Put(fpr_dw0_offset(archreg), expr));
+}
+
+/* Read double word #0 of a fpr register. */
+static __inline__ IRExpr *
+get_fpr_dw0(UInt archreg)
+{
+ return IRExpr_Get(fpr_dw0_offset(archreg), Ity_F64);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- gpr registers ---*/
+/*------------------------------------------------------------*/
+
+/* Return the guest state offset of a gpr register. */
+static UInt
+gpr_offset(UInt archreg)
+{
+ static const UInt offset[16] = {
+ offsetof(VexGuestS390XState, guest_r0),
+ offsetof(VexGuestS390XState, guest_r1),
+ offsetof(VexGuestS390XState, guest_r2),
+ offsetof(VexGuestS390XState, guest_r3),
+ offsetof(VexGuestS390XState, guest_r4),
+ offsetof(VexGuestS390XState, guest_r5),
+ offsetof(VexGuestS390XState, guest_r6),
+ offsetof(VexGuestS390XState, guest_r7),
+ offsetof(VexGuestS390XState, guest_r8),
+ offsetof(VexGuestS390XState, guest_r9),
+ offsetof(VexGuestS390XState, guest_r10),
+ offsetof(VexGuestS390XState, guest_r11),
+ offsetof(VexGuestS390XState, guest_r12),
+ offsetof(VexGuestS390XState, guest_r13),
+ offsetof(VexGuestS390XState, guest_r14),
+ offsetof(VexGuestS390XState, guest_r15),
+ };
+
+ vassert(archreg < 16);
+
+ return offset[archreg];
+}
+
+
+/* Return the guest state offset of word #0 of a gpr register. */
+static __inline__ UInt
+gpr_w0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write word #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_w0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(gpr_w0_offset(archreg), expr));
+}
+
+/* Read word #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_w0(UInt archreg)
+{
+ return IRExpr_Get(gpr_w0_offset(archreg), Ity_I32);
+}
+
+/* Return the guest state offset of double word #0 of a gpr register. */
+static __inline__ UInt
+gpr_dw0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write double word #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_dw0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
+
+ stmt(IRStmt_Put(gpr_dw0_offset(archreg), expr));
+}
+
+/* Read double word #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_dw0(UInt archreg)
+{
+ return IRExpr_Get(gpr_dw0_offset(archreg), Ity_I64);
+}
+
+/* Return the guest state offset of half word #1 of a gpr register. */
+static __inline__ UInt
+gpr_hw1_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 2;
+}
+
+/* Write half word #1 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw1(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw1_offset(archreg), expr));
+}
+
+/* Read half word #1 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw1(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw1_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #6 of a gpr register. */
+static __inline__ UInt
+gpr_b6_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 6;
+}
+
+/* Write byte #6 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b6(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b6_offset(archreg), expr));
+}
+
+/* Read byte #6 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b6(UInt archreg)
+{
+ return IRExpr_Get(gpr_b6_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #3 of a gpr register. */
+static __inline__ UInt
+gpr_b3_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 3;
+}
+
+/* Write byte #3 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b3(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b3_offset(archreg), expr));
+}
+
+/* Read byte #3 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b3(UInt archreg)
+{
+ return IRExpr_Get(gpr_b3_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #0 of a gpr register. */
+static __inline__ UInt
+gpr_b0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write byte #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b0_offset(archreg), expr));
+}
+
+/* Read byte #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b0(UInt archreg)
+{
+ return IRExpr_Get(gpr_b0_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of word #1 of a gpr register. */
+static __inline__ UInt
+gpr_w1_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 4;
+}
+
+/* Write word #1 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_w1(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(gpr_w1_offset(archreg), expr));
+}
+
+/* Read word #1 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_w1(UInt archreg)
+{
+ return IRExpr_Get(gpr_w1_offset(archreg), Ity_I32);
+}
+
+/* Return the guest state offset of half word #3 of a gpr register. */
+static __inline__ UInt
+gpr_hw3_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 6;
+}
+
+/* Write half word #3 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw3(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw3_offset(archreg), expr));
+}
+
+/* Read half word #3 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw3(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw3_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #7 of a gpr register. */
+static __inline__ UInt
+gpr_b7_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 7;
+}
+
+/* Write byte #7 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b7(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b7_offset(archreg), expr));
+}
+
+/* Read byte #7 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b7(UInt archreg)
+{
+ return IRExpr_Get(gpr_b7_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of half word #0 of a gpr register. */
+static __inline__ UInt
+gpr_hw0_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 0;
+}
+
+/* Write half word #0 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw0(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw0_offset(archreg), expr));
+}
+
+/* Read half word #0 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw0(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw0_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #4 of a gpr register. */
+static __inline__ UInt
+gpr_b4_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 4;
+}
+
+/* Write byte #4 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b4(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b4_offset(archreg), expr));
+}
+
+/* Read byte #4 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b4(UInt archreg)
+{
+ return IRExpr_Get(gpr_b4_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #1 of a gpr register. */
+static __inline__ UInt
+gpr_b1_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 1;
+}
+
+/* Write byte #1 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b1(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b1_offset(archreg), expr));
+}
+
+/* Read byte #1 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b1(UInt archreg)
+{
+ return IRExpr_Get(gpr_b1_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of half word #2 of a gpr register. */
+static __inline__ UInt
+gpr_hw2_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 4;
+}
+
+/* Write half word #2 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_hw2(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I16);
+
+ stmt(IRStmt_Put(gpr_hw2_offset(archreg), expr));
+}
+
+/* Read half word #2 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_hw2(UInt archreg)
+{
+ return IRExpr_Get(gpr_hw2_offset(archreg), Ity_I16);
+}
+
+/* Return the guest state offset of byte #5 of a gpr register. */
+static __inline__ UInt
+gpr_b5_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 5;
+}
+
+/* Write byte #5 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b5(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b5_offset(archreg), expr));
+}
+
+/* Read byte #5 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b5(UInt archreg)
+{
+ return IRExpr_Get(gpr_b5_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of byte #2 of a gpr register. */
+static __inline__ UInt
+gpr_b2_offset(UInt archreg)
+{
+ return gpr_offset(archreg) + 2;
+}
+
+/* Write byte #2 of a gpr to the guest state. */
+static __inline__ void
+put_gpr_b2(UInt archreg, IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I8);
+
+ stmt(IRStmt_Put(gpr_b2_offset(archreg), expr));
+}
+
+/* Read byte #2 of a gpr register. */
+static __inline__ IRExpr *
+get_gpr_b2(UInt archreg)
+{
+ return IRExpr_Get(gpr_b2_offset(archreg), Ity_I8);
+}
+
+/* Return the guest state offset of the counter register. */
+static UInt
+counter_offset(void)
+{
+ return offsetof(VexGuestS390XState, guest_counter);
+}
+
+/* Return the guest state offset of double word #0 of the counter register. */
+static __inline__ UInt
+counter_dw0_offset(void)
+{
+ return counter_offset() + 0;
+}
+
+/* Write double word #0 of the counter to the guest state. */
+static __inline__ void
+put_counter_dw0(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I64);
+
+ stmt(IRStmt_Put(counter_dw0_offset(), expr));
+}
+
+/* Read double word #0 of the counter register. */
+static __inline__ IRExpr *
+get_counter_dw0(void)
+{
+ return IRExpr_Get(counter_dw0_offset(), Ity_I64);
+}
+
+/* Return the guest state offset of word #0 of the counter register. */
+static __inline__ UInt
+counter_w0_offset(void)
+{
+ return counter_offset() + 0;
+}
+
+/* Return the guest state offset of word #1 of the counter register. */
+static __inline__ UInt
+counter_w1_offset(void)
+{
+ return counter_offset() + 4;
+}
+
+/* Write word #0 of the counter to the guest state. */
+static __inline__ void
+put_counter_w0(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(counter_w0_offset(), expr));
+}
+
+/* Read word #0 of the counter register. */
+static __inline__ IRExpr *
+get_counter_w0(void)
+{
+ return IRExpr_Get(counter_w0_offset(), Ity_I32);
+}
+
+/* Write word #1 of the counter to the guest state. */
+static __inline__ void
+put_counter_w1(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(counter_w1_offset(), expr));
+}
+
+/* Read word #1 of the counter register. */
+static __inline__ IRExpr *
+get_counter_w1(void)
+{
+ return IRExpr_Get(counter_w1_offset(), Ity_I32);
+}
+
+/* Return the guest state offset of the fpc register. */
+static UInt
+fpc_offset(void)
+{
+ return offsetof(VexGuestS390XState, guest_fpc);
+}
+
+/* Return the guest state offset of word #0 of the fpc register. */
+static __inline__ UInt
+fpc_w0_offset(void)
+{
+ return fpc_offset() + 0;
+}
+
+/* Write word #0 of the fpc to the guest state. */
+static __inline__ void
+put_fpc_w0(IRExpr *expr)
+{
+ vassert(typeOfIRExpr(irsb->tyenv, expr) == Ity_I32);
+
+ stmt(IRStmt_Put(fpc_w0_offset(), expr));
+}
+
+/* Read word #0 of the fpc register. */
+static __inline__ IRExpr *
+get_fpc_w0(void)
+{
+ return IRExpr_Get(fpc_w0_offset(), Ity_I32);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Build IR for formats ---*/
+/*------------------------------------------------------------*/
+static void
+s390_format_I(HChar *(*irgen)(UChar i),
+ UChar i)
+{
+ HChar *mnm = irgen(i);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, UINT), mnm, i);
+}
+
+static void
+s390_format_RI(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ irgen(r1, i2);
+}
+
+static void
+s390_format_RI_RU(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
+}
+
+static void
+s390_format_RI_RI(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, (Int)(Short)i2);
+}
+
+static void
+s390_format_RI_RP(HChar *(*irgen)(UChar r1, UShort i2),
+ UChar r1, UShort i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, (Int)(Short)i2);
+}
+
+static void
+s390_format_RIE_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
+ UChar r1, UChar r3, UShort i2)
+{
+ HChar *mnm = irgen(r1, r3, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
+}
+
+static void
+s390_format_RIE_RRI0(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
+ UChar r1, UChar r3, UShort i2)
+{
+ HChar *mnm = irgen(r1, r3, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, INT), mnm, r1, r3, (Int)(Short)i2);
+}
+
+static void
+s390_format_RIE_RRUUU(HChar *(*irgen)(UChar r1, UChar r2, UChar i3, UChar i4,
+ UChar i5),
+ UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ HChar *mnm = irgen(r1, r2, i3, i4, i5);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC6(MNM, GPR, GPR, UINT, UINT, UINT), mnm, r1, r2, i3, i4,
+ i5);
+}
+
+static void
+s390_format_RIE_RRPU(HChar *(*irgen)(UChar r1, UChar r2, UShort i4, UChar m3),
+ UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ HChar *mnm = irgen(r1, r2, i4, m3);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, GPR, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
+ r2, m3, (Int)(Short)i4);
+}
+
+static void
+s390_format_RIE_RUPU(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
+ UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ HChar *mnm = irgen(r1, m3, i4, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, UINT, CABM, PCREL), S390_XMNM_CAB, mnm, m3,
+ r1, i2, m3, (Int)(Short)i4);
+}
+
+static void
+s390_format_RIE_RUPI(HChar *(*irgen)(UChar r1, UChar m3, UShort i4, UChar i2),
+ UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ HChar *mnm = irgen(r1, m3, i4, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, INT, CABM, PCREL), S390_XMNM_CAB, mnm, m3, r1,
+ (Int)(Char)i2, m3, (Int)(Short)i4);
+}
+
+static void
+s390_format_RIL(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ irgen(r1, i2);
+}
+
+static void
+s390_format_RIL_RU(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UINT), mnm, r1, i2);
+}
+
+static void
+s390_format_RIL_RI(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, INT), mnm, r1, i2);
+}
+
+static void
+s390_format_RIL_RP(HChar *(*irgen)(UChar r1, UInt i2),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen(r1, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, PCREL), mnm, r1, i2);
+}
+
+static void
+s390_format_RIL_UP(HChar *(*irgen)(void),
+ UChar r1, UInt i2)
+{
+ HChar *mnm = irgen();
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UINT, PCREL), mnm, r1, i2);
+}
+
+static void
+s390_format_RIS_RURDI(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
+ IRTemp op4addr),
+ UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
+{
+ HChar *mnm;
+ IRTemp op4addr = newTemp(Ity_I64);
+
+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
+ mkU64(0)));
+
+ mnm = irgen(r1, m3, i2, op4addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, INT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
+ (Int)(Char)i2, m3, d4, 0, b4);
+}
+
+static void
+s390_format_RIS_RURDU(HChar *(*irgen)(UChar r1, UChar m3, UChar i2,
+ IRTemp op4addr),
+ UChar r1, UChar m3, UChar b4, UShort d4, UChar i2)
+{
+ HChar *mnm;
+ IRTemp op4addr = newTemp(Ity_I64);
+
+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
+ mkU64(0)));
+
+ mnm = irgen(r1, m3, i2, op4addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, UINT, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
+ i2, m3, d4, 0, b4);
+}
+
+static void
+s390_format_RR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ irgen(r1, r2);
+}
+
+static void
+s390_format_RR_RR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RR_FF(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ irgen(r1, r2);
+}
+
+static void
+s390_format_RRE_RR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, GPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_FF(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, FPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_RF(HChar *(*irgen)(UChar, UChar),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, FPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_FR(HChar *(*irgen)(UChar r1, UChar r2),
+ UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, GPR), mnm, r1, r2);
+}
+
+static void
+s390_format_RRE_R0(HChar *(*irgen)(UChar r1),
+ UChar r1)
+{
+ HChar *mnm = irgen(r1);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, GPR), mnm, r1);
+}
+
+static void
+s390_format_RRE_F0(HChar *(*irgen)(UChar r1),
+ UChar r1)
+{
+ HChar *mnm = irgen(r1);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, FPR), mnm, r1);
+}
+
+static void
+s390_format_RRF_F0FF(HChar *(*irgen)(UChar, UChar, UChar),
+ UChar r1, UChar r3, UChar r2)
+{
+ HChar *mnm = irgen(r1, r3, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
+}
+
+static void
+s390_format_RRF_U0RF(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
+ UChar r3, UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r3, r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), mnm, r1, r3, r2);
+}
+
+static void
+s390_format_RRF_F0FF2(HChar *(*irgen)(UChar, UChar, UChar),
+ UChar r3, UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r3, r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), mnm, r1, r3, r2);
+}
+
+static void
+s390_format_RRF_R0RR2(HChar *(*irgen)(UChar r3, UChar r1, UChar r2),
+ UChar r3, UChar r1, UChar r2)
+{
+ HChar *mnm = irgen(r3, r1, r2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, GPR), mnm, r1, r2, r3);
+}
+
+static void
+s390_format_RRS(HChar *(*irgen)(UChar r1, UChar r2, UChar m3, IRTemp op4addr),
+ UChar r1, UChar r2, UChar b4, UShort d4, UChar m3)
+{
+ HChar *mnm;
+ IRTemp op4addr = newTemp(Ity_I64);
+
+ assign(op4addr, binop(Iop_Add64, mkU64(d4), b4 != 0 ? get_gpr_dw0(b4) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r2, m3, op4addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC5(XMNM, GPR, GPR, CABM, UDXB), S390_XMNM_CAB, mnm, m3, r1,
+ r2, m3, d4, 0, b4);
+}
+
+static void
+s390_format_RS_R0RD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, 0, b2);
+}
+
+static void
+s390_format_RS_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, UDXB), mnm, r1, r3, d2, 0, b2);
+}
+
+static void
+s390_format_RS_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, UINT, UDXB), mnm, r1, r3, d2, 0, b2);
+}
+
+static void
+s390_format_RS_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
+ UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, AR, AR, UDXB), mnm, r1, r3, d2, 0, b2);
+}
+
+static void
+s390_format_RSI_RRP(HChar *(*irgen)(UChar r1, UChar r3, UShort i2),
+ UChar r1, UChar r3, UShort i2)
+{
+ HChar *mnm = irgen(r1, r3, i2);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, PCREL), mnm, r1, r3, (Int)(Short)i2);
+}
+
+static void
+s390_format_RSY_RRRD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
+}
+
+static void
+s390_format_RSY_AARD(HChar *(*irgen)(UChar, UChar, IRTemp),
+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, AR, AR, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
+}
+
+static void
+s390_format_RSY_RURD(HChar *(*irgen)(UChar r1, UChar r3, IRTemp op2addr),
+ UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, mkexpr(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, r3, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, GPR, UINT, SDXB), mnm, r1, r3, dh2, dl2, 0, b2);
+}
+
+static void
+s390_format_RX(HChar *(*irgen)(UChar r1, UChar x2, UChar b2, UShort d2,
+ IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ irgen(r1, x2, b2, d2, op2addr);
+}
+
+static void
+s390_format_RX_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, UDXB), mnm, r1, d2, x2, b2);
+}
+
+static void
+s390_format_RX_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
+}
+
+static void
+s390_format_RXE_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, UDXB), mnm, r1, d2, x2, b2);
+}
+
+static void
+s390_format_RXF_FRRDF(HChar *(*irgen)(UChar, IRTemp, UChar),
+ UChar r3, UChar x2, UChar b2, UShort d2, UChar r1)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkU64(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r3, op2addr, r1);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC4(MNM, FPR, FPR, UDXB), mnm, r1, r3, d2, x2, b2);
+}
+
+static void
+s390_format_RXY_RRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
+}
+
+static void
+s390_format_RXY_FRRD(HChar *(*irgen)(UChar r1, IRTemp op2addr),
+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen(r1, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, FPR, SDXB), mnm, r1, dh2, dl2, x2, b2);
+}
+
+static void
+s390_format_RXY_URRD(HChar *(*irgen)(void),
+ UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+ IRTemp d2 = newTemp(Ity_I64);
+
+ assign(d2, mkU64(((ULong)(Long)(Char)dh2 << 12) | ((ULong)dl2)));
+ assign(op2addr, binop(Iop_Add64, binop(Iop_Add64, mkexpr(d2),
+ b2 != 0 ? get_gpr_dw0(b2) : mkU64(0)), x2 != 0 ? get_gpr_dw0(x2) :
+ mkU64(0)));
+
+ mnm = irgen();
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UINT, SDXB), mnm, r1, dh2, dl2, x2, b2);
+}
+
+static void
+s390_format_S_RD(HChar *(*irgen)(IRTemp op2addr),
+ UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(MNM, UDXB), mnm, d2, 0, b2);
+}
+
+static void
+s390_format_SI_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
+ UChar i2, UChar b1, UShort d1)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
+}
+
+static void
+s390_format_SIY_URD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
+ UChar i2, UChar b1, UShort dl1, UChar dh1)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+ IRTemp d1 = newTemp(Ity_I64);
+
+ assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
+ assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, SDXB, UINT), mnm, dh1, dl1, 0, b1, i2);
+}
+
+static void
+s390_format_SIY_IRD(HChar *(*irgen)(UChar i2, IRTemp op1addr),
+ UChar i2, UChar b1, UShort dl1, UChar dh1)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+ IRTemp d1 = newTemp(Ity_I64);
+
+ assign(d1, mkU64(((ULong)(Long)(Char)dh1 << 12) | ((ULong)dl1)));
+ assign(op1addr, binop(Iop_Add64, mkexpr(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, SDXB, INT), mnm, dh1, dl1, 0, b1, (Int)(Char)i2);
+}
+
+static void
+s390_format_SS_L0RDRD(HChar *(*irgen)(UChar, IRTemp, IRTemp),
+ UChar l, UChar b1, UShort d1, UChar b2, UShort d2)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+ IRTemp op2addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+ assign(op2addr, binop(Iop_Add64, mkU64(d2), b2 != 0 ? get_gpr_dw0(b2) :
+ mkU64(0)));
+
+ mnm = irgen(l, op1addr, op2addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDLB, UDXB), mnm, d1, l, b1, d2, 0, b2);
+}
+
+static void
+s390_format_SIL_RDI(HChar *(*irgen)(UShort i2, IRTemp op1addr),
+ UChar b1, UShort d1, UShort i2)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDXB, INT), mnm, d1, 0, b1, (Int)(Short)i2);
+}
+
+static void
+s390_format_SIL_RDU(HChar *(*irgen)(UShort i2, IRTemp op1addr),
+ UChar b1, UShort d1, UShort i2)
+{
+ HChar *mnm;
+ IRTemp op1addr = newTemp(Ity_I64);
+
+ assign(op1addr, binop(Iop_Add64, mkU64(d1), b1 != 0 ? get_gpr_dw0(b1) :
+ mkU64(0)));
+
+ mnm = irgen(i2, op1addr);
+
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, UDXB, UINT), mnm, d1, 0, b1, i2);
+}
+
+
+
+/*------------------------------------------------------------*/
+/*--- Build IR for opcodes ---*/
+/*------------------------------------------------------------*/
+
+static HChar *
+s390_irgen_AR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ar";
+}
+
+static HChar *
+s390_irgen_AGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agr";
+}
+
+static HChar *
+s390_irgen_AGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agfr";
+}
+
+static HChar *
+s390_irgen_ARK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ark";
+}
+
+static HChar *
+s390_irgen_AGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agrk";
+}
+
+static HChar *
+s390_irgen_A(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "a";
+}
+
+static HChar *
+s390_irgen_AY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ay";
+}
+
+static HChar *
+s390_irgen_AG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ag";
+}
+
+static HChar *
+s390_irgen_AGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agf";
+}
+
+static HChar *
+s390_irgen_AFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "afi";
+}
+
+static HChar *
+s390_irgen_AGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Int)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "agfi";
+}
+
+static HChar *
+s390_irgen_AHIK(UChar r1, UChar r3, UShort i2)
+{
+ Int op2;
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ op2 = (Int)(Short)i2;
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkU32((UInt)op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, mktemp(Ity_I32, mkU32((UInt)
+ op2)), op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ahik";
+}
+
+static HChar *
+s390_irgen_AGHIK(UChar r1, UChar r3, UShort i2)
+{
+ Long op2;
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op2 = (Long)(Short)i2;
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkU64((ULong)op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, mktemp(Ity_I64, mkU64((ULong)
+ op2)), op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "aghik";
+}
+
+static HChar *
+s390_irgen_ASI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (Int)(Char)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "asi";
+}
+
+static HChar *
+s390_irgen_AGSI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (Long)(Char)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "agsi";
+}
+
+static HChar *
+s390_irgen_AH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ah";
+}
+
+static HChar *
+s390_irgen_AHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ahy";
+}
+
+static HChar *
+s390_irgen_AHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Short)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ahi";
+}
+
+static HChar *
+s390_irgen_AGHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Short)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64((ULong)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "aghi";
+}
+
+static HChar *
+s390_irgen_AHHHR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w0(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "ahhhr";
+}
+
+static HChar *
+s390_irgen_AHHLR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "ahhlr";
+}
+
+static HChar *
+s390_irgen_AIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32((UInt)op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "aih";
+}
+
+static HChar *
+s390_irgen_ALR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alr";
+}
+
+static HChar *
+s390_irgen_ALGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algr";
+}
+
+static HChar *
+s390_irgen_ALGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algfr";
+}
+
+static HChar *
+s390_irgen_ALRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alrk";
+}
+
+static HChar *
+s390_irgen_ALGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algrk";
+}
+
+static HChar *
+s390_irgen_AL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "al";
+}
+
+static HChar *
+s390_irgen_ALY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "aly";
+}
+
+static HChar *
+s390_irgen_ALG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alg";
+}
+
+static HChar *
+s390_irgen_ALGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algf";
+}
+
+static HChar *
+s390_irgen_ALFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alfi";
+}
+
+static HChar *
+s390_irgen_ALGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "algfi";
+}
+
+static HChar *
+s390_irgen_ALHHHR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w0(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alhhhr";
+}
+
+static HChar *
+s390_irgen_ALHHLR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alhhlr";
+}
+
+static HChar *
+s390_irgen_ALCR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp carry_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
+ assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alcr";
+}
+
+static HChar *
+s390_irgen_ALCGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp carry_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
+ mkU8(1))));
+ assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alcgr";
+}
+
+static HChar *
+s390_irgen_ALC(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp carry_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(carry_in, binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)));
+ assign(result, binop(Iop_Add32, binop(Iop_Add32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_32, op1, op2, carry_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alc";
+}
+
+static HChar *
+s390_irgen_ALCG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp carry_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(carry_in, unop(Iop_32Uto64, binop(Iop_Shr32, s390_call_calculate_cc(),
+ mkU8(1))));
+ assign(result, binop(Iop_Add64, binop(Iop_Add64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(carry_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_ADDC_64, op1, op2, carry_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alcg";
+}
+
+static HChar *
+s390_irgen_ALSI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (UInt)(Int)(Char)i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "alsi";
+}
+
+static HChar *
+s390_irgen_ALGSI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (ULong)(Long)(Char)i2;
+ assign(result, binop(Iop_Add64, mkexpr(op1), mkU64(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "algsi";
+}
+
+static HChar *
+s390_irgen_ALHSIK(UChar r1, UChar r3, UShort i2)
+{
+ UInt op2;
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ op2 = (UInt)(Int)(Short)i2;
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkU32(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, mktemp(Ity_I32, mkU32(op2)),
+ op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "alhsik";
+}
+
+static HChar *
+s390_irgen_ALGHSIK(UChar r1, UChar r3, UShort i2)
+{
+ ULong op2;
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op2 = (ULong)(Long)(Short)i2;
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkU64(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(op2)),
+ op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "alghsik";
+}
+
+static HChar *
+s390_irgen_ALSIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alsih";
+}
+
+static HChar *
+s390_irgen_ALSIHN(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Add32, mkexpr(op1), mkU32(op2)));
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "alsihn";
+}
+
+static HChar *
+s390_irgen_NR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "nr";
+}
+
+static HChar *
+s390_irgen_NGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ngr";
+}
+
+static HChar *
+s390_irgen_NRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "nrk";
+}
+
+static HChar *
+s390_irgen_NGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ngrk";
+}
+
+static HChar *
+s390_irgen_N(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "n";
+}
+
+static HChar *
+s390_irgen_NY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_And32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ny";
+}
+
+static HChar *
+s390_irgen_NG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_And64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ng";
+}
+
+static HChar *
+s390_irgen_NI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "ni";
+}
+
+static HChar *
+s390_irgen_NIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_And8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "niy";
+}
+
+static HChar *
+s390_irgen_NIHF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "nihf";
+}
+
+static HChar *
+s390_irgen_NIHH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw0(r1, mkexpr(result));
+
+ return "nihh";
+}
+
+static HChar *
+s390_irgen_NIHL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw1(r1, mkexpr(result));
+
+ return "nihl";
+}
+
+static HChar *
+s390_irgen_NILF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "nilf";
+}
+
+static HChar *
+s390_irgen_NILH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw2(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw2(r1, mkexpr(result));
+
+ return "nilh";
+}
+
+static HChar *
+s390_irgen_NILL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw3(r1));
+ op2 = i2;
+ assign(result, binop(Iop_And16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw3(r1, mkexpr(result));
+
+ return "nill";
+}
+
+static HChar *
+s390_irgen_BASR(UChar r1, UChar r2)
+{
+ IRTemp target = newTemp(Ity_I64);
+
+ if (r2 == 0) {
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
+ } else {
+ if (r1 != r2) {
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
+ call_function(get_gpr_dw0(r2));
+ } else {
+ assign(target, get_gpr_dw0(r2));
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 2ULL));
+ call_function(mkexpr(target));
+ }
+ }
+
+ return "basr";
+}
+
+static HChar *
+s390_irgen_BAS(UChar r1, IRTemp op2addr)
+{
+ IRTemp target = newTemp(Ity_I64);
+
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
+ assign(target, mkexpr(op2addr));
+ call_function(mkexpr(target));
+
+ return "bas";
+}
+
+static HChar *
+s390_irgen_BCR(UChar r1, UChar r2)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if ((r2 == 0) || (r1 == 0)) {
+ } else {
+ if (r1 == 15) {
+ return_from_function(get_gpr_dw0(r2));
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), get_gpr_dw0(r2));
+ }
+ }
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
+
+ return "bcr";
+}
+
+static HChar *
+s390_irgen_BC(UChar r1, UChar x2, UChar b2, UShort d2, IRTemp op2addr)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (r1 == 0) {
+ } else {
+ if (r1 == 15) {
+ always_goto(mkexpr(op2addr));
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op2addr));
+ }
+ }
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, UDXB), S390_XMNM_BC, r1, d2, x2, b2);
+
+ return "bc";
+}
+
+static HChar *
+s390_irgen_BCTR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
+ if (r2 != 0) {
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)
+ ), get_gpr_dw0(r2));
+ }
+
+ return "bctr";
+}
+
+static HChar *
+s390_irgen_BCTGR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
+ if (r2 != 0) {
+ if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1),
+ mkU64(0)), get_gpr_dw0(r2));
+ }
+
+ return "bctgr";
+}
+
+static HChar *
+s390_irgen_BCT(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, get_gpr_w1(r1), mkU32(0)),
+ mkexpr(op2addr));
+
+ return "bct";
+}
+
+static HChar *
+s390_irgen_BCTG(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ64, get_gpr_dw0(r1), mkU64(0)),
+ mkexpr(op2addr));
+
+ return "bctg";
+}
+
+static HChar *
+s390_irgen_BXH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLE32S, get_gpr_w1(r1),
+ mkexpr(value)), mkexpr(op2addr));
+
+ return "bxh";
+}
+
+static HChar *
+s390_irgen_BXHG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLE64S, get_gpr_dw0(r1),
+ mkexpr(value)), mkexpr(op2addr));
+
+ return "bxhg";
+}
+
+static HChar *
+s390_irgen_BXLE(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLT32S, mkexpr(value),
+ get_gpr_w1(r1)), mkexpr(op2addr));
+
+ return "bxle";
+}
+
+static HChar *
+s390_irgen_BXLEG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_not_condition_goto_computed(binop(Iop_CmpLT64S, mkexpr(value),
+ get_gpr_dw0(r1)), mkexpr(op2addr));
+
+ return "bxleg";
+}
+
+static HChar *
+s390_irgen_BRAS(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 4ULL));
+ call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1)));
+
+ return "bras";
+}
+
+static HChar *
+s390_irgen_BRASL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + 6ULL));
+ call_function(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
+
+ return "brasl";
+}
+
+static HChar *
+s390_irgen_BRC(UChar r1, UShort i2)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (r1 == 0) {
+ } else {
+ if (r1 == 15) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1))
+ );
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ }
+ }
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
+
+ return "brc";
+}
+
+static HChar *
+s390_irgen_BRCL(UChar r1, UInt i2)
+{
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (r1 == 0) {
+ } else {
+ if (r1 == 15) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
+ } else {
+ assign(cond, s390_call_calculate_cond(r1));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1));
+ }
+ }
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRCL, r1, i2);
+
+ return "brcl";
+}
+
+static HChar *
+s390_irgen_BRCT(UChar r1, UShort i2)
+{
+ put_gpr_w1(r1, binop(Iop_Sub32, get_gpr_w1(r1), mkU32(1)));
+ if_condition_goto(binop(Iop_CmpNE32, get_gpr_w1(r1), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brct";
+}
+
+static HChar *
+s390_irgen_BRCTG(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, binop(Iop_Sub64, get_gpr_dw0(r1), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, get_gpr_dw0(r1), mkU64(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brctg";
+}
+
+static HChar *
+s390_irgen_BRXH(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_condition_goto(binop(Iop_CmpLT32S, mkexpr(value), get_gpr_w1(r1)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxh";
+}
+
+static HChar *
+s390_irgen_BRXHG(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_condition_goto(binop(Iop_CmpLT64S, mkexpr(value), get_gpr_dw0(r1)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxhg";
+}
+
+static HChar *
+s390_irgen_BRXLE(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I32);
+
+ assign(value, get_gpr_w1(r3 | 1));
+ put_gpr_w1(r1, binop(Iop_Add32, get_gpr_w1(r1), get_gpr_w1(r3)));
+ if_condition_goto(binop(Iop_CmpLE32S, get_gpr_w1(r1), mkexpr(value)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxle";
+}
+
+static HChar *
+s390_irgen_BRXLG(UChar r1, UChar r3, UShort i2)
+{
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(value, get_gpr_dw0(r3 | 1));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), get_gpr_dw0(r3)));
+ if_condition_goto(binop(Iop_CmpLE64S, get_gpr_dw0(r1), mkexpr(value)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i2 << 1));
+
+ return "brxlg";
+}
+
+static HChar *
+s390_irgen_CR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cr";
+}
+
+static HChar *
+s390_irgen_CGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgr";
+}
+
+static HChar *
+s390_irgen_CGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgfr";
+}
+
+static HChar *
+s390_irgen_C(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "c";
+}
+
+static HChar *
+s390_irgen_CY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cy";
+}
+
+static HChar *
+s390_irgen_CG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cg";
+}
+
+static HChar *
+s390_irgen_CGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgf";
+}
+
+static HChar *
+s390_irgen_CFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "cfi";
+}
+
+static HChar *
+s390_irgen_CGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Int)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "cgfi";
+}
+
+static HChar *
+s390_irgen_CRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "crl";
+}
+
+static HChar *
+s390_irgen_CGRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgrl";
+}
+
+static HChar *
+s390_irgen_CGFRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgfrl";
+}
+
+static HChar *
+s390_irgen_CRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "crb";
+}
+
+static HChar *
+s390_irgen_CGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "cgrb";
+}
+
+static HChar *
+s390_irgen_CRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "crj";
+}
+
+static HChar *
+s390_irgen_CGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "cgrj";
+}
+
+static HChar *
+s390_irgen_CIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32((UInt)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "cib";
+}
+
+static HChar *
+s390_irgen_CGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64((ULong)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "cgib";
+}
+
+static HChar *
+s390_irgen_CIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32((UInt)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "cij";
+}
+
+static HChar *
+s390_irgen_CGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Char)i2;
+ assign(icc, s390_call_calculate_iccSS(S390_CC_OP_SIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64((ULong)op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "cgij";
+}
+
+static HChar *
+s390_irgen_CH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "ch";
+}
+
+static HChar *
+s390_irgen_CHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chy";
+}
+
+static HChar *
+s390_irgen_CGH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cgh";
+}
+
+static HChar *
+s390_irgen_CHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "chi";
+}
+
+static HChar *
+s390_irgen_CGHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Long)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "cghi";
+}
+
+static HChar *
+s390_irgen_CHHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ Short op2;
+
+ assign(op1, load(Ity_I16, mkexpr(op1addr)));
+ op2 = (Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I16,
+ mkU16((UShort)op2)));
+
+ return "chhsi";
+}
+
+static HChar *
+s390_irgen_CHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (Int)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "chsi";
+}
+
+static HChar *
+s390_irgen_CGHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Long op2;
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (Long)(Short)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64((ULong)op2)));
+
+ return "cghsi";
+}
+
+static HChar *
+s390_irgen_CHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chrl";
+}
+
+static HChar *
+s390_irgen_CGHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "cghrl";
+}
+
+static HChar *
+s390_irgen_CHHR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w0(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chhr";
+}
+
+static HChar *
+s390_irgen_CHLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chlr";
+}
+
+static HChar *
+s390_irgen_CHF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, op2);
+
+ return "chf";
+}
+
+static HChar *
+s390_irgen_CIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = (Int)i2;
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32((UInt)op2)));
+
+ return "cih";
+}
+
+static HChar *
+s390_irgen_CLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clr";
+}
+
+static HChar *
+s390_irgen_CLGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgr";
+}
+
+static HChar *
+s390_irgen_CLGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgfr";
+}
+
+static HChar *
+s390_irgen_CL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "cl";
+}
+
+static HChar *
+s390_irgen_CLY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "cly";
+}
+
+static HChar *
+s390_irgen_CLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clg";
+}
+
+static HChar *
+s390_irgen_CLGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgf";
+}
+
+static HChar *
+s390_irgen_CLFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+
+ return "clfi";
+}
+
+static HChar *
+s390_irgen_CLGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+
+ return "clgfi";
+}
+
+static HChar *
+s390_irgen_CLI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
+ mkU8(op2)));
+
+ return "cli";
+}
+
+static HChar *
+s390_irgen_CLIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I8,
+ mkU8(op2)));
+
+ return "cliy";
+}
+
+static HChar *
+s390_irgen_CLFHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+
+ assign(op1, load(Ity_I32, mkexpr(op1addr)));
+ op2 = (UInt)i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+
+ return "clfhsi";
+}
+
+static HChar *
+s390_irgen_CLGHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+
+ assign(op1, load(Ity_I64, mkexpr(op1addr)));
+ op2 = (ULong)i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+
+ return "clghsi";
+}
+
+static HChar *
+s390_irgen_CLHHSI(UShort i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+
+ assign(op1, load(Ity_I16, mkexpr(op1addr)));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I16,
+ mkU16(op2)));
+
+ return "clhhsi";
+}
+
+static HChar *
+s390_irgen_CLRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clrl";
+}
+
+static HChar *
+s390_irgen_CLGRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgrl";
+}
+
+static HChar *
+s390_irgen_CLGFRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clgfrl";
+}
+
+static HChar *
+s390_irgen_CLHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhrl";
+}
+
+static HChar *
+s390_irgen_CLGHRL(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clghrl";
+}
+
+static HChar *
+s390_irgen_CLRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clrb";
+}
+
+static HChar *
+s390_irgen_CLGRB(UChar r1, UChar r2, UChar m3, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clgrb";
+}
+
+static HChar *
+s390_irgen_CLRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clrj";
+}
+
+static HChar *
+s390_irgen_CLGRJ(UChar r1, UChar r2, UShort i4, UChar m3)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ op2));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clgrj";
+}
+
+static HChar *
+s390_irgen_CLIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (UInt)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clib";
+}
+
+static HChar *
+s390_irgen_CLGIB(UChar r1, UChar m3, UChar i2, IRTemp op4addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkexpr(op4addr));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_not_condition_goto_computed(binop(Iop_CmpEQ32, mkexpr(cond),
+ mkU32(0)), mkexpr(op4addr));
+ }
+ }
+
+ return "clgib";
+}
+
+static HChar *
+s390_irgen_CLIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ op2 = (UInt)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I32, mkU32(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clij";
+}
+
+static HChar *
+s390_irgen_CLGIJ(UChar r1, UChar m3, UShort i4, UChar i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp icc = newTemp(Ity_I32);
+ IRTemp cond = newTemp(Ity_I32);
+
+ if (m3 == 0) {
+ } else {
+ if (m3 == 14) {
+ always_goto(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1))
+ );
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(icc, s390_call_calculate_iccZZ(S390_CC_OP_UNSIGNED_COMPARE, op1,
+ mktemp(Ity_I64, mkU64(op2))));
+ assign(cond, binop(Iop_And32, binop(Iop_Shl32, mkU32(m3),
+ unop(Iop_32to8, mkexpr(icc))), mkU32(8)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(cond), mkU32(0)),
+ guest_IA_curr_instr + ((ULong)(Long)(Short)i4 << 1));
+
+ }
+ }
+
+ return "clgij";
+}
+
+static HChar *
+s390_irgen_CLM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b1 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b3 = newTemp(Ity_I32);
+ IRTemp c0 = newTemp(Ity_I32);
+ IRTemp c1 = newTemp(Ity_I32);
+ IRTemp c2 = newTemp(Ity_I32);
+ IRTemp c3 = newTemp(Ity_I32);
+ UChar n;
+
+ n = 0;
+ if ((r3 & 8) != 0) {
+ assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+ n = n + 1;
+ } else {
+ assign(b0, mkU32(0));
+ assign(c0, mkU32(0));
+ }
+ if ((r3 & 4) != 0) {
+ assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b1, mkU32(0));
+ assign(c1, mkU32(0));
+ }
+ if ((r3 & 2) != 0) {
+ assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b2, mkU32(0));
+ assign(c2, mkU32(0));
+ }
+ if ((r3 & 1) != 0) {
+ assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b3, mkU32(0));
+ assign(c3, mkU32(0));
+ }
+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clm";
+}
+
+static HChar *
+s390_irgen_CLMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b1 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b3 = newTemp(Ity_I32);
+ IRTemp c0 = newTemp(Ity_I32);
+ IRTemp c1 = newTemp(Ity_I32);
+ IRTemp c2 = newTemp(Ity_I32);
+ IRTemp c3 = newTemp(Ity_I32);
+ UChar n;
+
+ n = 0;
+ if ((r3 & 8) != 0) {
+ assign(b0, unop(Iop_8Uto32, get_gpr_b4(r1)));
+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+ n = n + 1;
+ } else {
+ assign(b0, mkU32(0));
+ assign(c0, mkU32(0));
+ }
+ if ((r3 & 4) != 0) {
+ assign(b1, unop(Iop_8Uto32, get_gpr_b5(r1)));
+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b1, mkU32(0));
+ assign(c1, mkU32(0));
+ }
+ if ((r3 & 2) != 0) {
+ assign(b2, unop(Iop_8Uto32, get_gpr_b6(r1)));
+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b2, mkU32(0));
+ assign(c2, mkU32(0));
+ }
+ if ((r3 & 1) != 0) {
+ assign(b3, unop(Iop_8Uto32, get_gpr_b7(r1)));
+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b3, mkU32(0));
+ assign(c3, mkU32(0));
+ }
+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clmy";
+}
+
+static HChar *
+s390_irgen_CLMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b1 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b3 = newTemp(Ity_I32);
+ IRTemp c0 = newTemp(Ity_I32);
+ IRTemp c1 = newTemp(Ity_I32);
+ IRTemp c2 = newTemp(Ity_I32);
+ IRTemp c3 = newTemp(Ity_I32);
+ UChar n;
+
+ n = 0;
+ if ((r3 & 8) != 0) {
+ assign(b0, unop(Iop_8Uto32, get_gpr_b0(r1)));
+ assign(c0, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+ n = n + 1;
+ } else {
+ assign(b0, mkU32(0));
+ assign(c0, mkU32(0));
+ }
+ if ((r3 & 4) != 0) {
+ assign(b1, unop(Iop_8Uto32, get_gpr_b1(r1)));
+ assign(c1, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b1, mkU32(0));
+ assign(c1, mkU32(0));
+ }
+ if ((r3 & 2) != 0) {
+ assign(b2, unop(Iop_8Uto32, get_gpr_b2(r1)));
+ assign(c2, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b2, mkU32(0));
+ assign(c2, mkU32(0));
+ }
+ if ((r3 & 1) != 0) {
+ assign(b3, unop(Iop_8Uto32, get_gpr_b3(r1)));
+ assign(c3, unop(Iop_8Uto32, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr),
+ mkU64(n)))));
+ n = n + 1;
+ } else {
+ assign(b3, mkU32(0));
+ assign(c3, mkU32(0));
+ }
+ assign(op1, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(b0), mkU8(24)), binop(Iop_Shl32, mkexpr(b1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(b2), mkU8(8))), mkexpr(b3)));
+ assign(op2, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Or32, binop(Iop_Shl32,
+ mkexpr(c0), mkU8(24)), binop(Iop_Shl32, mkexpr(c1), mkU8(16))),
+ binop(Iop_Shl32, mkexpr(c2), mkU8(8))), mkexpr(c3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clmh";
+}
+
+static HChar *
+s390_irgen_CLHHR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w0(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhhr";
+}
+
+static HChar *
+s390_irgen_CLHLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, get_gpr_w1(r2));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhlr";
+}
+
+static HChar *
+s390_irgen_CLHF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, op2);
+
+ return "clhf";
+}
+
+static HChar *
+s390_irgen_CLIH(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_COMPARE, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+
+ return "clih";
+}
+
+static HChar *
+s390_irgen_CPYA(UChar r1, UChar r2)
+{
+ put_ar_w0(r1, get_ar_w0(r2));
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, AR, AR), "cpya", r1, r2);
+
+ return "cpya";
+}
+
+static HChar *
+s390_irgen_XR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ if (r1 == r2) {
+ assign(result, mkU32(0));
+ } else {
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xr";
+}
+
+static HChar *
+s390_irgen_XGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ if (r1 == r2) {
+ assign(result, mkU64(0));
+ } else {
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "xgr";
+}
+
+static HChar *
+s390_irgen_XRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xrk";
+}
+
+static HChar *
+s390_irgen_XGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "xgrk";
+}
+
+static HChar *
+s390_irgen_X(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "x";
+}
+
+static HChar *
+s390_irgen_XY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xy";
+}
+
+static HChar *
+s390_irgen_XG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Xor64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "xg";
+}
+
+static HChar *
+s390_irgen_XI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "xi";
+}
+
+static HChar *
+s390_irgen_XIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Xor8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "xiy";
+}
+
+static HChar *
+s390_irgen_XIHF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "xihf";
+}
+
+static HChar *
+s390_irgen_XILF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Xor32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "xilf";
+}
+
+static HChar *
+s390_irgen_EAR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, get_ar_w0(r2));
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, GPR, AR), "ear", r1, r2);
+
+ return "ear";
+}
+
+static HChar *
+s390_irgen_IC(UChar r1, IRTemp op2addr)
+{
+ put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
+
+ return "ic";
+}
+
+static HChar *
+s390_irgen_ICY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_b7(r1, load(Ity_I8, mkexpr(op2addr)));
+
+ return "icy";
+}
+
+static HChar *
+s390_irgen_ICM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar n;
+ IRTemp result = newTemp(Ity_I32);
+ UInt mask;
+
+ n = 0;
+ mask = (UInt)r3;
+ if ((mask & 8) != 0) {
+ put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ assign(result, get_gpr_w1(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
+ mkU32(mask)));
+
+ return "icm";
+}
+
+static HChar *
+s390_irgen_ICMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar n;
+ IRTemp result = newTemp(Ity_I32);
+ UInt mask;
+
+ n = 0;
+ mask = (UInt)r3;
+ if ((mask & 8) != 0) {
+ put_gpr_b4(r1, load(Ity_I8, mkexpr(op2addr)));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ put_gpr_b5(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ put_gpr_b6(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ put_gpr_b7(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ assign(result, get_gpr_w1(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
+ mkU32(mask)));
+
+ return "icmy";
+}
+
+static HChar *
+s390_irgen_ICMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar n;
+ IRTemp result = newTemp(Ity_I32);
+ UInt mask;
+
+ n = 0;
+ mask = (UInt)r3;
+ if ((mask & 8) != 0) {
+ put_gpr_b0(r1, load(Ity_I8, mkexpr(op2addr)));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ put_gpr_b1(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ put_gpr_b2(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ put_gpr_b3(r1, load(Ity_I8, binop(Iop_Add64, mkexpr(op2addr), mkU64(n))));
+
+ n = n + 1;
+ }
+ assign(result, get_gpr_w0(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_INSERT_CHAR_MASK_32, result, mktemp(Ity_I32,
+ mkU32(mask)));
+
+ return "icmh";
+}
+
+static HChar *
+s390_irgen_IIHF(UChar r1, UInt i2)
+{
+ put_gpr_w0(r1, mkU32(i2));
+
+ return "iihf";
+}
+
+static HChar *
+s390_irgen_IIHH(UChar r1, UShort i2)
+{
+ put_gpr_hw0(r1, mkU16(i2));
+
+ return "iihh";
+}
+
+static HChar *
+s390_irgen_IIHL(UChar r1, UShort i2)
+{
+ put_gpr_hw1(r1, mkU16(i2));
+
+ return "iihl";
+}
+
+static HChar *
+s390_irgen_IILF(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, mkU32(i2));
+
+ return "iilf";
+}
+
+static HChar *
+s390_irgen_IILH(UChar r1, UShort i2)
+{
+ put_gpr_hw2(r1, mkU16(i2));
+
+ return "iilh";
+}
+
+static HChar *
+s390_irgen_IILL(UChar r1, UShort i2)
+{
+ put_gpr_hw3(r1, mkU16(i2));
+
+ return "iill";
+}
+
+static HChar *
+s390_irgen_LR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, get_gpr_w1(r2));
+
+ return "lr";
+}
+
+static HChar *
+s390_irgen_LGR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, get_gpr_dw0(r2));
+
+ return "lgr";
+}
+
+static HChar *
+s390_irgen_LGFR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Sto64, get_gpr_w1(r2)));
+
+ return "lgfr";
+}
+
+static HChar *
+s390_irgen_L(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
+
+ return "l";
+}
+
+static HChar *
+s390_irgen_LY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, load(Ity_I32, mkexpr(op2addr)));
+
+ return "ly";
+}
+
+static HChar *
+s390_irgen_LG(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
+
+ return "lg";
+}
+
+static HChar *
+s390_irgen_LGF(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+
+ return "lgf";
+}
+
+static HChar *
+s390_irgen_LGFI(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64((ULong)(Long)(Int)i2));
+
+ return "lgfi";
+}
+
+static HChar *
+s390_irgen_LRL(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, load(Ity_I32, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+
+ return "lrl";
+}
+
+static HChar *
+s390_irgen_LGRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, load(Ity_I64, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)
+ i2 << 1))));
+
+ return "lgrl";
+}
+
+static HChar *
+s390_irgen_LGFRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Sto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "lgfrl";
+}
+
+static HChar *
+s390_irgen_LA(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "la";
+}
+
+static HChar *
+s390_irgen_LAY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "lay";
+}
+
+static HChar *
+s390_irgen_LAE(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "lae";
+}
+
+static HChar *
+s390_irgen_LAEY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, mkexpr(op2addr));
+
+ return "laey";
+}
+
+static HChar *
+s390_irgen_LARL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)));
+
+ return "larl";
+}
+
+static HChar *
+s390_irgen_LAA(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_32, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "laa";
+}
+
+static HChar *
+s390_irgen_LAAG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_ADD_64, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laag";
+}
+
+static HChar *
+s390_irgen_LAAL(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Add32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_32, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "laal";
+}
+
+static HChar *
+s390_irgen_LAALG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Add64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_ADD_64, op2, op3);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laalg";
+}
+
+static HChar *
+s390_irgen_LAN(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_And32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "lan";
+}
+
+static HChar *
+s390_irgen_LANG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_And64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "lang";
+}
+
+static HChar *
+s390_irgen_LAX(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Xor32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "lax";
+}
+
+static HChar *
+s390_irgen_LAXG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Xor64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laxg";
+}
+
+static HChar *
+s390_irgen_LAO(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_w1(r1, mkexpr(op2));
+
+ return "lao";
+}
+
+static HChar *
+s390_irgen_LAOG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op2addr), mkexpr(result));
+ put_gpr_dw0(r1, mkexpr(op2));
+
+ return "laog";
+}
+
+static HChar *
+s390_irgen_LTR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_gpr_w1(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltr";
+}
+
+static HChar *
+s390_irgen_LTGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltgr";
+}
+
+static HChar *
+s390_irgen_LTGFR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltgfr";
+}
+
+static HChar *
+s390_irgen_LT(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ put_gpr_w1(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "lt";
+}
+
+static HChar *
+s390_irgen_LTG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltg";
+}
+
+static HChar *
+s390_irgen_LTGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ put_gpr_dw0(r1, mkexpr(op2));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "ltgf";
+}
+
+static HChar *
+s390_irgen_LBR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_8Sto32, get_gpr_b7(r2)));
+
+ return "lbr";
+}
+
+static HChar *
+s390_irgen_LGBR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_8Sto64, get_gpr_b7(r2)));
+
+ return "lgbr";
+}
+
+static HChar *
+s390_irgen_LB(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "lb";
+}
+
+static HChar *
+s390_irgen_LGB(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_8Sto64, load(Ity_I8, mkexpr(op2addr))));
+
+ return "lgb";
+}
+
+static HChar *
+s390_irgen_LBH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_8Sto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "lbh";
+}
+
+static HChar *
+s390_irgen_LCR(UChar r1, UChar r2)
+{
+ Int op1;
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ op1 = 0;
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkU32((UInt)op1), mkexpr(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, mktemp(Ity_I32, mkU32((UInt)
+ op1)), op2);
+
+ return "lcr";
+}
+
+static HChar *
+s390_irgen_LCGR(UChar r1, UChar r2)
+{
+ Long op1;
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op1 = 0ULL;
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
+ op1)), op2);
+
+ return "lcgr";
+}
+
+static HChar *
+s390_irgen_LCGFR(UChar r1, UChar r2)
+{
+ Long op1;
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ op1 = 0ULL;
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Sub64, mkU64((ULong)op1), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, mktemp(Ity_I64, mkU64((ULong)
+ op1)), op2);
+
+ return "lcgfr";
+}
+
+static HChar *
+s390_irgen_LHR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, get_gpr_hw3(r2)));
+
+ return "lhr";
+}
+
+static HChar *
+s390_irgen_LGHR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Sto64, get_gpr_hw3(r2)));
+
+ return "lghr";
+}
+
+static HChar *
+s390_irgen_LH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lh";
+}
+
+static HChar *
+s390_irgen_LHY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lhy";
+}
+
+static HChar *
+s390_irgen_LGH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lgh";
+}
+
+static HChar *
+s390_irgen_LHI(UChar r1, UShort i2)
+{
+ put_gpr_w1(r1, mkU32((UInt)(Int)(Short)i2));
+
+ return "lhi";
+}
+
+static HChar *
+s390_irgen_LGHI(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64((ULong)(Long)(Short)i2));
+
+ return "lghi";
+}
+
+static HChar *
+s390_irgen_LHRL(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, unop(Iop_16Sto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "lhrl";
+}
+
+static HChar *
+s390_irgen_LGHRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Sto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "lghrl";
+}
+
+static HChar *
+s390_irgen_LHH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "lhh";
+}
+
+static HChar *
+s390_irgen_LFH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, load(Ity_I32, mkexpr(op2addr)));
+
+ return "lfh";
+}
+
+static HChar *
+s390_irgen_LLGFR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, get_gpr_w1(r2)));
+
+ return "llgfr";
+}
+
+static HChar *
+s390_irgen_LLGF(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+
+ return "llgf";
+}
+
+static HChar *
+s390_irgen_LLGFRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, load(Ity_I32, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "llgfrl";
+}
+
+static HChar *
+s390_irgen_LLCR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_8Uto32, get_gpr_b7(r2)));
+
+ return "llcr";
+}
+
+static HChar *
+s390_irgen_LLGCR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_8Uto64, get_gpr_b7(r2)));
+
+ return "llgcr";
+}
+
+static HChar *
+s390_irgen_LLC(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "llc";
+}
+
+static HChar *
+s390_irgen_LLGC(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_8Uto64, load(Ity_I8, mkexpr(op2addr))));
+
+ return "llgc";
+}
+
+static HChar *
+s390_irgen_LLCH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_8Uto32, load(Ity_I8, mkexpr(op2addr))));
+
+ return "llch";
+}
+
+static HChar *
+s390_irgen_LLHR(UChar r1, UChar r2)
+{
+ put_gpr_w1(r1, unop(Iop_16Uto32, get_gpr_hw3(r2)));
+
+ return "llhr";
+}
+
+static HChar *
+s390_irgen_LLGHR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Uto64, get_gpr_hw3(r2)));
+
+ return "llghr";
+}
+
+static HChar *
+s390_irgen_LLH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "llh";
+}
+
+static HChar *
+s390_irgen_LLGH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkexpr(op2addr))));
+
+ return "llgh";
+}
+
+static HChar *
+s390_irgen_LLHRL(UChar r1, UInt i2)
+{
+ put_gpr_w1(r1, unop(Iop_16Uto32, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "llhrl";
+}
+
+static HChar *
+s390_irgen_LLGHRL(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, unop(Iop_16Uto64, load(Ity_I16, mkU64(guest_IA_curr_instr +
+ ((ULong)(Long)(Int)i2 << 1)))));
+
+ return "llghrl";
+}
+
+static HChar *
+s390_irgen_LLHH(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w0(r1, unop(Iop_16Uto32, load(Ity_I16, mkexpr(op2addr))));
+
+ return "llhh";
+}
+
+static HChar *
+s390_irgen_LLIHF(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
+
+ return "llihf";
+}
+
+static HChar *
+s390_irgen_LLIHH(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 48));
+
+ return "llihh";
+}
+
+static HChar *
+s390_irgen_LLIHL(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 32));
+
+ return "llihl";
+}
+
+static HChar *
+s390_irgen_LLILF(UChar r1, UInt i2)
+{
+ put_gpr_dw0(r1, mkU64(i2));
+
+ return "llilf";
+}
+
+static HChar *
+s390_irgen_LLILH(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(((ULong)i2) << 16));
+
+ return "llilh";
+}
+
+static HChar *
+s390_irgen_LLILL(UChar r1, UShort i2)
+{
+ put_gpr_dw0(r1, mkU64(i2));
+
+ return "llill";
+}
+
+static HChar *
+s390_irgen_LLGTR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, get_gpr_w1(r2),
+ mkU32(2147483647))));
+
+ return "llgtr";
+}
+
+static HChar *
+s390_irgen_LLGT(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, unop(Iop_32Uto64, binop(Iop_And32, load(Ity_I32,
+ mkexpr(op2addr)), mkU32(2147483647))));
+
+ return "llgt";
+}
+
+static HChar *
+s390_irgen_LNR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(result, mkite(binop(Iop_CmpLE32S, mkexpr(op2), mkU32(0)), mkexpr(op2),
+ binop(Iop_Sub32, mkU32(0), mkexpr(op2))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
+
+ return "lnr";
+}
+
+static HChar *
+s390_irgen_LNGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
+
+ return "lngr";
+}
+
+static HChar *
+s390_irgen_LNGFR(UChar r1, UChar r2 __attribute__((unused)))
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r1)));
+ assign(result, mkite(binop(Iop_CmpLE64S, mkexpr(op2), mkU64(0)), mkexpr(op2),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_BITWISE, result);
+
+ return "lngfr";
+}
+
+static HChar *
+s390_irgen_LPQ(UChar r1, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, load(Ity_I64, mkexpr(op2addr)));
+ put_gpr_dw0(r1 + 1, load(Ity_I64, binop(Iop_Add64, mkexpr(op2addr), mkU64(8))
+ ));
+
+ return "lpq";
+}
+
+static HChar *
+s390_irgen_LPR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(result, mkite(binop(Iop_CmpLT32S, mkexpr(op2), mkU32(0)),
+ binop(Iop_Sub32, mkU32(0), mkexpr(op2)), mkexpr(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_32, op2);
+
+ return "lpr";
+}
+
+static HChar *
+s390_irgen_LPGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
+
+ return "lpgr";
+}
+
+static HChar *
+s390_irgen_LPGFR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, mkite(binop(Iop_CmpLT64S, mkexpr(op2), mkU64(0)),
+ binop(Iop_Sub64, mkU64(0), mkexpr(op2)), mkexpr(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_POSITIVE_64, op2);
+
+ return "lpgfr";
+}
+
+static HChar *
+s390_irgen_LRVR(UChar r1, UChar r2)
+{
+ IRTemp b0 = newTemp(Ity_I8);
+ IRTemp b1 = newTemp(Ity_I8);
+ IRTemp b2 = newTemp(Ity_I8);
+ IRTemp b3 = newTemp(Ity_I8);
+
+ assign(b3, get_gpr_b7(r2));
+ assign(b2, get_gpr_b6(r2));
+ assign(b1, get_gpr_b5(r2));
+ assign(b0, get_gpr_b4(r2));
+ put_gpr_b4(r1, mkexpr(b3));
+ put_gpr_b5(r1, mkexpr(b2));
+ put_gpr_b6(r1, mkexpr(b1));
+ put_gpr_b7(r1, mkexpr(b0));
+
+ return "lrvr";
+}
+
+static HChar *
+s390_irgen_LRVGR(UChar r1, UChar r2)
+{
+ IRTemp b0 = newTemp(Ity_I8);
+ IRTemp b1 = newTemp(Ity_I8);
+ IRTemp b2 = newTemp(Ity_I8);
+ IRTemp b3 = newTemp(Ity_I8);
+ IRTemp b4 = newTemp(Ity_I8);
+ IRTemp b5 = newTemp(Ity_I8);
+ IRTemp b6 = newTemp(Ity_I8);
+ IRTemp b7 = newTemp(Ity_I8);
+
+ assign(b7, get_gpr_b7(r2));
+ assign(b6, get_gpr_b6(r2));
+ assign(b5, get_gpr_b5(r2));
+ assign(b4, get_gpr_b4(r2));
+ assign(b3, get_gpr_b3(r2));
+ assign(b2, get_gpr_b2(r2));
+ assign(b1, get_gpr_b1(r2));
+ assign(b0, get_gpr_b0(r2));
+ put_gpr_b0(r1, mkexpr(b7));
+ put_gpr_b1(r1, mkexpr(b6));
+ put_gpr_b2(r1, mkexpr(b5));
+ put_gpr_b3(r1, mkexpr(b4));
+ put_gpr_b4(r1, mkexpr(b3));
+ put_gpr_b5(r1, mkexpr(b2));
+ put_gpr_b6(r1, mkexpr(b1));
+ put_gpr_b7(r1, mkexpr(b0));
+
+ return "lrvgr";
+}
+
+static HChar *
+s390_irgen_LRVH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I16);
+
+ assign(op2, load(Ity_I16, mkexpr(op2addr)));
+ put_gpr_b6(r1, unop(Iop_16to8, mkexpr(op2)));
+ put_gpr_b7(r1, unop(Iop_16HIto8, mkexpr(op2)));
+
+ return "lrvh";
+}
+
+static HChar *
+s390_irgen_LRV(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_And32, mkexpr(op2), mkU32(255))));
+ put_gpr_b5(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
+ mkU8(8)), mkU32(255))));
+ put_gpr_b6(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
+ mkU8(16)), mkU32(255))));
+ put_gpr_b7(r1, unop(Iop_32to8, binop(Iop_And32, binop(Iop_Shr32, mkexpr(op2),
+ mkU8(24)), mkU32(255))));
+
+ return "lrv";
+}
+
+static HChar *
+s390_irgen_LRVG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ put_gpr_b0(r1, unop(Iop_64to8, binop(Iop_And64, mkexpr(op2), mkU64(255))));
+ put_gpr_b1(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(8)), mkU64(255))));
+ put_gpr_b2(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(16)), mkU64(255))));
+ put_gpr_b3(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(24)), mkU64(255))));
+ put_gpr_b4(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(32)), mkU64(255))));
+ put_gpr_b5(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(40)), mkU64(255))));
+ put_gpr_b6(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(48)), mkU64(255))));
+ put_gpr_b7(r1, unop(Iop_64to8, binop(Iop_And64, binop(Iop_Shr64, mkexpr(op2),
+ mkU8(56)), mkU64(255))));
+
+ return "lrvg";
+}
+
+static HChar *
+s390_irgen_MVHHI(UShort i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU16(i2));
+
+ return "mvhhi";
+}
+
+static HChar *
+s390_irgen_MVHI(UShort i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU32((UInt)(Int)(Short)i2));
+
+ return "mvhi";
+}
+
+static HChar *
+s390_irgen_MVGHI(UShort i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU64((ULong)(Long)(Short)i2));
+
+ return "mvghi";
+}
+
+static HChar *
+s390_irgen_MVI(UChar i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU8(i2));
+
+ return "mvi";
+}
+
+static HChar *
+s390_irgen_MVIY(UChar i2, IRTemp op1addr)
+{
+ store(mkexpr(op1addr), mkU8(i2));
+
+ return "mviy";
+}
+
+static HChar *
+s390_irgen_MR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mr";
+}
+
+static HChar *
+s390_irgen_M(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "m";
+}
+
+static HChar *
+s390_irgen_MFY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mfy";
+}
+
+static HChar *
+s390_irgen_MH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I16);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I16, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
+ ));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mh";
+}
+
+static HChar *
+s390_irgen_MHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I16);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I16, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32, mkexpr(op2))
+ ));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mhy";
+}
+
+static HChar *
+s390_irgen_MHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Short op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Short)i2;
+ assign(result, binop(Iop_MullS32, mkexpr(op1), unop(Iop_16Sto32,
+ mkU16((UShort)op2))));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mhi";
+}
+
+static HChar *
+s390_irgen_MGHI(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Short op2;
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Short)i2;
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_16Sto64,
+ mkU16((UShort)op2))));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "mghi";
+}
+
+static HChar *
+s390_irgen_MLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "mlr";
+}
+
+static HChar *
+s390_irgen_MLGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1 + 1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
+
+ return "mlgr";
+}
+
+static HChar *
+s390_irgen_ML(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1 + 1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullU32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "ml";
+}
+
+static HChar *
+s390_irgen_MLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1 + 1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullU64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result)));
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result)));
+
+ return "mlg";
+}
+
+static HChar *
+s390_irgen_MSR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "msr";
+}
+
+static HChar *
+s390_irgen_MSGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgr";
+}
+
+static HChar *
+s390_irgen_MSGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
+ ));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgfr";
+}
+
+static HChar *
+s390_irgen_MS(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "ms";
+}
+
+static HChar *
+s390_irgen_MSY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "msy";
+}
+
+static HChar *
+s390_irgen_MSG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msg";
+}
+
+static HChar *
+s390_irgen_MSGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkexpr(op2))
+ ));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgf";
+}
+
+static HChar *
+s390_irgen_MSFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ Int op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_MullS32, mkexpr(op1), mkU32((UInt)op2)));
+ put_gpr_w1(r1, unop(Iop_64to32, mkexpr(result)));
+
+ return "msfi";
+}
+
+static HChar *
+s390_irgen_MSGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ Int op2;
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (Int)i2;
+ assign(result, binop(Iop_MullS64, mkexpr(op1), unop(Iop_32Sto64, mkU32((UInt)
+ op2))));
+ put_gpr_dw0(r1, unop(Iop_128to64, mkexpr(result)));
+
+ return "msgfi";
+}
+
+static HChar *
+s390_irgen_OR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "or";
+}
+
+static HChar *
+s390_irgen_OGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ogr";
+}
+
+static HChar *
+s390_irgen_ORK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Or32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "ork";
+}
+
+static HChar *
+s390_irgen_OGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Or64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "ogrk";
+}
+
+static HChar *
+s390_irgen_O(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "o";
+}
+
+static HChar *
+s390_irgen_OY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "oy";
+}
+
+static HChar *
+s390_irgen_OG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Or64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "og";
+}
+
+static HChar *
+s390_irgen_OI(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "oi";
+}
+
+static HChar *
+s390_irgen_OIY(UChar i2, IRTemp op1addr)
+{
+ IRTemp op1 = newTemp(Ity_I8);
+ UChar op2;
+ IRTemp result = newTemp(Ity_I8);
+
+ assign(op1, load(Ity_I8, mkexpr(op1addr)));
+ op2 = i2;
+ assign(result, binop(Iop_Or8, mkexpr(op1), mkU8(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ store(mkexpr(op1addr), mkexpr(result));
+
+ return "oiy";
+}
+
+static HChar *
+s390_irgen_OIHF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "oihf";
+}
+
+static HChar *
+s390_irgen_OIHH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw0(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw0(r1, mkexpr(result));
+
+ return "oihh";
+}
+
+static HChar *
+s390_irgen_OIHL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw1(r1, mkexpr(result));
+
+ return "oihl";
+}
+
+static HChar *
+s390_irgen_OILF(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "oilf";
+}
+
+static HChar *
+s390_irgen_OILH(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw2(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw2(r1, mkexpr(result));
+
+ return "oilh";
+}
+
+static HChar *
+s390_irgen_OILL(UChar r1, UShort i2)
+{
+ IRTemp op1 = newTemp(Ity_I16);
+ UShort op2;
+ IRTemp result = newTemp(Ity_I16);
+
+ assign(op1, get_gpr_hw3(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Or16, mkexpr(op1), mkU16(op2)));
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+ put_gpr_hw3(r1, mkexpr(result));
+
+ return "oill";
+}
+
+static HChar *
+s390_irgen_PFD(void)
+{
+
+ return "pfd";
+}
+
+static HChar *
+s390_irgen_PFDRL(void)
+{
+
+ return "pfdrl";
+}
+
+static HChar *
+s390_irgen_RLL(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(31)));
+ assign(op, get_gpr_w1(r3));
+ put_gpr_w1(r1, binop(Iop_Or32, binop(Iop_Shl32, mkexpr(op), unop(Iop_64to8,
+ mkexpr(amount))), binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8,
+ binop(Iop_Sub64, mkU64(32), mkexpr(amount))))));
+
+ return "rll";
+}
+
+static HChar *
+s390_irgen_RLLG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(op, get_gpr_dw0(r3));
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(op), unop(Iop_64to8,
+ mkexpr(amount))), binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8,
+ binop(Iop_Sub64, mkU64(64), mkexpr(amount))))));
+
+ return "rllg";
+}
+
+static HChar *
+s390_irgen_RNSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar t_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ t_bit = i3 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ assign(result, binop(Iop_And64, binop(Iop_And64, get_gpr_dw0(r1), mkexpr(op2)
+ ), mkU64(mask)));
+ if (t_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), mkexpr(result)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+
+ return "rnsbg";
+}
+
+static HChar *
+s390_irgen_RXSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar t_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ t_bit = i3 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ assign(result, binop(Iop_And64, binop(Iop_Xor64, get_gpr_dw0(r1), mkexpr(op2)
+ ), mkU64(mask)));
+ if (t_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), mkexpr(result)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+
+ return "rxsbg";
+}
+
+static HChar *
+s390_irgen_ROSBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar t_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ t_bit = i3 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ assign(result, binop(Iop_And64, binop(Iop_Or64, get_gpr_dw0(r1), mkexpr(op2)
+ ), mkU64(mask)));
+ if (t_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), mkexpr(result)));
+ }
+ s390_cc_thunk_putZ(S390_CC_OP_BITWISE, result);
+
+ return "rosbg";
+}
+
+static HChar *
+s390_irgen_RISBG(UChar r1, UChar r2, UChar i3, UChar i4, UChar i5)
+{
+ UChar from;
+ UChar to;
+ UChar rot;
+ UChar z_bit;
+ ULong mask;
+ ULong maskc;
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ from = i3 & 63;
+ to = i4 & 63;
+ rot = i5 & 63;
+ z_bit = i4 & 128;
+ assign(op2, rot == 0 ? get_gpr_dw0(r2) : binop(Iop_Or64, binop(Iop_Shl64,
+ get_gpr_dw0(r2), mkU8(rot)), binop(Iop_Shr64, get_gpr_dw0(r2),
+ mkU8(64 - rot))));
+ if (from <= to) {
+ mask = ~0ULL;
+ mask = (mask >> from) & (mask << (63 - to));
+ maskc = ~mask;
+ } else {
+ maskc = ~0ULL;
+ maskc = (maskc >> (to + 1)) & (maskc << (64 - from));
+ mask = ~maskc;
+ }
+ if (z_bit == 0) {
+ put_gpr_dw0(r1, binop(Iop_Or64, binop(Iop_And64, get_gpr_dw0(r1),
+ mkU64(maskc)), binop(Iop_And64, mkexpr(op2), mkU64(mask))));
+ } else {
+ put_gpr_dw0(r1, binop(Iop_And64, mkexpr(op2), mkU64(mask)));
+ }
+ assign(result, get_gpr_dw0(r1));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, op2);
+
+ return "risbg";
+}
+
+static HChar *
+s390_irgen_SAR(UChar r1, UChar r2)
+{
+ put_ar_w0(r1, get_gpr_w1(r2));
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ s390_disasm(ENC3(MNM, AR, GPR), "sar", r1, r2);
+
+ return "sar";
+}
+
+static HChar *
+s390_irgen_SLDA(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ Long sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(op, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1), mkU8(32)), mkexpr(p2)
+ ));
+ sign_mask = 1ULL << 63;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(op),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU64((ULong)(~sign_mask))),
+ binop(Iop_And64, mkexpr(op), mkU64((ULong)sign_mask))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
+
+ return "slda";
+}
+
+static HChar *
+s390_irgen_SLDL(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(result, binop(Iop_Shl64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "sldl";
+}
+
+static HChar *
+s390_irgen_SLA(UChar r1, IRTemp op2addr)
+{
+ IRTemp uop = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ UInt sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r1));
+ assign(uop, get_gpr_w1(r1));
+ sign_mask = 2147483648U;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
+ binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
+
+ return "sla";
+}
+
+static HChar *
+s390_irgen_SLAK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp uop = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ UInt sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r3));
+ assign(uop, get_gpr_w1(r3));
+ sign_mask = 2147483648U;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or32, binop(Iop_And32, binop(Iop_Shl32, mkexpr(uop),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU32(~sign_mask)),
+ binop(Iop_And32, mkexpr(uop), mkU32(sign_mask))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_32, op, shift_amount);
+
+ return "slak";
+}
+
+static HChar *
+s390_irgen_SLAG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp uop = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ ULong sign_mask;
+ IRTemp shift_amount = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(op, get_gpr_dw0(r3));
+ assign(uop, get_gpr_dw0(r3));
+ sign_mask = 9223372036854775808ULL;
+ assign(shift_amount, binop(Iop_And64, mkexpr(op2addr), mkU64(63)));
+ assign(result, binop(Iop_Or64, binop(Iop_And64, binop(Iop_Shl64, mkexpr(uop),
+ unop(Iop_64to8, mkexpr(shift_amount))), mkU64(~sign_mask)),
+ binop(Iop_And64, mkexpr(uop), mkU64(sign_mask))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putZZ(S390_CC_OP_SHIFT_LEFT_64, op, shift_amount);
+
+ return "slag";
+}
+
+static HChar *
+s390_irgen_SLL(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r1), unop(Iop_64to8,
+ binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
+
+ return "sll";
+}
+
+static HChar *
+s390_irgen_SLLK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ put_gpr_w1(r1, binop(Iop_Shl32, get_gpr_w1(r3), unop(Iop_64to8,
+ binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
+
+ return "sllk";
+}
+
+static HChar *
+s390_irgen_SLLG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ put_gpr_dw0(r1, binop(Iop_Shl64, get_gpr_dw0(r3), unop(Iop_64to8,
+ binop(Iop_And64, mkexpr(op2addr), mkU64(63)))));
+
+ return "sllg";
+}
+
+static HChar *
+s390_irgen_SRDA(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(result, binop(Iop_Sar64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "srda";
+}
+
+static HChar *
+s390_irgen_SRDL(UChar r1, IRTemp op2addr)
+{
+ IRTemp p1 = newTemp(Ity_I64);
+ IRTemp p2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(p1, unop(Iop_32Uto64, get_gpr_w1(r1)));
+ assign(p2, unop(Iop_32Uto64, get_gpr_w1(r1 + 1)));
+ assign(result, binop(Iop_Shr64, binop(Iop_Or64, binop(Iop_Shl64, mkexpr(p1),
+ mkU8(32)), mkexpr(p2)), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result)));
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result)));
+
+ return "srdl";
+}
+
+static HChar *
+s390_irgen_SRA(UChar r1, IRTemp op2addr)
+{
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r1));
+ assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "sra";
+}
+
+static HChar *
+s390_irgen_SRAK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r3));
+ assign(result, binop(Iop_Sar32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "srak";
+}
+
+static HChar *
+s390_irgen_SRAG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(op, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Sar64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putS(S390_CC_OP_LOAD_AND_TEST, result);
+
+ return "srag";
+}
+
+static HChar *
+s390_irgen_SRL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r1));
+ put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+
+ return "srl";
+}
+
+static HChar *
+s390_irgen_SRLK(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_I32);
+
+ assign(op, get_gpr_w1(r3));
+ put_gpr_w1(r1, binop(Iop_Shr32, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+
+ return "srlk";
+}
+
+static HChar *
+s390_irgen_SRLG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_I64);
+
+ assign(op, get_gpr_dw0(r3));
+ put_gpr_dw0(r1, binop(Iop_Shr64, mkexpr(op), unop(Iop_64to8, binop(Iop_And64,
+ mkexpr(op2addr), mkU64(63)))));
+
+ return "srlg";
+}
+
+static HChar *
+s390_irgen_ST(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_w1(r1));
+
+ return "st";
+}
+
+static HChar *
+s390_irgen_STY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_w1(r1));
+
+ return "sty";
+}
+
+static HChar *
+s390_irgen_STG(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_dw0(r1));
+
+ return "stg";
+}
+
+static HChar *
+s390_irgen_STRL(UChar r1, UInt i2)
+{
+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
+ get_gpr_w1(r1));
+
+ return "strl";
+}
+
+static HChar *
+s390_irgen_STGRL(UChar r1, UInt i2)
+{
+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
+ get_gpr_dw0(r1));
+
+ return "stgrl";
+}
+
+static HChar *
+s390_irgen_STC(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+
+ return "stc";
+}
+
+static HChar *
+s390_irgen_STCY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+
+ return "stcy";
+}
+
+static HChar *
+s390_irgen_STCH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b3(r1));
+
+ return "stch";
+}
+
+static HChar *
+s390_irgen_STCM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar mask;
+ UChar n;
+
+ mask = (UChar)r3;
+ n = 0;
+ if ((mask & 8) != 0) {
+ store(mkexpr(op2addr), get_gpr_b4(r1));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
+ }
+
+ return "stcm";
+}
+
+static HChar *
+s390_irgen_STCMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar mask;
+ UChar n;
+
+ mask = (UChar)r3;
+ n = 0;
+ if ((mask & 8) != 0) {
+ store(mkexpr(op2addr), get_gpr_b4(r1));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b5(r1));
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b6(r1));
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b7(r1));
+ }
+
+ return "stcmy";
+}
+
+static HChar *
+s390_irgen_STCMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar mask;
+ UChar n;
+
+ mask = (UChar)r3;
+ n = 0;
+ if ((mask & 8) != 0) {
+ store(mkexpr(op2addr), get_gpr_b0(r1));
+ n = n + 1;
+ }
+ if ((mask & 4) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b1(r1));
+ n = n + 1;
+ }
+ if ((mask & 2) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b2(r1));
+ n = n + 1;
+ }
+ if ((mask & 1) != 0) {
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(n)), get_gpr_b3(r1));
+ }
+
+ return "stcmh";
+}
+
+static HChar *
+s390_irgen_STH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_hw3(r1));
+
+ return "sth";
+}
+
+static HChar *
+s390_irgen_STHY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_hw3(r1));
+
+ return "sthy";
+}
+
+static HChar *
+s390_irgen_STHRL(UChar r1, UInt i2)
+{
+ store(mkU64(guest_IA_curr_instr + ((ULong)(Long)(Int)i2 << 1)),
+ get_gpr_hw3(r1));
+
+ return "sthrl";
+}
+
+static HChar *
+s390_irgen_STHH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_hw1(r1));
+
+ return "sthh";
+}
+
+static HChar *
+s390_irgen_STFH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_w0(r1));
+
+ return "stfh";
+}
+
+static HChar *
+s390_irgen_STPQ(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_dw0(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(8)), get_gpr_dw0(r1 + 1));
+
+ return "stpq";
+}
+
+static HChar *
+s390_irgen_STRVH(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
+
+ return "strvh";
+}
+
+static HChar *
+s390_irgen_STRV(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
+
+ return "strv";
+}
+
+static HChar *
+s390_irgen_STRVG(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_gpr_b7(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(1)), get_gpr_b6(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(2)), get_gpr_b5(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(3)), get_gpr_b4(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(4)), get_gpr_b3(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(5)), get_gpr_b2(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(6)), get_gpr_b1(r1));
+ store(binop(Iop_Add64, mkexpr(op2addr), mkU64(7)), get_gpr_b0(r1));
+
+ return "strvg";
+}
+
+static HChar *
+s390_irgen_SR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sr";
+}
+
+static HChar *
+s390_irgen_SGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgr";
+}
+
+static HChar *
+s390_irgen_SGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgfr";
+}
+
+static HChar *
+s390_irgen_SRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "srk";
+}
+
+static HChar *
+s390_irgen_SGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgrk";
+}
+
+static HChar *
+s390_irgen_S(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "s";
+}
+
+static HChar *
+s390_irgen_SY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sy";
+}
+
+static HChar *
+s390_irgen_SG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sg";
+}
+
+static HChar *
+s390_irgen_SGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "sgf";
+}
+
+static HChar *
+s390_irgen_SH(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sh";
+}
+
+static HChar *
+s390_irgen_SHY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, unop(Iop_16Sto32, load(Ity_I16, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "shy";
+}
+
+static HChar *
+s390_irgen_SHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w0(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "shhhr";
+}
+
+static HChar *
+s390_irgen_SHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putSS(S390_CC_OP_SIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "shhlr";
+}
+
+static HChar *
+s390_irgen_SLR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slr";
+}
+
+static HChar *
+s390_irgen_SLGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgr";
+}
+
+static HChar *
+s390_irgen_SLGFR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, get_gpr_w1(r2)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgfr";
+}
+
+static HChar *
+s390_irgen_SLRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ assign(op3, get_gpr_w1(r3));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slrk";
+}
+
+static HChar *
+s390_irgen_SLGRK(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ assign(op3, get_gpr_dw0(r3));
+ assign(result, binop(Iop_Sub64, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op2, op3);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgrk";
+}
+
+static HChar *
+s390_irgen_SL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sl";
+}
+
+static HChar *
+s390_irgen_SLY(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, op2);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "sly";
+}
+
+static HChar *
+s390_irgen_SLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slg";
+}
+
+static HChar *
+s390_irgen_SLGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, unop(Iop_32Uto64, load(Ity_I32, mkexpr(op2addr))));
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, op2);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgf";
+}
+
+static HChar *
+s390_irgen_SLFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ UInt op2;
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ op2 = i2;
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkU32(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op1, mktemp(Ity_I32,
+ mkU32(op2)));
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slfi";
+}
+
+static HChar *
+s390_irgen_SLGFI(UChar r1, UInt i2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ ULong op2;
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ op2 = (ULong)i2;
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkU64(op2)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_64, op1, mktemp(Ity_I64,
+ mkU64(op2)));
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slgfi";
+}
+
+static HChar *
+s390_irgen_SLHHHR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w0(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "slhhhr";
+}
+
+static HChar *
+s390_irgen_SLHHLR(UChar r3 __attribute__((unused)), UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w0(r1));
+ assign(op3, get_gpr_w1(r2));
+ assign(result, binop(Iop_Sub32, mkexpr(op2), mkexpr(op3)));
+ s390_cc_thunk_putZZ(S390_CC_OP_UNSIGNED_SUB_32, op2, op3);
+ put_gpr_w0(r1, mkexpr(result));
+
+ return "slhhlr";
+}
+
+static HChar *
+s390_irgen_SLBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp borrow_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, get_gpr_w1(r2));
+ assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
+ s390_call_calculate_cc(), mkU8(1))));
+ assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slbr";
+}
+
+static HChar *
+s390_irgen_SLBGR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp borrow_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, get_gpr_dw0(r2));
+ assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
+ binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
+ assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slbgr";
+}
+
+static HChar *
+s390_irgen_SLB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp op2 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp borrow_in = newTemp(Ity_I32);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+ assign(borrow_in, binop(Iop_Sub32, mkU32(1), binop(Iop_Shr32,
+ s390_call_calculate_cc(), mkU8(1))));
+ assign(result, binop(Iop_Sub32, binop(Iop_Sub32, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_32, op1, op2, borrow_in);
+ put_gpr_w1(r1, mkexpr(result));
+
+ return "slb";
+}
+
+static HChar *
+s390_irgen_SLBG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp op2 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp borrow_in = newTemp(Ity_I64);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+ assign(borrow_in, unop(Iop_32Uto64, binop(Iop_Sub32, mkU32(1),
+ binop(Iop_Shr32, s390_call_calculate_cc(), mkU8(1)))));
+ assign(result, binop(Iop_Sub64, binop(Iop_Sub64, mkexpr(op1), mkexpr(op2)),
+ mkexpr(borrow_in)));
+ s390_cc_thunk_putZZZ(S390_CC_OP_UNSIGNED_SUBB_64, op1, op2, borrow_in);
+ put_gpr_dw0(r1, mkexpr(result));
+
+ return "slbg";
+}
+
+static HChar *
+s390_irgen_SVC(UChar i)
+{
+ IRTemp sysno = newTemp(Ity_I64);
+
+ if (i != 0) {
+ assign(sysno, mkU64(i));
+ } else {
+ assign(sysno, unop(Iop_32Uto64, get_gpr_w1(1)));
+ }
+ system_call(mkexpr(sysno));
+
+ return "svc";
+}
+
+static HChar *
+s390_irgen_TS(IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_I8);
+
+ assign(value, load(Ity_I8, mkexpr(op2addr)));
+ s390_cc_thunk_putZ(S390_CC_OP_TEST_AND_SET, value);
+ store(mkexpr(op2addr), mkU8(255));
+
+ return "ts";
+}
+
+static HChar *
+s390_irgen_TM(UChar i2, IRTemp op1addr)
+{
+ UChar mask;
+ IRTemp value = newTemp(Ity_I8);
+
+ mask = i2;
+ assign(value, load(Ity_I8, mkexpr(op1addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
+ mkU8(mask)));
+
+ return "tm";
+}
+
+static HChar *
+s390_irgen_TMY(UChar i2, IRTemp op1addr)
+{
+ UChar mask;
+ IRTemp value = newTemp(Ity_I8);
+
+ mask = i2;
+ assign(value, load(Ity_I8, mkexpr(op1addr)));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_8, value, mktemp(Ity_I8,
+ mkU8(mask)));
+
+ return "tmy";
+}
+
+static HChar *
+s390_irgen_TMHH(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw0(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmhh";
+}
+
+static HChar *
+s390_irgen_TMHL(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw1(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmhl";
+}
+
+static HChar *
+s390_irgen_TMLH(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw2(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmlh";
+}
+
+static HChar *
+s390_irgen_TMLL(UChar r1, UShort i2)
+{
+ UShort mask;
+ IRTemp value = newTemp(Ity_I16);
+
+ mask = i2;
+ assign(value, get_gpr_hw3(r1));
+ s390_cc_thunk_putZZ(S390_CC_OP_TEST_UNDER_MASK_16, value, mktemp(Ity_I16,
+ mkU16(mask)));
+
+ return "tmll";
+}
+
+static HChar *
+s390_irgen_EFPC(UChar r1)
+{
+ put_gpr_w1(r1, get_fpc_w0());
+
+ return "efpc";
+}
+
+static HChar *
+s390_irgen_LER(UChar r1, UChar r2)
+{
+ put_fpr_w0(r1, get_fpr_w0(r2));
+
+ return "ler";
+}
+
+static HChar *
+s390_irgen_LDR(UChar r1, UChar r2)
+{
+ put_fpr_dw0(r1, get_fpr_dw0(r2));
+
+ return "ldr";
+}
+
+static HChar *
+s390_irgen_LXR(UChar r1, UChar r2)
+{
+ put_fpr_dw0(r1, get_fpr_dw0(r2));
+ put_fpr_dw0(r1 + 2, get_fpr_dw0(r2 + 2));
+
+ return "lxr";
+}
+
+static HChar *
+s390_irgen_LE(UChar r1, IRTemp op2addr)
+{
+ put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
+
+ return "le";
+}
+
+static HChar *
+s390_irgen_LD(UChar r1, IRTemp op2addr)
+{
+ put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
+
+ return "ld";
+}
+
+static HChar *
+s390_irgen_LEY(UChar r1, IRTemp op2addr)
+{
+ put_fpr_w0(r1, load(Ity_F32, mkexpr(op2addr)));
+
+ return "ley";
+}
+
+static HChar *
+s390_irgen_LDY(UChar r1, IRTemp op2addr)
+{
+ put_fpr_dw0(r1, load(Ity_F64, mkexpr(op2addr)));
+
+ return "ldy";
+}
+
+static HChar *
+s390_irgen_LFPC(IRTemp op2addr)
+{
+ put_fpc_w0(load(Ity_I32, mkexpr(op2addr)));
+
+ return "lfpc";
+}
+
+static HChar *
+s390_irgen_LZER(UChar r1)
+{
+ put_fpr_w0(r1, mkF32i(0x0));
+
+ return "lzer";
+}
+
+static HChar *
+s390_irgen_LZDR(UChar r1)
+{
+ put_fpr_dw0(r1, mkF64i(0x0));
+
+ return "lzdr";
+}
+
+static HChar *
+s390_irgen_LZXR(UChar r1)
+{
+ put_fpr_dw0(r1, mkF64i(0x0));
+ put_fpr_dw0(r1 + 2, mkF64i(0x0));
+
+ return "lzxr";
+}
+
+static HChar *
+s390_irgen_SRNM(IRTemp op2addr)
+{
+ UInt mask;
+
+ mask = 3;
+ put_fpc_w0(binop(Iop_Or32, binop(Iop_And32, get_fpc_w0(), mkU32(~mask)),
+ binop(Iop_And32, unop(Iop_64to32, mkexpr(op2addr)), mkU32(mask)))
+ );
+
+ return "srnm";
+}
+
+static HChar *
+s390_irgen_SFPC(UChar r1)
+{
+ put_fpc_w0(get_gpr_w1(r1));
+
+ return "sfpc";
+}
+
+static HChar *
+s390_irgen_STE(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_w0(r1));
+
+ return "ste";
+}
+
+static HChar *
+s390_irgen_STD(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_dw0(r1));
+
+ return "std";
+}
+
+static HChar *
+s390_irgen_STEY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_w0(r1));
+
+ return "stey";
+}
+
+static HChar *
+s390_irgen_STDY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpr_dw0(r1));
+
+ return "stdy";
+}
+
+static HChar *
+s390_irgen_STFPC(IRTemp op2addr)
+{
+ store(mkexpr(op2addr), get_fpc_w0());
+
+ return "stfpc";
+}
+
+static HChar *
+s390_irgen_AEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "aebr";
+}
+
+static HChar *
+s390_irgen_ADBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "adbr";
+}
+
+static HChar *
+s390_irgen_AEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_AddF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "aeb";
+}
+
+static HChar *
+s390_irgen_ADB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_AddF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "adb";
+}
+
+static HChar *
+s390_irgen_CEFBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_fpr_w0(r1, binop(Iop_I32StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
+
+ return "cefbr";
+}
+
+static HChar *
+s390_irgen_CDFBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_fpr_dw0(r1, unop(Iop_I32StoF64, mkexpr(op2)));
+
+ return "cdfbr";
+}
+
+static HChar *
+s390_irgen_CEGBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_fpr_w0(r1, binop(Iop_I64StoF32, mkU32(Irrm_NEAREST), mkexpr(op2)));
+
+ return "cegbr";
+}
+
+static HChar *
+s390_irgen_CDGBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_fpr_dw0(r1, binop(Iop_I64StoF64, mkU32(Irrm_NEAREST), mkexpr(op2)));
+
+ return "cdgbr";
+}
+
+static HChar *
+s390_irgen_CFEBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op, get_fpr_w0(r2));
+ assign(result, binop(Iop_F32toI32S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_32, op);
+
+ return "cfebr";
+}
+
+static HChar *
+s390_irgen_CFDBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op, get_fpr_dw0(r2));
+ assign(result, binop(Iop_F64toI32S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_32, op);
+
+ return "cfdbr";
+}
+
+static HChar *
+s390_irgen_CGEBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op, get_fpr_w0(r2));
+ assign(result, binop(Iop_F32toI64S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_32_TO_INT_64, op);
+
+ return "cgebr";
+}
+
+static HChar *
+s390_irgen_CGDBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op, get_fpr_dw0(r2));
+ assign(result, binop(Iop_F64toI64S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_64_TO_INT_64, op);
+
+ return "cgdbr";
+}
+
+static HChar *
+s390_irgen_DEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "debr";
+}
+
+static HChar *
+s390_irgen_DDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "ddbr";
+}
+
+static HChar *
+s390_irgen_DEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_DivF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "deb";
+}
+
+static HChar *
+s390_irgen_DDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_DivF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "ddb";
+}
+
+static HChar *
+s390_irgen_LTEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, get_fpr_w0(r2));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "ltebr";
+}
+
+static HChar *
+s390_irgen_LTDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, get_fpr_dw0(r2));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "ltdbr";
+}
+
+static HChar *
+s390_irgen_LCEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, unop(Iop_NegF32, get_fpr_w0(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "lcebr";
+}
+
+static HChar *
+s390_irgen_LCDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "lcdbr";
+}
+
+static HChar *
+s390_irgen_LDEBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, get_fpr_w0(r2));
+ put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
+
+ return "ldebr";
+}
+
+static HChar *
+s390_irgen_LDEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, load(Ity_F32, mkexpr(op2addr)));
+ put_fpr_dw0(r1, unop(Iop_F32toF64, mkexpr(op)));
+
+ return "ldeb";
+}
+
+static HChar *
+s390_irgen_LEDBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, get_fpr_dw0(r2));
+ put_fpr_w0(r1, binop(Iop_F64toF32, mkU32(Irrm_NEAREST), mkexpr(op)));
+
+ return "ledbr";
+}
+
+static HChar *
+s390_irgen_MEEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "meebr";
+}
+
+static HChar *
+s390_irgen_MDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "mdbr";
+}
+
+static HChar *
+s390_irgen_MEEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_MulF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "meeb";
+}
+
+static HChar *
+s390_irgen_MDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_MulF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "mdb";
+}
+
+static HChar *
+s390_irgen_SEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "sebr";
+}
+
+static HChar *
+s390_irgen_SDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "sdbr";
+}
+
+static HChar *
+s390_irgen_SEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(result, triop(Iop_SubF32, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_32, result);
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "seb";
+}
+
+static HChar *
+s390_irgen_SDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(result, triop(Iop_SubF64, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ s390_cc_thunk_putF(S390_CC_OP_BFP_RESULT_64, result);
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "sdb";
+}
+
+
+static HChar *
+s390_irgen_CLC(UChar length, IRTemp start1, IRTemp start2)
+{
+ IRTemp current1 = newTemp(Ity_I8);
+ IRTemp current2 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+
+ assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
+ mkexpr(counter))));
+ assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ mkexpr(counter))));
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
+ False);
+
+ /* Both fields differ ? */
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
+ guest_IA_next_instr);
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+
+ return "clc";
+}
+
+static HChar *
+s390_irgen_CLCLE(UChar r1, UChar r3, IRTemp pad2)
+{
+ IRTemp addr1, addr3, addr1_load, addr3_load, len1, len3, single1, single3;
+
+ addr1 = newTemp(Ity_I64);
+ addr3 = newTemp(Ity_I64);
+ addr1_load = newTemp(Ity_I64);
+ addr3_load = newTemp(Ity_I64);
+ len1 = newTemp(Ity_I64);
+ len3 = newTemp(Ity_I64);
+ single1 = newTemp(Ity_I8);
+ single3 = newTemp(Ity_I8);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(len1, get_gpr_dw0(r1 + 1));
+ assign(addr3, get_gpr_dw0(r3));
+ assign(len3, get_gpr_dw0(r3 + 1));
+
+ /* len1 == 0 and len3 == 0? Exit */
+ s390_cc_set(0);
+ if_condition_goto(binop(Iop_CmpEQ64,binop(Iop_Or64, mkexpr(len1),
+ mkexpr(len3)), mkU64(0)),
+ guest_IA_next_instr);
+
+ /* A mux requires both ways to be possible. This is a way to prevent clcle
+ from reading from addr1 if it should read from the pad. Since the pad
+ has no address, just read from the instruction, we discard that anyway */
+ assign(addr1_load,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
+ mkexpr(addr1),
+ mkU64(guest_IA_curr_instr)));
+
+ /* same for addr3 */
+ assign(addr3_load,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
+ mkexpr(addr3),
+ mkU64(guest_IA_curr_instr)));
+
+ assign(single1,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
+ load(Ity_I8, mkexpr(addr1_load)),
+ unop(Iop_64to8, mkexpr(pad2))));
+
+ assign(single3,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
+ load(Ity_I8, mkexpr(addr3_load)),
+ unop(Iop_64to8, mkexpr(pad2))));
+
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, single1, single3, False);
+ /* Both fields differ ? */
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(single1), mkexpr(single3)),
+ guest_IA_next_instr);
+
+ /* If a length in 0 we must not change this length and the address */
+ put_gpr_dw0(r1,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
+ binop(Iop_Add64, mkexpr(addr1), mkU64(1)),
+ mkexpr(addr1)));
+
+ put_gpr_dw0(r1 + 1,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len1), mkU64(0))),
+ binop(Iop_Sub64, mkexpr(len1), mkU64(1)),
+ mkU64(0)));
+
+ put_gpr_dw0(r3,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
+ binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
+ mkexpr(addr3)));
+
+ put_gpr_dw0(r3 + 1,
+ IRExpr_Mux0X(unop(Iop_1Uto8,
+ binop(Iop_CmpEQ64, mkexpr(len3), mkU64(0))),
+ binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
+ mkU64(0)));
+
+ /* The architecture requires that we exit with CC3 after a machine specific
+ amount of bytes. We do that if len1+len3 % 4096 == 0 */
+ s390_cc_set(3);
+ if_condition_goto(binop(Iop_CmpEQ64,
+ binop(Iop_And64,
+ binop(Iop_Add64, mkexpr(len1), mkexpr(len3)),
+ mkU64(0xfff)),
+ mkU64(0)),
+ guest_IA_next_instr);
+
+ always_goto(mkU64(guest_IA_curr_instr));
+
+ return "clcle";
+}
+static void
+s390_irgen_XC_EX(IRTemp length, IRTemp start1, IRTemp start2)
+{
+ IRTemp old1 = newTemp(Ity_I8);
+ IRTemp old2 = newTemp(Ity_I8);
+ IRTemp new1 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I32);
+ IRTemp addr1 = newTemp(Ity_I64);
+
+ assign(counter, get_counter_w0());
+
+ assign(addr1, binop(Iop_Add64, mkexpr(start1),
+ unop(Iop_32Uto64, mkexpr(counter))));
+
+ assign(old1, load(Ity_I8, mkexpr(addr1)));
+ assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ unop(Iop_32Uto64,mkexpr(counter)))));
+ assign(new1, binop(Iop_Xor8, mkexpr(old1), mkexpr(old2)));
+
+ store(mkexpr(addr1),
+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
+ mkexpr(start2))),
+ mkexpr(new1), mkU8(0)));
+ put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
+ get_counter_w1()));
+
+ /* Check for end of field */
+ put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkexpr(length)),
+ guest_IA_curr_instr);
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
+ False);
+ put_counter_dw0(mkU64(0));
+}
+
+
+static void
+s390_irgen_CLC_EX(IRTemp length, IRTemp start1, IRTemp start2)
+{
+ IRTemp current1 = newTemp(Ity_I8);
+ IRTemp current2 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+
+ assign(current1, load(Ity_I8, binop(Iop_Add64, mkexpr(start1),
+ mkexpr(counter))));
+ assign(current2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ mkexpr(counter))));
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, current1, current2,
+ False);
+
+ /* Both fields differ ? */
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(current1), mkexpr(current2)),
+ guest_IA_next_instr);
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+}
+
+static void
+s390_irgen_MVC_EX(IRTemp length, IRTemp start1, IRTemp start2)
+{
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+
+ store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
+ load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkexpr(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+}
+
+
+
+static void
+s390_irgen_EX_SS(UChar r, IRTemp addr2,
+void (*irgen)(IRTemp length, IRTemp start1, IRTemp start2), int lensize)
+{
+ struct SS {
+ unsigned int op : 8;
+ unsigned int l : 8;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ };
+ union {
+ struct SS dec;
+ unsigned long bytes;
+ } ss;
+ IRTemp cond;
+ IRDirty *d;
+ IRTemp torun;
+
+ IRTemp start1 = newTemp(Ity_I64);
+ IRTemp start2 = newTemp(Ity_I64);
+ IRTemp len = newTemp(lensize == 64 ? Ity_I64 : Ity_I32);
+ cond = newTemp(Ity_I1);
+ torun = newTemp(Ity_I64);
+
+ assign(torun, load(Ity_I64, mkexpr(addr2)));
+ /* Start with a check that the saved code is still correct */
+ assign(cond, binop(Iop_CmpNE64, mkexpr(torun), mkU64(last_execute_target)));
+ /* If not, save the new value */
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
+ mkIRExprVec_1(mkexpr(torun)));
+ d->guard = mkexpr(cond);
+ stmt(IRStmt_Dirty(d));
+
+ /* and restart */
+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
+ stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
+ IRConst_U64(guest_IA_curr_instr)));
+
+ ss.bytes = last_execute_target;
+ assign(start1, binop(Iop_Add64, mkU64(ss.dec.d1),
+ ss.dec.b1 != 0 ? get_gpr_dw0(ss.dec.b1) : mkU64(0)));
+ assign(start2, binop(Iop_Add64, mkU64(ss.dec.d2),
+ ss.dec.b2 != 0 ? get_gpr_dw0(ss.dec.b2) : mkU64(0)));
+ assign(len, unop(lensize == 64 ? Iop_8Uto64 : Iop_8Uto32, binop(Iop_Or8,
+ r != 0 ? get_gpr_b7(r): mkU8(0), mkU8(ss.dec.l))));
+ irgen(len, start1, start2);
+ last_execute_target = 0;
+}
+
+static HChar *
+s390_irgen_EX(UChar r1, IRTemp addr2)
+{
+ switch(last_execute_target & 0xff00000000000000ULL) {
+ case 0:
+ {
+ /* no code information yet */
+ IRDirty *d;
+
+ /* so safe the code... */
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
+ mkIRExprVec_1(load(Ity_I64, mkexpr(addr2))));
+ stmt(IRStmt_Dirty(d));
+ /* and restart */
+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
+ stmt(IRStmt_Exit(IRExpr_Const(IRConst_U1(True)), Ijk_TInval,
+ IRConst_U64(guest_IA_curr_instr)));
+ /* we know that this will be invalidated */
+ irsb->next = mkU64(guest_IA_next_instr);
+ dis_res->whatNext = Dis_StopHere;
+ break;
+ }
+
+ case 0xd200000000000000ULL:
+ /* special case MVC */
+ s390_irgen_EX_SS(r1, addr2, s390_irgen_MVC_EX, 64);
+ return "mvc via ex";
+
+ case 0xd500000000000000ULL:
+ /* special case CLC */
+ s390_irgen_EX_SS(r1, addr2, s390_irgen_CLC_EX, 64);
+ return "clc via ex";
+
+ case 0xd700000000000000ULL:
+ /* special case XC */
+ s390_irgen_EX_SS(r1, addr2, s390_irgen_XC_EX, 32);
+ return "xc via ex";
+
+
+ default:
+ {
+ /* everything else will get a self checking prefix that also checks the
+ register content */
+ IRDirty *d;
+ UChar *bytes;
+ IRTemp cond;
+ IRTemp orperand;
+ IRTemp torun;
+
+ cond = newTemp(Ity_I1);
+ orperand = newTemp(Ity_I64);
+ torun = newTemp(Ity_I64);
+
+ if (r1 == 0)
+ assign(orperand, mkU64(0));
+ else
+ assign(orperand, unop(Iop_8Uto64,get_gpr_b7(r1)));
+ /* This code is going to be translated */
+ assign(torun, binop(Iop_Or64, load(Ity_I64, mkexpr(addr2)),
+ binop(Iop_Shl64, mkexpr(orperand), mkU8(48))));
+
+ /* Start with a check that saved code is still correct */
+ assign(cond, binop(Iop_CmpNE64, mkexpr(torun),
+ mkU64(last_execute_target)));
+ /* If not, save the new value */
+ d = unsafeIRDirty_0_N (0, "s390x_dirtyhelper_EX", &s390x_dirtyhelper_EX,
+ mkIRExprVec_1(mkexpr(torun)));
+ d->guard = mkexpr(cond);
+ stmt(IRStmt_Dirty(d));
+
+ /* and restart */
+ stmt(IRStmt_Put(OFFB_TISTART, mkU64(guest_IA_curr_instr)));
+ stmt(IRStmt_Put(OFFB_TILEN, mkU64(4)));
+ stmt(IRStmt_Exit(mkexpr(cond), Ijk_TInval,
+ IRConst_U64(guest_IA_curr_instr)));
+
+ /* Now comes the actual translation */
+ bytes = (UChar *) &last_execute_target;
+ s390_decode_and_irgen(bytes, ((((bytes[0] >> 6) + 1) >> 1) + 1) << 1,
+ dis_res);
+ if (unlikely(vex_traceflags & VEX_TRACE_FE))
+ vex_printf(" which was executed by\n");
+ /* dont make useless translations in the next execute */
+ last_execute_target = 0;
+ }
+ }
+ return "ex";
+}
+
+static HChar *
+s390_irgen_EXRL(UChar r1, UInt offset)
+{
+ IRTemp addr = newTemp(Ity_I64);
+ /* we might save one round trip because we know the target */
+ if (!last_execute_target)
+ last_execute_target = *(ULong *)(HWord)
+ (guest_IA_curr_instr + offset * 2UL);
+ assign(addr, mkU64(guest_IA_curr_instr + offset * 2UL));
+ s390_irgen_EX(r1, addr);
+ return "exrl";
+}
+
+static HChar *
+s390_irgen_IPM(UChar r1)
+{
+ // As long as we dont support SPM, lets just assume 0 as program mask
+ put_gpr_b4(r1, unop(Iop_32to8, binop(Iop_Or32, mkU32(0 /* program mask */),
+ binop(Iop_Shl32, s390_call_calculate_cc(), mkU8(4)))));
+
+ return "ipm";
+}
+
+
+static HChar *
+s390_irgen_SRST(UChar r1, UChar r2)
+{
+ IRTemp address = newTemp(Ity_I64);
+ IRTemp next = newTemp(Ity_I64);
+ IRTemp delim = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+ IRTemp byte = newTemp(Ity_I8);
+
+ assign(address, get_gpr_dw0(r2));
+ assign(next, get_gpr_dw0(r1));
+
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+
+ // start = next? CC=2 and out r1 and r2 unchanged
+ s390_cc_set(2);
+ put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address), mkexpr(counter)));
+ if_condition_goto(binop(Iop_CmpEQ64, mkexpr(address), mkexpr(next)),
+ guest_IA_next_instr);
+
+ assign(byte, load(Ity_I8, mkexpr(address)));
+ assign(delim, get_gpr_b7(0));
+
+ // byte = delim? CC=1, R1=address
+ s390_cc_set(1);
+ put_gpr_dw0(r1, mkexpr(address));
+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(delim), mkexpr(byte)),
+ guest_IA_next_instr);
+
+ // else: all equal, no end yet, loop
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ put_gpr_dw0(r1, mkexpr(next));
+ put_gpr_dw0(r2, binop(Iop_Add64, mkexpr(address), mkU64(1)));
+ stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
+ Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
+ // >= 256 bytes done CC=3
+ s390_cc_set(3);
+ put_counter_dw0(mkU64(0));
+
+ return "srst";
+}
+
+static HChar *
+s390_irgen_CLST(UChar r1, UChar r2)
+{
+ IRTemp address1 = newTemp(Ity_I64);
+ IRTemp address2 = newTemp(Ity_I64);
+ IRTemp end = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+ IRTemp byte1 = newTemp(Ity_I8);
+ IRTemp byte2 = newTemp(Ity_I8);
+
+ assign(address1, get_gpr_dw0(r1));
+ assign(address2, get_gpr_dw0(r2));
+ assign(end, get_gpr_b7(0));
+ assign(counter, get_counter_dw0());
+ put_counter_dw0(mkU64(0));
+ assign(byte1, load(Ity_I8, mkexpr(address1)));
+ assign(byte2, load(Ity_I8, mkexpr(address2)));
+
+ // end in both? all equal, reset r1 and r2 to start values
+ s390_cc_set(0);
+ put_gpr_dw0(r1, binop(Iop_Sub64, mkexpr(address1), mkexpr(counter)));
+ put_gpr_dw0(r2, binop(Iop_Sub64, mkexpr(address2), mkexpr(counter)));
+ if_condition_goto(binop(Iop_CmpEQ8, mkU8(0),
+ binop(Iop_Or8,
+ binop(Iop_Xor8, mkexpr(byte1), mkexpr(end)),
+ binop(Iop_Xor8, mkexpr(byte2), mkexpr(end)))),
+ guest_IA_next_instr);
+
+ put_gpr_dw0(r1, mkexpr(address1));
+ put_gpr_dw0(r2, mkexpr(address2));
+
+ // End found in string1
+ s390_cc_set(1);
+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte1)),
+ guest_IA_next_instr);
+
+ // End found in string2
+ s390_cc_set(2);
+ if_condition_goto(binop(Iop_CmpEQ8, mkexpr(end), mkexpr(byte2)),
+ guest_IA_next_instr);
+
+ // string1 < string2
+ s390_cc_set(1);
+ if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte1)),
+ unop(Iop_8Uto32, mkexpr(byte2))),
+ guest_IA_next_instr);
+
+ // string2 < string1
+ s390_cc_set(2);
+ if_condition_goto(binop(Iop_CmpLT32U, unop(Iop_8Uto32, mkexpr(byte2)),
+ unop(Iop_8Uto32, mkexpr(byte1))),
+ guest_IA_next_instr);
+
+ // else: all equal, no end yet, loop
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ put_gpr_dw0(r1, binop(Iop_Add64, get_gpr_dw0(r1), mkU64(1)));
+ put_gpr_dw0(r2, binop(Iop_Add64, get_gpr_dw0(r2), mkU64(1)));
+ stmt(IRStmt_Exit(binop(Iop_CmpNE64, mkexpr(counter), mkU64(255)),
+ Ijk_Boring, IRConst_U64(guest_IA_curr_instr)));
+ // >= 256 bytes done CC=3
+ s390_cc_set(3);
+ put_counter_dw0(mkU64(0));
+
+ return "clst";
+}
+
+static void
+s390_irgen_load_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_gpr_w1(reg, load(Ity_I32, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_LM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_multiple_32bit(r1, r3, op2addr);
+
+ return "lm";
+}
+
+static HChar *
+s390_irgen_LMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_multiple_32bit(r1, r3, op2addr);
+
+ return "lmy";
+}
+
+static HChar *
+s390_irgen_LMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_gpr_w0(reg, load(Ity_I32, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+
+ return "lmh";
+}
+
+static HChar *
+s390_irgen_LMG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_gpr_dw0(reg, load(Ity_I64, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
+ reg++;
+ } while (reg != (r3 + 1));
+
+ return "lmg";
+}
+
+static void
+s390_irgen_store_multiple_32bit(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_gpr_w1(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while( reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_STM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_multiple_32bit(r1, r3, op2addr);
+
+ return "stm";
+}
+
+static HChar *
+s390_irgen_STMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_multiple_32bit(r1, r3, op2addr);
+
+ return "stmy";
+}
+
+static HChar *
+s390_irgen_STMH(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_gpr_w0(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while( reg != (r3 + 1));
+
+ return "stmh";
+}
+
+static HChar *
+s390_irgen_STMG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_gpr_dw0(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(8)));
+ reg++;
+ } while( reg != (r3 + 1));
+
+ return "stmg";
+}
+
+static void
+s390_irgen_XONC(IROp op, UChar length, IRTemp start1, IRTemp start2)
+{
+ IRTemp old1 = newTemp(Ity_I8);
+ IRTemp old2 = newTemp(Ity_I8);
+ IRTemp new1 = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I32);
+ IRTemp addr1 = newTemp(Ity_I64);
+
+ assign(counter, get_counter_w0());
+
+ assign(addr1, binop(Iop_Add64, mkexpr(start1),
+ unop(Iop_32Uto64, mkexpr(counter))));
+
+ assign(old1, load(Ity_I8, mkexpr(addr1)));
+ assign(old2, load(Ity_I8, binop(Iop_Add64, mkexpr(start2),
+ unop(Iop_32Uto64,mkexpr(counter)))));
+ assign(new1, binop(op, mkexpr(old1), mkexpr(old2)));
+
+ /* Special case: xc is used to zero memory */
+ /* fixs390: we also want an instrumentation time shortcut */
+ if (op == Iop_Xor8) {
+ store(mkexpr(addr1),
+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(start1),
+ mkexpr(start2))),
+ mkexpr(new1), mkU8(0)));
+ } else
+ store(mkexpr(addr1), mkexpr(new1));
+ put_counter_w1(binop(Iop_Or32, unop(Iop_8Uto32, mkexpr(new1)),
+ get_counter_w1()));
+
+ /* Check for end of field */
+ put_counter_w0(binop(Iop_Add32, mkexpr(counter), mkU32(1)));
+ if_condition_goto(binop(Iop_CmpNE32, mkexpr(counter), mkU32(length)),
+ guest_IA_curr_instr);
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, mktemp(Ity_I32, get_counter_w1()),
+ False);
+ put_counter_dw0(mkU64(0));
+}
+
+static HChar *
+s390_irgen_XC(UChar length, IRTemp start1, IRTemp start2)
+{
+ s390_irgen_XONC(Iop_Xor8, length, start1, start2);
+
+ return "xc";
+}
+
+static HChar *
+s390_irgen_NC(UChar length, IRTemp start1, IRTemp start2)
+{
+ s390_irgen_XONC(Iop_And8, length, start1, start2);
+
+ return "nc";
+}
+
+static HChar *
+s390_irgen_OC(UChar length, IRTemp start1, IRTemp start2)
+{
+ s390_irgen_XONC(Iop_Or8, length, start1, start2);
+
+ return "oc";
+}
+
+
+static HChar *
+s390_irgen_MVC(UChar length, IRTemp start1, IRTemp start2)
+{
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(counter, get_counter_dw0());
+
+ store(binop(Iop_Add64, mkexpr(start1), mkexpr(counter)),
+ load(Ity_I8, binop(Iop_Add64, mkexpr(start2), mkexpr(counter))));
+
+ /* Check for end of field */
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(counter), mkU64(length)),
+ guest_IA_curr_instr);
+ put_counter_dw0(mkU64(0));
+
+ return "mvc";
+}
+
+static HChar *
+s390_irgen_MVCLE(UChar r1, UChar r3, IRTemp pad2)
+{
+ IRTemp addr1, addr3, addr3_load, len1, len3, single;
+
+ addr1 = newTemp(Ity_I64);
+ addr3 = newTemp(Ity_I64);
+ addr3_load = newTemp(Ity_I64);
+ len1 = newTemp(Ity_I64);
+ len3 = newTemp(Ity_I64);
+ single = newTemp(Ity_I8);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(len1, get_gpr_dw0(r1 + 1));
+ assign(addr3, get_gpr_dw0(r3));
+ assign(len3, get_gpr_dw0(r3 + 1));
+
+ // len1 == 0 ?
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
+ if_condition_goto(binop(Iop_CmpEQ64,mkexpr(len1), mkU64(0)),
+ guest_IA_next_instr);
+
+ /* This is a hack to prevent mvcle from reading from addr3 if it
+ should read from the pad. Since the pad has no address, just
+ read from the instruction, we discard that anyway */
+ assign(addr3_load,
+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
+ mkU64(0))),
+ mkexpr(addr3),
+ mkU64(guest_IA_curr_instr)));
+
+ assign(single,
+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
+ mkU64(0))),
+ load(Ity_I8, mkexpr(addr3_load)),
+ unop(Iop_64to8, mkexpr(pad2))));
+ store(mkexpr(addr1), mkexpr(single));
+
+ put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkU64(1)));
+
+ put_gpr_dw0(r1 + 1, binop(Iop_Sub64, mkexpr(len1), mkU64(1)));
+
+ put_gpr_dw0(r3,
+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
+ mkU64(0))),
+ binop(Iop_Add64, mkexpr(addr3), mkU64(1)),
+ mkexpr(addr3)));
+
+ put_gpr_dw0(r3 + 1,
+ IRExpr_Mux0X(unop(Iop_1Uto8, binop(Iop_CmpEQ64, mkexpr(len3),
+ mkU64(0))),
+ binop(Iop_Sub64, mkexpr(len3), mkU64(1)),
+ mkU64(0)));
+
+ /* We should set CC=3 (faked by overflow add) and leave after
+ a maximum of ~4096 bytes have been processed. This is simpler:
+ we leave whenever (len1 % 4096) == 0 */
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_ADD_64, mktemp(Ity_I64, mkU64(-1ULL)),
+
+ mktemp(Ity_I64, mkU64(-1ULL)), False);
+ if_condition_goto(binop(Iop_CmpEQ64,
+ binop(Iop_And64, mkexpr(len1), mkU64(0xfff)),
+ mkU64(0)),
+ guest_IA_next_instr);
+
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, len1, len3, False);
+ if_condition_goto(binop(Iop_CmpNE64, mkexpr(len1), mkU64(1)),
+ guest_IA_curr_instr);
+
+ return "mvcle";
+}
+
+static HChar *
+s390_irgen_MVST(UChar r1, UChar r2)
+{
+ IRTemp addr1 = newTemp(Ity_I64);
+ IRTemp addr2 = newTemp(Ity_I64);
+ IRTemp end = newTemp(Ity_I8);
+ IRTemp byte = newTemp(Ity_I8);
+ IRTemp counter = newTemp(Ity_I64);
+
+ assign(addr1, get_gpr_dw0(r1));
+ assign(addr2, get_gpr_dw0(r2));
+ assign(counter, get_counter_dw0());
+ assign(end, get_gpr_b7(0));
+ assign(byte, load(Ity_I8, binop(Iop_Add64, mkexpr(addr2),mkexpr(counter))));
+ store(binop(Iop_Add64,mkexpr(addr1),mkexpr(counter)), mkexpr(byte));
+
+ // We use unlimited as cpu-determined number
+ put_counter_dw0(binop(Iop_Add64, mkexpr(counter), mkU64(1)));
+ if_condition_goto(binop(Iop_CmpNE8, mkexpr(end), mkexpr(byte)),
+ guest_IA_curr_instr);
+
+ // and always set cc=1 at the end + update r1
+ s390_cc_set(1);
+ put_gpr_dw0(r1, binop(Iop_Add64, mkexpr(addr1), mkexpr(counter)));
+ put_counter_dw0(mkU64(0));
+
+ return "mvst";
+}
+
+static void
+s390_irgen_divide_64to32(IROp op, UChar r1, IRTemp op2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op1, binop(Iop_32HLto64,
+ get_gpr_w1(r1), // high 32 bits
+ get_gpr_w1(r1 + 1))); // low 32 bits
+ assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
+ put_gpr_w1(r1, unop(Iop_64HIto32, mkexpr(result))); // remainder
+ put_gpr_w1(r1 + 1, unop(Iop_64to32, mkexpr(result))); // quotient
+}
+
+static void
+s390_irgen_divide_128to64(IROp op, UChar r1, IRTemp op2)
+{
+ IRTemp op1 = newTemp(Ity_I128);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, binop(Iop_64HLto128,
+ get_gpr_dw0(r1), // high 64 bits
+ get_gpr_dw0(r1 + 1))); // low 64 bits
+ assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
+}
+
+static void
+s390_irgen_divide_64to64(IROp op, UChar r1, IRTemp op2)
+{
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I128);
+
+ assign(op1, get_gpr_dw0(r1 + 1));
+ assign(result, binop(op, mkexpr(op1), mkexpr(op2)));
+ put_gpr_dw0(r1, unop(Iop_128HIto64, mkexpr(result))); // remainder
+ put_gpr_dw0(r1 + 1, unop(Iop_128to64, mkexpr(result))); // quotient
+}
+
+static HChar *
+s390_irgen_DR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+
+ s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
+
+ return "dr";
+}
+
+static HChar *
+s390_irgen_D(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+
+ s390_irgen_divide_64to32(Iop_DivModS64to32, r1, op2);
+
+ return "d";
+}
+
+static HChar *
+s390_irgen_DLR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+
+ s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
+
+ return "dr";
+}
+
+static HChar *
+s390_irgen_DL(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, load(Ity_I32, mkexpr(op2addr)));
+
+ s390_irgen_divide_64to32(Iop_DivModU64to32, r1, op2);
+
+ return "dl";
+}
+
+static HChar *
+s390_irgen_DLG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+
+ s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
+
+ return "dlg";
+}
+
+static HChar *
+s390_irgen_DLGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+
+ s390_irgen_divide_128to64(Iop_DivModU128to64, r1, op2);
+
+ return "dlgr";
+}
+
+static HChar *
+s390_irgen_DSGR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsgr";
+}
+
+static HChar *
+s390_irgen_DSG(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, load(Ity_I64, mkexpr(op2addr)));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsg";
+}
+
+static HChar *
+s390_irgen_DSGFR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, get_gpr_w1(r2)));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsgfr";
+}
+
+static HChar *
+s390_irgen_DSGF(UChar r1, IRTemp op2addr)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, unop(Iop_32Sto64, load(Ity_I32, mkexpr(op2addr))));
+
+ s390_irgen_divide_64to64(Iop_DivModS64to64, r1, op2);
+
+ return "dsgf";
+}
+
+static void
+s390_irgen_load_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ put_ar_w0(reg, load(Ity_I32, mkexpr(addr)));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_LAM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_ar_multiple(r1, r3, op2addr);
+
+ return "lam";
+}
+
+static HChar *
+s390_irgen_LAMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_load_ar_multiple(r1, r3, op2addr);
+
+ return "lamy";
+}
+
+static void
+s390_irgen_store_ar_multiple(UChar r1, UChar r3, IRTemp op2addr)
+{
+ UChar reg;
+ IRTemp addr = newTemp(Ity_I64);
+
+ assign(addr, mkexpr(op2addr));
+ reg = r1;
+ do {
+ IRTemp old = addr;
+
+ reg %= 16;
+ store(mkexpr(addr), get_ar_w0(reg));
+ addr = newTemp(Ity_I64);
+ assign(addr, binop(Iop_Add64, mkexpr(old), mkU64(4)));
+ reg++;
+ } while (reg != (r3 + 1));
+}
+
+static HChar *
+s390_irgen_STAM(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_ar_multiple(r1, r3, op2addr);
+
+ return "stam";
+}
+
+static HChar *
+s390_irgen_STAMY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_store_ar_multiple(r1, r3, op2addr);
+
+ return "stamy";
+}
+
+
+/* Implementation for 32-bit compare-and-swap */
+static void
+s390_irgen_cas_32(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRCAS *cas;
+ IRTemp op1 = newTemp(Ity_I32);
+ IRTemp old_mem = newTemp(Ity_I32);
+ IRTemp op3 = newTemp(Ity_I32);
+ IRTemp result = newTemp(Ity_I32);
+ IRTemp nequal = newTemp(Ity_I1);
+
+ assign(op1, get_gpr_w1(r1));
+ assign(op3, get_gpr_w1(r3));
+
+ /* The first and second operands are compared. If they are equal,
+ the third operand is stored at the second- operand location. */
+ cas = mkIRCAS(IRTemp_INVALID, old_mem,
+ Iend_BE, mkexpr(op2addr),
+ NULL, mkexpr(op1), /* expected value */
+ NULL, mkexpr(op3) /* new value */);
+ stmt(IRStmt_CAS(cas));
+
+ /* Set CC. Operands compared equal -> 0, else 1. */
+ assign(result, binop(Iop_Sub32, mkexpr(op1), mkexpr(old_mem)));
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
+
+ /* If operands were equal (cc == 0) just store the old value op1 in r1.
+ Otherwise, store the old_value from memory in r1 and yield. */
+ assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
+ put_gpr_w1(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
+ stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
+ IRConst_U64(guest_IA_next_instr)));
+}
+
+static HChar *
+s390_irgen_CS(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_cas_32(r1, r3, op2addr);
+
+ return "cs";
+}
+
+static HChar *
+s390_irgen_CSY(UChar r1, UChar r3, IRTemp op2addr)
+{
+ s390_irgen_cas_32(r1, r3, op2addr);
+
+ return "csy";
+}
+
+static HChar *
+s390_irgen_CSG(UChar r1, UChar r3, IRTemp op2addr)
+{
+ IRCAS *cas;
+ IRTemp op1 = newTemp(Ity_I64);
+ IRTemp old_mem = newTemp(Ity_I64);
+ IRTemp op3 = newTemp(Ity_I64);
+ IRTemp result = newTemp(Ity_I64);
+ IRTemp nequal = newTemp(Ity_I1);
+
+ assign(op1, get_gpr_dw0(r1));
+ assign(op3, get_gpr_dw0(r3));
+
+ /* The first and second operands are compared. If they are equal,
+ the third operand is stored at the second- operand location. */
+ cas = mkIRCAS(IRTemp_INVALID, old_mem,
+ Iend_BE, mkexpr(op2addr),
+ NULL, mkexpr(op1), /* expected value */
+ NULL, mkexpr(op3) /* new value */);
+ stmt(IRStmt_CAS(cas));
+
+ /* Set CC. Operands compared equal -> 0, else 1. */
+ assign(result, binop(Iop_Sub64, mkexpr(op1), mkexpr(old_mem)));
+ s390_cc_thunk_put1(S390_CC_OP_BITWISE, result, False);
+
+ /* If operands were equal (cc == 0) just store the old value op1 in r1.
+ Otherwise, store the old_value from memory in r1 and yield. */
+ assign(nequal, binop(Iop_CmpNE32, s390_call_calculate_cc(), mkU32(0)));
+ put_gpr_dw0(r1, mkite(mkexpr(nequal), mkexpr(old_mem), mkexpr(op1)));
+ stmt(IRStmt_Exit(mkexpr(nequal), Ijk_Yield,
+ IRConst_U64(guest_IA_next_instr)));
+
+ return "csg";
+}
+
+
+/* Binary floating point */
+
+static HChar *
+s390_irgen_AXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_AddF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "axbr";
+}
+
+/* The result of a Iop_CmdFxx operation is a condition code. It is
+ encoded using the values defined in type IRCmpFxxResult.
+ Before we can store the condition code into the guest state (or do
+ anything else with it for that matter) we need to convert it to
+ the encoding that s390 uses. This is what this function does.
+
+ s390 VEX b6 b2 b0 cc.1 cc.0
+ 0 0x40 EQ 1 0 0 0 0
+ 1 0x01 LT 0 0 1 0 1
+ 2 0x00 GT 0 0 0 1 0
+ 3 0x45 Unordered 1 1 1 1 1
+
+ The following bits from the VEX encoding are interesting:
+ b0, b2, b6 with b0 being the LSB. We observe:
+
+ cc.0 = b0;
+ cc.1 = b2 | (~b0 & ~b6)
+
+ with cc being the s390 condition code.
+*/
+static IRExpr *
+convert_vex_fpcc_to_s390(IRTemp vex_cc)
+{
+ IRTemp cc0 = newTemp(Ity_I32);
+ IRTemp cc1 = newTemp(Ity_I32);
+ IRTemp b0 = newTemp(Ity_I32);
+ IRTemp b2 = newTemp(Ity_I32);
+ IRTemp b6 = newTemp(Ity_I32);
+
+ assign(b0, binop(Iop_And32, mkexpr(vex_cc), mkU32(1)));
+ assign(b2, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(2)),
+ mkU32(1)));
+ assign(b6, binop(Iop_And32, binop(Iop_Shr32, mkexpr(vex_cc), mkU8(6)),
+ mkU32(1)));
+
+ assign(cc0, mkexpr(b0));
+ assign(cc1, binop(Iop_Or32, mkexpr(b2),
+ binop(Iop_And32,
+ binop(Iop_Sub32, mkU32(1), mkexpr(b0)), /* ~b0 */
+ binop(Iop_Sub32, mkU32(1), mkexpr(b6)) /* ~b6 */
+ )));
+
+ return binop(Iop_Or32, mkexpr(cc0), binop(Iop_Shl32, mkexpr(cc1), mkU8(1)));
+}
+
+static HChar *
+s390_irgen_CEBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, get_fpr_w0(r2));
+ assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cebr";
+}
+
+static HChar *
+s390_irgen_CDBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, get_fpr_dw0(r2));
+ assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cdbr";
+}
+
+static HChar *
+s390_irgen_CXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(cc_vex, binop(Iop_CmpF128, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cxbr";
+}
+
+static HChar *
+s390_irgen_CEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F32);
+ IRTemp op2 = newTemp(Ity_F32);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_w0(r1));
+ assign(op2, load(Ity_F32, mkexpr(op2addr)));
+ assign(cc_vex, binop(Iop_CmpF32, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "ceb";
+}
+
+static HChar *
+s390_irgen_CDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op1 = newTemp(Ity_F64);
+ IRTemp op2 = newTemp(Ity_F64);
+ IRTemp cc_vex = newTemp(Ity_I32);
+ IRTemp cc_s390 = newTemp(Ity_I32);
+
+ assign(op1, get_fpr_dw0(r1));
+ assign(op2, load(Ity_F64, mkexpr(op2addr)));
+ assign(cc_vex, binop(Iop_CmpF64, mkexpr(op1), mkexpr(op2)));
+
+ assign(cc_s390, convert_vex_fpcc_to_s390(cc_vex));
+ s390_cc_thunk_put1(S390_CC_OP_SET, cc_s390, False);
+
+ return "cdb";
+}
+
+static HChar *
+s390_irgen_CXFBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I32);
+
+ assign(op2, get_gpr_w1(r2));
+ put_fpr_pair(r1, unop(Iop_I32StoF128, mkexpr(op2)));
+
+ return "cxfbr";
+}
+
+static HChar *
+s390_irgen_CXGBR(UChar r1, UChar r2)
+{
+ IRTemp op2 = newTemp(Ity_I64);
+
+ assign(op2, get_gpr_dw0(r2));
+ put_fpr_pair(r1, unop(Iop_I64StoF128, mkexpr(op2)));
+
+ return "cxgbr";
+}
+
+static HChar *
+s390_irgen_CFXBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_I32);
+
+ assign(op, get_fpr_pair(r2));
+ assign(result, binop(Iop_F128toI32S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_w1(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_32, op);
+
+ return "cfxbr";
+}
+
+static HChar *
+s390_irgen_CGXBR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_I64);
+
+ assign(op, get_fpr_pair(r2));
+ assign(result, binop(Iop_F128toI64S, mkU32(encode_rounding_mode(r3)),
+ mkexpr(op)));
+ put_gpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_128_TO_INT_64, op);
+
+ return "cgxbr";
+}
+
+static HChar *
+s390_irgen_DXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_DivF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ return "dxbr";
+}
+
+static HChar *
+s390_irgen_LTXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, get_fpr_pair(r2));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "ltxbr";
+}
+
+static HChar *
+s390_irgen_LCXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, unop(Iop_NegF128, get_fpr_pair(r2)));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "lcxbr";
+}
+
+static HChar *
+s390_irgen_LXDBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, get_fpr_dw0(r2));
+ put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
+
+ return "lxdbr";
+}
+
+static HChar *
+s390_irgen_LXEBR(UChar r1, UChar r2)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, get_fpr_w0(r2));
+ put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
+
+ return "lxebr";
+}
+
+static HChar *
+s390_irgen_LXDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, load(Ity_F64, mkexpr(op2addr)));
+ put_fpr_pair(r1, unop(Iop_F64toF128, mkexpr(op)));
+
+ return "lxdb";
+}
+
+static HChar *
+s390_irgen_LXEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, load(Ity_F32, mkexpr(op2addr)));
+ put_fpr_pair(r1, unop(Iop_F32toF128, mkexpr(op)));
+
+ return "lxeb";
+}
+
+static HChar *
+s390_irgen_LNEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, unop(Iop_NegF32, unop(Iop_AbsF32, get_fpr_w0(r2))));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "lnebr";
+}
+
+static HChar *
+s390_irgen_LNDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "lndbr";
+}
+
+static HChar *
+s390_irgen_LNXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, unop(Iop_NegF128, unop(Iop_AbsF128, get_fpr_pair(r2))));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "lnxbr";
+}
+
+static HChar *
+s390_irgen_LPEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, unop(Iop_AbsF32, get_fpr_w0(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_32, result);
+
+ return "lpebr";
+}
+
+static HChar *
+s390_irgen_LPDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+ s390_cc_thunk_put1f(S390_CC_OP_BFP_RESULT_64, result);
+
+ return "lpdbr";
+}
+
+static HChar *
+s390_irgen_LPXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, unop(Iop_AbsF128, get_fpr_pair(r2)));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "lpxbr";
+}
+
+static HChar *
+s390_irgen_LDXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, binop(Iop_F128toF64, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "ldxbr";
+}
+
+static HChar *
+s390_irgen_LEXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, binop(Iop_F128toF32, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "lexbr";
+}
+
+static HChar *
+s390_irgen_MXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_MulF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ return "mxbr";
+}
+
+static HChar *
+s390_irgen_MAEBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
+
+ return "maebr";
+}
+
+static HChar *
+s390_irgen_MADBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
+
+ return "madbr";
+}
+
+static HChar *
+s390_irgen_MAEB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
+
+ put_fpr_w0(r1, qop(Iop_MAddF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), op2, get_fpr_w0(r3)));
+
+ return "maeb";
+}
+
+static HChar *
+s390_irgen_MADB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
+
+ put_fpr_dw0(r1, qop(Iop_MAddF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
+
+ return "madb";
+}
+
+static HChar *
+s390_irgen_MSEBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), get_fpr_w0(r2), get_fpr_w0(r3)));
+
+ return "msebr";
+}
+
+static HChar *
+s390_irgen_MSDBR(UChar r1, UChar r3, UChar r2)
+{
+ put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), get_fpr_dw0(r2), get_fpr_dw0(r3)));
+
+ return "msdbr";
+}
+
+static HChar *
+s390_irgen_MSEB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F32, mkexpr(op2addr));
+
+ put_fpr_w0(r1, qop(Iop_MSubF32, mkU32(Irrm_NEAREST),
+ get_fpr_w0(r1), op2, get_fpr_w0(r3)));
+
+ return "mseb";
+}
+
+static HChar *
+s390_irgen_MSDB(UChar r3, IRTemp op2addr, UChar r1)
+{
+ IRExpr *op2 = load(Ity_F64, mkexpr(op2addr));
+
+ put_fpr_dw0(r1, qop(Iop_MSubF64, mkU32(Irrm_NEAREST),
+ get_fpr_dw0(r1), op2, get_fpr_dw0(r3)));
+
+ return "msdb";
+}
+
+static HChar *
+s390_irgen_SQEBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F32);
+
+ assign(result, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), get_fpr_w0(r2)));
+ put_fpr_w0(r1, mkexpr(result));
+
+ return "sqebr";
+}
+
+static HChar *
+s390_irgen_SQDBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "sqdbr";
+}
+
+static HChar *
+s390_irgen_SQXBR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(result, binop(Iop_SqrtF128, mkU32(Irrm_NEAREST), get_fpr_pair(r2)));
+ put_fpr_pair(r1, mkexpr(result));
+
+ return "sqxbr";
+}
+
+static HChar *
+s390_irgen_SQEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F32);
+
+ assign(op, load(Ity_F32, mkexpr(op2addr)));
+ put_fpr_w0(r1, binop(Iop_SqrtF32, mkU32(Irrm_NEAREST), mkexpr(op)));
+
+ return "sqeb";
+}
+
+static HChar *
+s390_irgen_SQDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp op = newTemp(Ity_F64);
+
+ assign(op, load(Ity_F64, mkexpr(op2addr)));
+ put_fpr_dw0(r1, binop(Iop_SqrtF64, mkU32(Irrm_NEAREST), mkexpr(op)));
+
+ return "sqdb";
+}
+
+static HChar *
+s390_irgen_SXBR(UChar r1, UChar r2)
+{
+ IRTemp op1 = newTemp(Ity_F128);
+ IRTemp op2 = newTemp(Ity_F128);
+ IRTemp result = newTemp(Ity_F128);
+
+ assign(op1, get_fpr_pair(r1));
+ assign(op2, get_fpr_pair(r2));
+ assign(result, triop(Iop_SubF128, mkU32(Irrm_NEAREST), mkexpr(op1),
+ mkexpr(op2)));
+ put_fpr_pair(r1, mkexpr(result));
+ s390_cc_thunk_put1f128(S390_CC_OP_BFP_RESULT_128, result);
+
+ return "sxbr";
+}
+
+static HChar *
+s390_irgen_TCEB(UChar r1, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_F32);
+
+ assign(value, get_fpr_w0(r1));
+
+ s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_32, value, op2addr);
+
+ return "tceb";
+}
+
+static HChar *
+s390_irgen_TCDB(UChar r1, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_F64);
+
+ assign(value, get_fpr_dw0(r1));
+
+ s390_cc_thunk_putFZ(S390_CC_OP_BFP_TDC_64, value, op2addr);
+
+ return "tcdb";
+}
+
+static HChar *
+s390_irgen_TCXB(UChar r1, IRTemp op2addr)
+{
+ IRTemp value = newTemp(Ity_F128);
+
+ assign(value, get_fpr_pair(r1));
+
+ s390_cc_thunk_put1f128Z(S390_CC_OP_BFP_TDC_128, value, op2addr);
+
+ return "tcxb";
+}
+
+static HChar *
+s390_irgen_LCDFR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "lcdfr";
+}
+
+static HChar *
+s390_irgen_LNDFR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_NegF64, unop(Iop_AbsF64, get_fpr_dw0(r2))));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "lndfr";
+}
+
+static HChar *
+s390_irgen_LPDFR(UChar r1, UChar r2)
+{
+ IRTemp result = newTemp(Ity_F64);
+
+ assign(result, unop(Iop_AbsF64, get_fpr_dw0(r2)));
+ put_fpr_dw0(r1, mkexpr(result));
+
+ return "lpdfr";
+}
+
+static HChar *
+s390_irgen_LDGR(UChar r1, UChar r2)
+{
+ put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, get_gpr_dw0(r2)));
+
+ return "ldgr";
+}
+
+static HChar *
+s390_irgen_LGDR(UChar r1, UChar r2)
+{
+ put_gpr_dw0(r1, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)));
+
+ return "lgdr";
+}
+
+
+static HChar *
+s390_irgen_CPSDR(UChar r3, UChar r1, UChar r2)
+{
+ IRTemp sign = newTemp(Ity_I64);
+ IRTemp value = newTemp(Ity_I64);
+
+ assign(sign, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r3)),
+ mkU64(1ULL << 63)));
+ assign(value, binop(Iop_And64, unop(Iop_ReinterpF64asI64, get_fpr_dw0(r2)),
+ mkU64((1ULL << 63) - 1)));
+ put_fpr_dw0(r1, unop(Iop_ReinterpI64asF64, binop(Iop_Or64, mkexpr(value),
+ mkexpr(sign))));
+
+ return "cpsdr";
+}
+
+
+static UInt
+s390_do_cvb(ULong decimal)
+{
+#if defined(VGA_s390x)
+ UInt binary;
+
+ __asm__ volatile (
+ "cvb %[result],%[input]\n\t"
+ : [result] "=d"(binary)
+ : [input] "m"(decimal)
+ );
+
+ return binary;
+#else
+ return 0;
+#endif
+}
+
+static IRExpr *
+s390_call_cvb(IRExpr *in)
+{
+ IRExpr **args, *call;
+
+ args = mkIRExprVec_1(in);
+ call = mkIRExprCCall(Ity_I32, 0 /*regparm*/,
+ "s390_do_cvb", &s390_do_cvb, args);
+
+ /* Nothing is excluded from definedness checking. */
+ call->Iex.CCall.cee->mcx_mask = 0;
+
+ return call;
+}
+
+static HChar *
+s390_irgen_CVB(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
+
+ return "cvb";
+}
+
+static HChar *
+s390_irgen_CVBY(UChar r1, IRTemp op2addr)
+{
+ put_gpr_w1(r1, s390_call_cvb(load(Ity_I64, mkexpr(op2addr))));
+
+ return "cvby";
+}
+
+
+static ULong
+s390_do_cvd(ULong binary_in)
+{
+#if defined(VGA_s390x)
+ UInt binary = binary_in & 0xffffffffULL;
+ ULong decimal;
+
+ __asm__ volatile (
+ "cvd %[input],%[result]\n\t"
+ : [result] "=m"(decimal)
+ : [input] "d"(binary)
+ );
+
+ return decimal;
+#else
+ return 0;
+#endif
+}
+
+static IRExpr *
+s390_call_cvd(IRExpr *in)
+{
+ IRExpr **args, *call;
+
+ args = mkIRExprVec_1(in);
+ call = mkIRExprCCall(Ity_I64, 0 /*regparm*/,
+ "s390_do_cvd", &s390_do_cvd, args);
+
+ /* Nothing is excluded from definedness checking. */
+ call->Iex.CCall.cee->mcx_mask = 0;
+
+ return call;
+}
+
+static HChar *
+s390_irgen_CVD(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
+
+ return "cvd";
+}
+
+static HChar *
+s390_irgen_CVDY(UChar r1, IRTemp op2addr)
+{
+ store(mkexpr(op2addr), s390_call_cvd(get_gpr_w1(r1)));
+
+ return "cvdy";
+}
+
+static HChar *
+s390_irgen_FLOGR(UChar r1, UChar r2)
+{
+ IRTemp input = newTemp(Ity_I64);
+ IRTemp not_zero = newTemp(Ity_I64);
+ IRTemp tmpnum = newTemp(Ity_I64);
+ IRTemp num = newTemp(Ity_I64);
+ IRTemp shift_amount = newTemp(Ity_I8);
+
+ /* We use the "count leading zeroes" operator because the number of
+ leading zeroes is identical with the bit position of the first '1' bit.
+ However, that operator does not work when the input value is zero.
+ Therefore, we set the LSB of the input value to 1 and use Clz64 on
+ the modified value. If input == 0, then the result is 64. Otherwise,
+ the result of Clz64 is what we want. */
+
+ assign(input, get_gpr_dw0(r2));
+ assign(not_zero, binop(Iop_Or64, mkexpr(input), mkU64(1)));
+ assign(tmpnum, unop(Iop_Clz64, mkexpr(not_zero)));
+
+ /* num = (input == 0) ? 64 : tmpnum */
+ assign(num, mkite(binop(Iop_CmpEQ64, mkexpr(input), mkU64(0)),
+ /* == 0 */ mkU64(64),
+ /* != 0 */ mkexpr(tmpnum)));
+
+ put_gpr_dw0(r1, mkexpr(num));
+
+ /* Set the leftmost '1' bit of the input value to zero. The general scheme
+ is to first shift the input value by NUM + 1 bits to the left which
+ causes the leftmost '1' bit to disappear. Then we shift logically to
+ the right by NUM + 1 bits. Because the semantics of Iop_Shl64 and
+ Iop_Shr64 are undefined if the shift-amount is greater than or equal to
+ the width of the value-to-be-shifted, we need to special case
+ NUM + 1 >= 64. This is equivalent to INPUT != 0 && INPUT != 1.
+ For both such INPUT values the result will be 0. */
+
+ assign(shift_amount, unop(Iop_64to8, binop(Iop_Add64, mkexpr(num),
+ mkU64(1))));
+
+ put_gpr_dw0(r1 + 1,
+ mkite(binop(Iop_CmpLE64U, mkexpr(input), mkU64(1)),
+ /* == 0 || == 1*/ mkU64(0),
+ /* otherwise */
+ binop(Iop_Shr64,
+ binop(Iop_Shl64, mkexpr(input),
+ mkexpr(shift_amount)),
+ mkexpr(shift_amount))));
+
+ /* Compare the original value as an unsigned integer with 0. */
+ s390_cc_thunk_put2(S390_CC_OP_UNSIGNED_COMPARE, input,
+ mktemp(Ity_I64, mkU64(0)), False);
+
+ return "flogr";
+}
+
+/*------------------------------------------------------------*/
+/*--- Build IR for special instructions ---*/
+/*------------------------------------------------------------*/
+
+void
+s390_irgen_client_request(void)
+{
+ if (0)
+ vex_printf("%%R3 = client_request ( %%R2 )\n");
+
+ irsb->next = mkU64((ULong)(guest_IA_curr_instr
+ + S390_SPECIAL_OP_PREAMBLE_SIZE
+ + S390_SPECIAL_OP_SIZE));
+ irsb->jumpkind = Ijk_ClientReq;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+void
+s390_irgen_guest_NRADDR(void)
+{
+ if (0)
+ vex_printf("%%R3 = guest_NRADDR\n");
+
+ put_gpr_dw0(3, IRExpr_Get(S390_GUEST_OFFSET(guest_NRADDR), Ity_I64));
+}
+
+void
+s390_irgen_call_noredir(void)
+{
+ /* Continue after special op */
+ put_gpr_dw0(14, mkU64(guest_IA_curr_instr
+ + S390_SPECIAL_OP_PREAMBLE_SIZE
+ + S390_SPECIAL_OP_SIZE));
+
+ /* The address is in REG1, all parameters are in the right (guest) places */
+ irsb->next = get_gpr_dw0(1);
+ irsb->jumpkind = Ijk_NoRedir;
+
+ dis_res->whatNext = Dis_StopHere;
+}
+
+/* Force proper alignment for the structures below. */
+#pragma pack(1)
+
+
+static s390_decode_t
+s390_decode_2byte_and_irgen(UChar *bytes)
+{
+ typedef union {
+ struct {
+ unsigned int op : 16;
+ } E;
+ struct {
+ unsigned int op : 8;
+ unsigned int i : 8;
+ } I;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RR;
+ } formats;
+ union {
+ formats fmt;
+ UShort value;
+ } ovl;
+
+ vassert(sizeof(formats) == 2);
+
+ ((char *)(&ovl.value))[0] = bytes[0];
+ ((char *)(&ovl.value))[1] = bytes[1];
+
+ switch (ovl.value & 0xffff) {
+ case 0x0101: /* PR */ goto unimplemented;
+ case 0x0102: /* UPT */ goto unimplemented;
+ case 0x0104: /* PTFF */ goto unimplemented;
+ case 0x0107: /* SCKPF */ goto unimplemented;
+ case 0x010a: /* PFPO */ goto unimplemented;
+ case 0x010b: /* TAM */ goto unimplemented;
+ case 0x010c: /* SAM24 */ goto unimplemented;
+ case 0x010d: /* SAM31 */ goto unimplemented;
+ case 0x010e: /* SAM64 */ goto unimplemented;
+ case 0x01ff: /* TRAP2 */ goto unimplemented;
+ }
+
+ switch ((ovl.value & 0xff00) >> 8) {
+ case 0x04: /* SPM */ goto unimplemented;
+ case 0x05: /* BALR */ goto unimplemented;
+ case 0x06: s390_format_RR_RR(s390_irgen_BCTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x07: s390_format_RR(s390_irgen_BCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x0a: s390_format_I(s390_irgen_SVC, ovl.fmt.I.i); goto ok;
+ case 0x0b: /* BSM */ goto unimplemented;
+ case 0x0c: /* BASSM */ goto unimplemented;
+ case 0x0d: s390_format_RR_RR(s390_irgen_BASR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x0e: /* MVCL */ goto unimplemented;
+ case 0x0f: /* CLCL */ goto unimplemented;
+ case 0x10: s390_format_RR_RR(s390_irgen_LPR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x11: s390_format_RR_RR(s390_irgen_LNR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x12: s390_format_RR_RR(s390_irgen_LTR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x13: s390_format_RR_RR(s390_irgen_LCR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x14: s390_format_RR_RR(s390_irgen_NR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x15: s390_format_RR_RR(s390_irgen_CLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x16: s390_format_RR_RR(s390_irgen_OR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x17: s390_format_RR_RR(s390_irgen_XR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x18: s390_format_RR_RR(s390_irgen_LR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x19: s390_format_RR_RR(s390_irgen_CR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1a: s390_format_RR_RR(s390_irgen_AR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1b: s390_format_RR_RR(s390_irgen_SR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1c: s390_format_RR_RR(s390_irgen_MR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1d: s390_format_RR_RR(s390_irgen_DR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1e: s390_format_RR_RR(s390_irgen_ALR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x1f: s390_format_RR_RR(s390_irgen_SLR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x20: /* LPDR */ goto unimplemented;
+ case 0x21: /* LNDR */ goto unimplemented;
+ case 0x22: /* LTDR */ goto unimplemented;
+ case 0x23: /* LCDR */ goto unimplemented;
+ case 0x24: /* HDR */ goto unimplemented;
+ case 0x25: /* LDXR */ goto unimplemented;
+ case 0x26: /* MXR */ goto unimplemented;
+ case 0x27: /* MXDR */ goto unimplemented;
+ case 0x28: s390_format_RR_FF(s390_irgen_LDR, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x29: /* CDR */ goto unimplemented;
+ case 0x2a: /* ADR */ goto unimplemented;
+ case 0x2b: /* SDR */ goto unimplemented;
+ case 0x2c: /* MDR */ goto unimplemented;
+ case 0x2d: /* DDR */ goto unimplemented;
+ case 0x2e: /* AWR */ goto unimplemented;
+ case 0x2f: /* SWR */ goto unimplemented;
+ case 0x30: /* LPER */ goto unimplemented;
+ case 0x31: /* LNER */ goto unimplemented;
+ case 0x32: /* LTER */ goto unimplemented;
+ case 0x33: /* LCER */ goto unimplemented;
+ case 0x34: /* HER */ goto unimplemented;
+ case 0x35: /* LEDR */ goto unimplemented;
+ case 0x36: /* AXR */ goto unimplemented;
+ case 0x37: /* SXR */ goto unimplemented;
+ case 0x38: s390_format_RR_FF(s390_irgen_LER, ovl.fmt.RR.r1, ovl.fmt.RR.r2);
+ goto ok;
+ case 0x39: /* CER */ goto unimplemented;
+ case 0x3a: /* AER */ goto unimplemented;
+ case 0x3b: /* SER */ goto unimplemented;
+ case 0x3c: /* MDER */ goto unimplemented;
+ case 0x3d: /* DER */ goto unimplemented;
+ case 0x3e: /* AUR */ goto unimplemented;
+ case 0x3f: /* SUR */ goto unimplemented;
+ }
+
+ return S390_DECODE_UNKNOWN_INSN;
+
+ok:
+ return S390_DECODE_OK;
+
+unimplemented:
+ return S390_DECODE_UNIMPLEMENTED_INSN;
+}
+
+static s390_decode_t
+s390_decode_4byte_and_irgen(UChar *bytes)
+{
+ typedef union {
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int op2 : 4;
+ unsigned int i2 : 16;
+ } RI;
+ struct {
+ unsigned int op : 16;
+ unsigned int : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRE;
+ struct {
+ unsigned int op : 16;
+ unsigned int r1 : 4;
+ unsigned int : 4;
+ unsigned int r3 : 4;
+ unsigned int r2 : 4;
+ } RRF;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int m4 : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRF2;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRF3;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRR;
+ struct {
+ unsigned int op : 16;
+ unsigned int r3 : 4;
+ unsigned int : 4;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ } RRF4;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } RS;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int i2 : 16;
+ } RSI;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } RX;
+ struct {
+ unsigned int op : 16;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } S;
+ struct {
+ unsigned int op : 8;
+ unsigned int i2 : 8;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ } SI;
+ } formats;
+ union {
+ formats fmt;
+ UInt value;
+ } ovl;
+
+ vassert(sizeof(formats) == 4);
+
+ ((char *)(&ovl.value))[0] = bytes[0];
+ ((char *)(&ovl.value))[1] = bytes[1];
+ ((char *)(&ovl.value))[2] = bytes[2];
+ ((char *)(&ovl.value))[3] = bytes[3];
+
+ switch ((ovl.value & 0xff0f0000) >> 16) {
+ case 0xa500: s390_format_RI_RU(s390_irgen_IIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa501: s390_format_RI_RU(s390_irgen_IIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa502: s390_format_RI_RU(s390_irgen_IILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa503: s390_format_RI_RU(s390_irgen_IILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa504: s390_format_RI_RU(s390_irgen_NIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa505: s390_format_RI_RU(s390_irgen_NIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa506: s390_format_RI_RU(s390_irgen_NILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa507: s390_format_RI_RU(s390_irgen_NILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa508: s390_format_RI_RU(s390_irgen_OIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa509: s390_format_RI_RU(s390_irgen_OIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50a: s390_format_RI_RU(s390_irgen_OILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50b: s390_format_RI_RU(s390_irgen_OILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50c: s390_format_RI_RU(s390_irgen_LLIHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50d: s390_format_RI_RU(s390_irgen_LLIHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50e: s390_format_RI_RU(s390_irgen_LLILH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa50f: s390_format_RI_RU(s390_irgen_LLILL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa700: s390_format_RI_RU(s390_irgen_TMLH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa701: s390_format_RI_RU(s390_irgen_TMLL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa702: s390_format_RI_RU(s390_irgen_TMHH, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa703: s390_format_RI_RU(s390_irgen_TMHL, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa704: s390_format_RI(s390_irgen_BRC, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa705: s390_format_RI_RP(s390_irgen_BRAS, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa706: s390_format_RI_RP(s390_irgen_BRCT, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa707: s390_format_RI_RP(s390_irgen_BRCTG, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa708: s390_format_RI_RI(s390_irgen_LHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa709: s390_format_RI_RI(s390_irgen_LGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa70a: s390_format_RI_RI(s390_irgen_AHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa70b: s390_format_RI_RI(s390_irgen_AGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa70c: s390_format_RI_RI(s390_irgen_MHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa70d: s390_format_RI_RI(s390_irgen_MGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ case 0xa70e: s390_format_RI_RI(s390_irgen_CHI, ovl.fmt.RI.r1, ovl.fmt.RI.i2);
+ goto ok;
+ case 0xa70f: s390_format_RI_RI(s390_irgen_CGHI, ovl.fmt.RI.r1,
+ ovl.fmt.RI.i2); goto ok;
+ }
+
+ switch ((ovl.value & 0xffff0000) >> 16) {
+ case 0x8000: /* SSM */ goto unimplemented;
+ case 0x8200: /* LPSW */ goto unimplemented;
+ case 0x9300: s390_format_S_RD(s390_irgen_TS, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb202: /* STIDP */ goto unimplemented;
+ case 0xb204: /* SCK */ goto unimplemented;
+ case 0xb205: /* STCK */ goto unimplemented;
+ case 0xb206: /* SCKC */ goto unimplemented;
+ case 0xb207: /* STCKC */ goto unimplemented;
+ case 0xb208: /* SPT */ goto unimplemented;
+ case 0xb209: /* STPT */ goto unimplemented;
+ case 0xb20a: /* SPKA */ goto unimplemented;
+ case 0xb20b: /* IPK */ goto unimplemented;
+ case 0xb20d: /* PTLB */ goto unimplemented;
+ case 0xb210: /* SPX */ goto unimplemented;
+ case 0xb211: /* STPX */ goto unimplemented;
+ case 0xb212: /* STAP */ goto unimplemented;
+ case 0xb214: /* SIE */ goto unimplemented;
+ case 0xb218: /* PC */ goto unimplemented;
+ case 0xb219: /* SAC */ goto unimplemented;
+ case 0xb21a: /* CFC */ goto unimplemented;
+ case 0xb221: /* IPTE */ goto unimplemented;
+ case 0xb222: s390_format_RRE_R0(s390_irgen_IPM, ovl.fmt.RRE.r1); goto ok;
+ case 0xb223: /* IVSK */ goto unimplemented;
+ case 0xb224: /* IAC */ goto unimplemented;
+ case 0xb225: /* SSAR */ goto unimplemented;
+ case 0xb226: /* EPAR */ goto unimplemented;
+ case 0xb227: /* ESAR */ goto unimplemented;
+ case 0xb228: /* PT */ goto unimplemented;
+ case 0xb229: /* ISKE */ goto unimplemented;
+ case 0xb22a: /* RRBE */ goto unimplemented;
+ case 0xb22b: /* SSKE */ goto unimplemented;
+ case 0xb22c: /* TB */ goto unimplemented;
+ case 0xb22d: /* DXR */ goto unimplemented;
+ case 0xb22e: /* PGIN */ goto unimplemented;
+ case 0xb22f: /* PGOUT */ goto unimplemented;
+ case 0xb230: /* CSCH */ goto unimplemented;
+ case 0xb231: /* HSCH */ goto unimplemented;
+ case 0xb232: /* MSCH */ goto unimplemented;
+ case 0xb233: /* SSCH */ goto unimplemented;
+ case 0xb234: /* STSCH */ goto unimplemented;
+ case 0xb235: /* TSCH */ goto unimplemented;
+ case 0xb236: /* TPI */ goto unimplemented;
+ case 0xb237: /* SAL */ goto unimplemented;
+ case 0xb238: /* RSCH */ goto unimplemented;
+ case 0xb239: /* STCRW */ goto unimplemented;
+ case 0xb23a: /* STCPS */ goto unimplemented;
+ case 0xb23b: /* RCHP */ goto unimplemented;
+ case 0xb23c: /* SCHM */ goto unimplemented;
+ case 0xb240: /* BAKR */ goto unimplemented;
+ case 0xb241: /* CKSM */ goto unimplemented;
+ case 0xb244: /* SQDR */ goto unimplemented;
+ case 0xb245: /* SQER */ goto unimplemented;
+ case 0xb246: /* STURA */ goto unimplemented;
+ case 0xb247: /* MSTA */ goto unimplemented;
+ case 0xb248: /* PALB */ goto unimplemented;
+ case 0xb249: /* EREG */ goto unimplemented;
+ case 0xb24a: /* ESTA */ goto unimplemented;
+ case 0xb24b: /* LURA */ goto unimplemented;
+ case 0xb24c: /* TAR */ goto unimplemented;
+ case 0xb24d: s390_format_RRE(s390_irgen_CPYA, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb24e: s390_format_RRE(s390_irgen_SAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
+ goto ok;
+ case 0xb24f: s390_format_RRE(s390_irgen_EAR, ovl.fmt.RRE.r1, ovl.fmt.RRE.r2);
+ goto ok;
+ case 0xb250: /* CSP */ goto unimplemented;
+ case 0xb252: s390_format_RRE_RR(s390_irgen_MSR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb254: /* MVPG */ goto unimplemented;
+ case 0xb255: s390_format_RRE_RR(s390_irgen_MVST, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb257: /* CUSE */ goto unimplemented;
+ case 0xb258: /* BSG */ goto unimplemented;
+ case 0xb25a: /* BSA */ goto unimplemented;
+ case 0xb25d: s390_format_RRE_RR(s390_irgen_CLST, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb25e: s390_format_RRE_RR(s390_irgen_SRST, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb263: /* CMPSC */ goto unimplemented;
+ case 0xb274: /* SIGA */ goto unimplemented;
+ case 0xb276: /* XSCH */ goto unimplemented;
+ case 0xb277: /* RP */ goto unimplemented;
+ case 0xb278: /* STCKE */ goto unimplemented;
+ case 0xb279: /* SACF */ goto unimplemented;
+ case 0xb27c: /* STCKF */ goto unimplemented;
+ case 0xb27d: /* STSI */ goto unimplemented;
+ case 0xb299: s390_format_S_RD(s390_irgen_SRNM, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb29c: s390_format_S_RD(s390_irgen_STFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb29d: s390_format_S_RD(s390_irgen_LFPC, ovl.fmt.S.b2, ovl.fmt.S.d2);
+ goto ok;
+ case 0xb2a5: /* TRE */ goto unimplemented;
+ case 0xb2a6: /* CU21 */ goto unimplemented;
+ case 0xb2a7: /* CU12 */ goto unimplemented;
+ case 0xb2b0: /* STFLE */ goto unimplemented;
+ case 0xb2b1: /* STFL */ goto unimplemented;
+ case 0xb2b2: /* LPSWE */ goto unimplemented;
+ case 0xb2b8: /* SRNMB */ goto unimplemented;
+ case 0xb2b9: /* SRNMT */ goto unimplemented;
+ case 0xb2bd: /* LFAS */ goto unimplemented;
+ case 0xb2ff: /* TRAP4 */ goto unimplemented;
+ case 0xb300: s390_format_RRE_FF(s390_irgen_LPEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb301: s390_format_RRE_FF(s390_irgen_LNEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb302: s390_format_RRE_FF(s390_irgen_LTEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb303: s390_format_RRE_FF(s390_irgen_LCEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb304: s390_format_RRE_FF(s390_irgen_LDEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb305: s390_format_RRE_FF(s390_irgen_LXDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb306: s390_format_RRE_FF(s390_irgen_LXEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb307: /* MXDBR */ goto unimplemented;
+ case 0xb308: /* KEBR */ goto unimplemented;
+ case 0xb309: s390_format_RRE_FF(s390_irgen_CEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30a: s390_format_RRE_FF(s390_irgen_AEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30b: s390_format_RRE_FF(s390_irgen_SEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30c: /* MDEBR */ goto unimplemented;
+ case 0xb30d: s390_format_RRE_FF(s390_irgen_DEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb30e: s390_format_RRF_F0FF(s390_irgen_MAEBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb30f: s390_format_RRF_F0FF(s390_irgen_MSEBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb310: s390_format_RRE_FF(s390_irgen_LPDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb311: s390_format_RRE_FF(s390_irgen_LNDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb312: s390_format_RRE_FF(s390_irgen_LTDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb313: s390_format_RRE_FF(s390_irgen_LCDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb314: s390_format_RRE_FF(s390_irgen_SQEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb315: s390_format_RRE_FF(s390_irgen_SQDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb316: s390_format_RRE_FF(s390_irgen_SQXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb317: s390_format_RRE_FF(s390_irgen_MEEBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb318: /* KDBR */ goto unimplemented;
+ case 0xb319: s390_format_RRE_FF(s390_irgen_CDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31a: s390_format_RRE_FF(s390_irgen_ADBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31b: s390_format_RRE_FF(s390_irgen_SDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31c: s390_format_RRE_FF(s390_irgen_MDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31d: s390_format_RRE_FF(s390_irgen_DDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb31e: s390_format_RRF_F0FF(s390_irgen_MADBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb31f: s390_format_RRF_F0FF(s390_irgen_MSDBR, ovl.fmt.RRF.r1,
+ ovl.fmt.RRF.r3, ovl.fmt.RRF.r2); goto ok;
+ case 0xb324: /* LDER */ goto unimplemented;
+ case 0xb325: /* LXDR */ goto unimplemented;
+ case 0xb326: /* LXER */ goto unimplemented;
+ case 0xb32e: /* MAER */ goto unimplemented;
+ case 0xb32f: /* MSER */ goto unimplemented;
+ case 0xb336: /* SQXR */ goto unimplemented;
+ case 0xb337: /* MEER */ goto unimplemented;
+ case 0xb338: /* MAYLR */ goto unimplemented;
+ case 0xb339: /* MYLR */ goto unimplemented;
+ case 0xb33a: /* MAYR */ goto unimplemented;
+ case 0xb33b: /* MYR */ goto unimplemented;
+ case 0xb33c: /* MAYHR */ goto unimplemented;
+ case 0xb33d: /* MYHR */ goto unimplemented;
+ case 0xb33e: /* MADR */ goto unimplemented;
+ case 0xb33f: /* MSDR */ goto unimplemented;
+ case 0xb340: s390_format_RRE_FF(s390_irgen_LPXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb341: s390_format_RRE_FF(s390_irgen_LNXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb342: s390_format_RRE_FF(s390_irgen_LTXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb343: s390_format_RRE_FF(s390_irgen_LCXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb344: s390_format_RRE_FF(s390_irgen_LEDBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb345: s390_format_RRE_FF(s390_irgen_LDXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb346: s390_format_RRE_FF(s390_irgen_LEXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb347: /* FIXBR */ goto unimplemented;
+ case 0xb348: /* KXBR */ goto unimplemented;
+ case 0xb349: s390_format_RRE_FF(s390_irgen_CXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34a: s390_format_RRE_FF(s390_irgen_AXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34b: s390_format_RRE_FF(s390_irgen_SXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34c: s390_format_RRE_FF(s390_irgen_MXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb34d: s390_format_RRE_FF(s390_irgen_DXBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb350: /* TBEDR */ goto unimplemented;
+ case 0xb351: /* TBDR */ goto unimplemented;
+ case 0xb353: /* DIEBR */ goto unimplemented;
+ case 0xb357: /* FIEBR */ goto unimplemented;
+ case 0xb358: /* THDER */ goto unimplemented;
+ case 0xb359: /* THDR */ goto unimplemented;
+ case 0xb35b: /* DIDBR */ goto unimplemented;
+ case 0xb35f: /* FIDBR */ goto unimplemented;
+ case 0xb360: /* LPXR */ goto unimplemented;
+ case 0xb361: /* LNXR */ goto unimplemented;
+ case 0xb362: /* LTXR */ goto unimplemented;
+ case 0xb363: /* LCXR */ goto unimplemented;
+ case 0xb365: s390_format_RRE_FF(s390_irgen_LXR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb366: /* LEXR */ goto unimplemented;
+ case 0xb367: /* FIXR */ goto unimplemented;
+ case 0xb369: /* CXR */ goto unimplemented;
+ case 0xb370: s390_format_RRE_FF(s390_irgen_LPDFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb371: s390_format_RRE_FF(s390_irgen_LNDFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb372: s390_format_RRF_F0FF2(s390_irgen_CPSDR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb373: s390_format_RRE_FF(s390_irgen_LCDFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb374: s390_format_RRE_F0(s390_irgen_LZER, ovl.fmt.RRE.r1); goto ok;
+ case 0xb375: s390_format_RRE_F0(s390_irgen_LZDR, ovl.fmt.RRE.r1); goto ok;
+ case 0xb376: s390_format_RRE_F0(s390_irgen_LZXR, ovl.fmt.RRE.r1); goto ok;
+ case 0xb377: /* FIER */ goto unimplemented;
+ case 0xb37f: /* FIDR */ goto unimplemented;
+ case 0xb384: s390_format_RRE_R0(s390_irgen_SFPC, ovl.fmt.RRE.r1); goto ok;
+ case 0xb385: /* SFASR */ goto unimplemented;
+ case 0xb38c: s390_format_RRE_R0(s390_irgen_EFPC, ovl.fmt.RRE.r1); goto ok;
+ case 0xb390: /* CELFBR */ goto unimplemented;
+ case 0xb391: /* CDLFBR */ goto unimplemented;
+ case 0xb392: /* CXLFBR */ goto unimplemented;
+ case 0xb394: s390_format_RRE_FR(s390_irgen_CEFBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb395: s390_format_RRE_FR(s390_irgen_CDFBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb396: s390_format_RRE_FR(s390_irgen_CXFBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb398: s390_format_RRF_U0RF(s390_irgen_CFEBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb399: s390_format_RRF_U0RF(s390_irgen_CFDBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb39a: s390_format_RRF_U0RF(s390_irgen_CFXBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3a0: /* CELGBR */ goto unimplemented;
+ case 0xb3a1: /* CDLGBR */ goto unimplemented;
+ case 0xb3a2: /* CXLGBR */ goto unimplemented;
+ case 0xb3a4: s390_format_RRE_FR(s390_irgen_CEGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3a5: s390_format_RRE_FR(s390_irgen_CDGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3a6: s390_format_RRE_FR(s390_irgen_CXGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3a8: s390_format_RRF_U0RF(s390_irgen_CGEBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3a9: s390_format_RRF_U0RF(s390_irgen_CGDBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3aa: s390_format_RRF_U0RF(s390_irgen_CGXBR, ovl.fmt.RRF3.r3,
+ ovl.fmt.RRF3.r1, ovl.fmt.RRF3.r2);
+ goto ok;
+ case 0xb3b4: /* CEFR */ goto unimplemented;
+ case 0xb3b5: /* CDFR */ goto unimplemented;
+ case 0xb3b6: /* CXFR */ goto unimplemented;
+ case 0xb3b8: /* CFER */ goto unimplemented;
+ case 0xb3b9: /* CFDR */ goto unimplemented;
+ case 0xb3ba: /* CFXR */ goto unimplemented;
+ case 0xb3c1: s390_format_RRE_FR(s390_irgen_LDGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3c4: /* CEGR */ goto unimplemented;
+ case 0xb3c5: /* CDGR */ goto unimplemented;
+ case 0xb3c6: /* CXGR */ goto unimplemented;
+ case 0xb3c8: /* CGER */ goto unimplemented;
+ case 0xb3c9: /* CGDR */ goto unimplemented;
+ case 0xb3ca: /* CGXR */ goto unimplemented;
+ case 0xb3cd: s390_format_RRE_RF(s390_irgen_LGDR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb3d0: /* MDTR */ goto unimplemented;
+ case 0xb3d1: /* DDTR */ goto unimplemented;
+ case 0xb3d2: /* ADTR */ goto unimplemented;
+ case 0xb3d3: /* SDTR */ goto unimplemented;
+ case 0xb3d4: /* LDETR */ goto unimplemented;
+ case 0xb3d5: /* LEDTR */ goto unimplemented;
+ case 0xb3d6: /* LTDTR */ goto unimplemented;
+ case 0xb3d7: /* FIDTR */ goto unimplemented;
+ case 0xb3d8: /* MXTR */ goto unimplemented;
+ case 0xb3d9: /* DXTR */ goto unimplemented;
+ case 0xb3da: /* AXTR */ goto unimplemented;
+ case 0xb3db: /* SXTR */ goto unimplemented;
+ case 0xb3dc: /* LXDTR */ goto unimplemented;
+ case 0xb3dd: /* LDXTR */ goto unimplemented;
+ case 0xb3de: /* LTXTR */ goto unimplemented;
+ case 0xb3df: /* FIXTR */ goto unimplemented;
+ case 0xb3e0: /* KDTR */ goto unimplemented;
+ case 0xb3e1: /* CGDTR */ goto unimplemented;
+ case 0xb3e2: /* CUDTR */ goto unimplemented;
+ case 0xb3e3: /* CSDTR */ goto unimplemented;
+ case 0xb3e4: /* CDTR */ goto unimplemented;
+ case 0xb3e5: /* EEDTR */ goto unimplemented;
+ case 0xb3e7: /* ESDTR */ goto unimplemented;
+ case 0xb3e8: /* KXTR */ goto unimplemented;
+ case 0xb3e9: /* CGXTR */ goto unimplemented;
+ case 0xb3ea: /* CUXTR */ goto unimplemented;
+ case 0xb3eb: /* CSXTR */ goto unimplemented;
+ case 0xb3ec: /* CXTR */ goto unimplemented;
+ case 0xb3ed: /* EEXTR */ goto unimplemented;
+ case 0xb3ef: /* ESXTR */ goto unimplemented;
+ case 0xb3f1: /* CDGTR */ goto unimplemented;
+ case 0xb3f2: /* CDUTR */ goto unimplemented;
+ case 0xb3f3: /* CDSTR */ goto unimplemented;
+ case 0xb3f4: /* CEDTR */ goto unimplemented;
+ case 0xb3f5: /* QADTR */ goto unimplemented;
+ case 0xb3f6: /* IEDTR */ goto unimplemented;
+ case 0xb3f7: /* RRDTR */ goto unimplemented;
+ case 0xb3f9: /* CXGTR */ goto unimplemented;
+ case 0xb3fa: /* CXUTR */ goto unimplemented;
+ case 0xb3fb: /* CXSTR */ goto unimplemented;
+ case 0xb3fc: /* CEXTR */ goto unimplemented;
+ case 0xb3fd: /* QAXTR */ goto unimplemented;
+ case 0xb3fe: /* IEXTR */ goto unimplemented;
+ case 0xb3ff: /* RRXTR */ goto unimplemented;
+ case 0xb900: s390_format_RRE_RR(s390_irgen_LPGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb901: s390_format_RRE_RR(s390_irgen_LNGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb902: s390_format_RRE_RR(s390_irgen_LTGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb903: s390_format_RRE_RR(s390_irgen_LCGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb904: s390_format_RRE_RR(s390_irgen_LGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb905: /* LURAG */ goto unimplemented;
+ case 0xb906: s390_format_RRE_RR(s390_irgen_LGBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb907: s390_format_RRE_RR(s390_irgen_LGHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb908: s390_format_RRE_RR(s390_irgen_AGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb909: s390_format_RRE_RR(s390_irgen_SGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90a: s390_format_RRE_RR(s390_irgen_ALGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90b: s390_format_RRE_RR(s390_irgen_SLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90c: s390_format_RRE_RR(s390_irgen_MSGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90d: s390_format_RRE_RR(s390_irgen_DSGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb90e: /* EREGG */ goto unimplemented;
+ case 0xb90f: s390_format_RRE_RR(s390_irgen_LRVGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb910: s390_format_RRE_RR(s390_irgen_LPGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb911: s390_format_RRE_RR(s390_irgen_LNGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb912: s390_format_RRE_RR(s390_irgen_LTGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb913: s390_format_RRE_RR(s390_irgen_LCGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb914: s390_format_RRE_RR(s390_irgen_LGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb916: s390_format_RRE_RR(s390_irgen_LLGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb917: s390_format_RRE_RR(s390_irgen_LLGTR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb918: s390_format_RRE_RR(s390_irgen_AGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb919: s390_format_RRE_RR(s390_irgen_SGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91a: s390_format_RRE_RR(s390_irgen_ALGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91b: s390_format_RRE_RR(s390_irgen_SLGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91c: s390_format_RRE_RR(s390_irgen_MSGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91d: s390_format_RRE_RR(s390_irgen_DSGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb91e: /* KMAC */ goto unimplemented;
+ case 0xb91f: s390_format_RRE_RR(s390_irgen_LRVR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb920: s390_format_RRE_RR(s390_irgen_CGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb921: s390_format_RRE_RR(s390_irgen_CLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb925: /* STURG */ goto unimplemented;
+ case 0xb926: s390_format_RRE_RR(s390_irgen_LBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb927: s390_format_RRE_RR(s390_irgen_LHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb928: /* PCKMO */ goto unimplemented;
+ case 0xb92b: /* KMO */ goto unimplemented;
+ case 0xb92c: /* PCC */ goto unimplemented;
+ case 0xb92d: /* KMCTR */ goto unimplemented;
+ case 0xb92e: /* KM */ goto unimplemented;
+ case 0xb92f: /* KMC */ goto unimplemented;
+ case 0xb930: s390_format_RRE_RR(s390_irgen_CGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb931: s390_format_RRE_RR(s390_irgen_CLGFR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb93e: /* KIMD */ goto unimplemented;
+ case 0xb93f: /* KLMD */ goto unimplemented;
+ case 0xb941: /* CFDTR */ goto unimplemented;
+ case 0xb942: /* CLGDTR */ goto unimplemented;
+ case 0xb943: /* CLFDTR */ goto unimplemented;
+ case 0xb946: s390_format_RRE_RR(s390_irgen_BCTGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb949: /* CFXTR */ goto unimplemented;
+ case 0xb94a: /* CLGXTR */ goto unimplemented;
+ case 0xb94b: /* CLFXTR */ goto unimplemented;
+ case 0xb951: /* CDFTR */ goto unimplemented;
+ case 0xb952: /* CDLGTR */ goto unimplemented;
+ case 0xb953: /* CDLFTR */ goto unimplemented;
+ case 0xb959: /* CXFTR */ goto unimplemented;
+ case 0xb95a: /* CXLGTR */ goto unimplemented;
+ case 0xb95b: /* CXLFTR */ goto unimplemented;
+ case 0xb960: /* CGRT */ goto unimplemented;
+ case 0xb961: /* CLGRT */ goto unimplemented;
+ case 0xb972: /* CRT */ goto unimplemented;
+ case 0xb973: /* CLRT */ goto unimplemented;
+ case 0xb980: s390_format_RRE_RR(s390_irgen_NGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb981: s390_format_RRE_RR(s390_irgen_OGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb982: s390_format_RRE_RR(s390_irgen_XGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb983: s390_format_RRE_RR(s390_irgen_FLOGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb984: s390_format_RRE_RR(s390_irgen_LLGCR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb985: s390_format_RRE_RR(s390_irgen_LLGHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb986: s390_format_RRE_RR(s390_irgen_MLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb987: s390_format_RRE_RR(s390_irgen_DLGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb988: s390_format_RRE_RR(s390_irgen_ALCGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb989: s390_format_RRE_RR(s390_irgen_SLBGR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb98a: /* CSPG */ goto unimplemented;
+ case 0xb98d: /* EPSW */ goto unimplemented;
+ case 0xb98e: /* IDTE */ goto unimplemented;
+ case 0xb990: /* TRTT */ goto unimplemented;
+ case 0xb991: /* TRTO */ goto unimplemented;
+ case 0xb992: /* TROT */ goto unimplemented;
+ case 0xb993: /* TROO */ goto unimplemented;
+ case 0xb994: s390_format_RRE_RR(s390_irgen_LLCR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb995: s390_format_RRE_RR(s390_irgen_LLHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb996: s390_format_RRE_RR(s390_irgen_MLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb997: s390_format_RRE_RR(s390_irgen_DLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb998: s390_format_RRE_RR(s390_irgen_ALCR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb999: s390_format_RRE_RR(s390_irgen_SLBR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb99a: /* EPAIR */ goto unimplemented;
+ case 0xb99b: /* ESAIR */ goto unimplemented;
+ case 0xb99d: /* ESEA */ goto unimplemented;
+ case 0xb99e: /* PTI */ goto unimplemented;
+ case 0xb99f: /* SSAIR */ goto unimplemented;
+ case 0xb9a2: /* PTF */ goto unimplemented;
+ case 0xb9aa: /* LPTEA */ goto unimplemented;
+ case 0xb9ae: /* RRBM */ goto unimplemented;
+ case 0xb9af: /* PFMF */ goto unimplemented;
+ case 0xb9b0: /* CU14 */ goto unimplemented;
+ case 0xb9b1: /* CU24 */ goto unimplemented;
+ case 0xb9b2: /* CU41 */ goto unimplemented;
+ case 0xb9b3: /* CU42 */ goto unimplemented;
+ case 0xb9bd: /* TRTRE */ goto unimplemented;
+ case 0xb9be: /* SRSTU */ goto unimplemented;
+ case 0xb9bf: /* TRTE */ goto unimplemented;
+ case 0xb9c8: s390_format_RRF_R0RR2(s390_irgen_AHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9c9: s390_format_RRF_R0RR2(s390_irgen_SHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9ca: s390_format_RRF_R0RR2(s390_irgen_ALHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9cb: s390_format_RRF_R0RR2(s390_irgen_SLHHHR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9cd: s390_format_RRE_RR(s390_irgen_CHHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9cf: s390_format_RRE_RR(s390_irgen_CLHHR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9d8: s390_format_RRF_R0RR2(s390_irgen_AHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9d9: s390_format_RRF_R0RR2(s390_irgen_SHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9da: s390_format_RRF_R0RR2(s390_irgen_ALHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9db: s390_format_RRF_R0RR2(s390_irgen_SLHHLR, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9dd: s390_format_RRE_RR(s390_irgen_CHLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9df: s390_format_RRE_RR(s390_irgen_CLHLR, ovl.fmt.RRE.r1,
+ ovl.fmt.RRE.r2); goto ok;
+ case 0xb9e1: /* POPCNT */ goto unimplemented;
+ case 0xb9e2: /* LOCGR */ goto unimplemented;
+ case 0xb9e4: s390_format_RRF_R0RR2(s390_irgen_NGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e6: s390_format_RRF_R0RR2(s390_irgen_OGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e7: s390_format_RRF_R0RR2(s390_irgen_XGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e8: s390_format_RRF_R0RR2(s390_irgen_AGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9e9: s390_format_RRF_R0RR2(s390_irgen_SGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9ea: s390_format_RRF_R0RR2(s390_irgen_ALGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9eb: s390_format_RRF_R0RR2(s390_irgen_SLGRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f2: /* LOCR */ goto unimplemented;
+ case 0xb9f4: s390_format_RRF_R0RR2(s390_irgen_NRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f6: s390_format_RRF_R0RR2(s390_irgen_ORK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f7: s390_format_RRF_R0RR2(s390_irgen_XRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f8: s390_format_RRF_R0RR2(s390_irgen_ARK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9f9: s390_format_RRF_R0RR2(s390_irgen_SRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9fa: s390_format_RRF_R0RR2(s390_irgen_ALRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ case 0xb9fb: s390_format_RRF_R0RR2(s390_irgen_SLRK, ovl.fmt.RRF4.r3,
+ ovl.fmt.RRF4.r1, ovl.fmt.RRF4.r2);
+ goto ok;
+ }
+
+ switch ((ovl.value & 0xff000000) >> 24) {
+ case 0x40: s390_format_RX_RRRD(s390_irgen_STH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x41: s390_format_RX_RRRD(s390_irgen_LA, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x42: s390_format_RX_RRRD(s390_irgen_STC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x43: s390_format_RX_RRRD(s390_irgen_IC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x44: s390_format_RX_RRRD(s390_irgen_EX, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x45: /* BAL */ goto unimplemented;
+ case 0x46: s390_format_RX_RRRD(s390_irgen_BCT, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x47: s390_format_RX(s390_irgen_BC, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x48: s390_format_RX_RRRD(s390_irgen_LH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x49: s390_format_RX_RRRD(s390_irgen_CH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4a: s390_format_RX_RRRD(s390_irgen_AH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4b: s390_format_RX_RRRD(s390_irgen_SH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4c: s390_format_RX_RRRD(s390_irgen_MH, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4d: s390_format_RX_RRRD(s390_irgen_BAS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4e: s390_format_RX_RRRD(s390_irgen_CVD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x4f: s390_format_RX_RRRD(s390_irgen_CVB, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x50: s390_format_RX_RRRD(s390_irgen_ST, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x51: s390_format_RX_RRRD(s390_irgen_LAE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x54: s390_format_RX_RRRD(s390_irgen_N, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x55: s390_format_RX_RRRD(s390_irgen_CL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x56: s390_format_RX_RRRD(s390_irgen_O, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x57: s390_format_RX_RRRD(s390_irgen_X, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x58: s390_format_RX_RRRD(s390_irgen_L, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x59: s390_format_RX_RRRD(s390_irgen_C, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5a: s390_format_RX_RRRD(s390_irgen_A, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5b: s390_format_RX_RRRD(s390_irgen_S, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5c: s390_format_RX_RRRD(s390_irgen_M, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5d: s390_format_RX_RRRD(s390_irgen_D, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5e: s390_format_RX_RRRD(s390_irgen_AL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x5f: s390_format_RX_RRRD(s390_irgen_SL, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x60: s390_format_RX_FRRD(s390_irgen_STD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x67: /* MXD */ goto unimplemented;
+ case 0x68: s390_format_RX_FRRD(s390_irgen_LD, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x69: /* CD */ goto unimplemented;
+ case 0x6a: /* AD */ goto unimplemented;
+ case 0x6b: /* SD */ goto unimplemented;
+ case 0x6c: /* MD */ goto unimplemented;
+ case 0x6d: /* DD */ goto unimplemented;
+ case 0x6e: /* AW */ goto unimplemented;
+ case 0x6f: /* SW */ goto unimplemented;
+ case 0x70: s390_format_RX_FRRD(s390_irgen_STE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x71: s390_format_RX_RRRD(s390_irgen_MS, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x78: s390_format_RX_FRRD(s390_irgen_LE, ovl.fmt.RX.r1, ovl.fmt.RX.x2,
+ ovl.fmt.RX.b2, ovl.fmt.RX.d2); goto ok;
+ case 0x79: /* CE */ goto unimplemented;
+ case 0x7a: /* AE */ goto unimplemented;
+ case 0x7b: /* SE */ goto unimplemented;
+ case 0x7c: /* MDE */ goto unimplemented;
+ case 0x7d: /* DE */ goto unimplemented;
+ case 0x7e: /* AU */ goto unimplemented;
+ case 0x7f: /* SU */ goto unimplemented;
+ case 0x83: /* DIAG */ goto unimplemented;
+ case 0x84: s390_format_RSI_RRP(s390_irgen_BRXH, ovl.fmt.RSI.r1,
+ ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
+ case 0x85: s390_format_RSI_RRP(s390_irgen_BRXLE, ovl.fmt.RSI.r1,
+ ovl.fmt.RSI.r3, ovl.fmt.RSI.i2); goto ok;
+ case 0x86: s390_format_RS_RRRD(s390_irgen_BXH, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x87: s390_format_RS_RRRD(s390_irgen_BXLE, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x88: s390_format_RS_R0RD(s390_irgen_SRL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x89: s390_format_RS_R0RD(s390_irgen_SLL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8a: s390_format_RS_R0RD(s390_irgen_SRA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8b: s390_format_RS_R0RD(s390_irgen_SLA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8c: s390_format_RS_R0RD(s390_irgen_SRDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8d: s390_format_RS_R0RD(s390_irgen_SLDL, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8e: s390_format_RS_R0RD(s390_irgen_SRDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x8f: s390_format_RS_R0RD(s390_irgen_SLDA, ovl.fmt.RS.r1, ovl.fmt.RS.b2,
+ ovl.fmt.RS.d2); goto ok;
+ case 0x90: s390_format_RS_RRRD(s390_irgen_STM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x91: s390_format_SI_URD(s390_irgen_TM, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x92: s390_format_SI_URD(s390_irgen_MVI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x94: s390_format_SI_URD(s390_irgen_NI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x95: s390_format_SI_URD(s390_irgen_CLI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x96: s390_format_SI_URD(s390_irgen_OI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x97: s390_format_SI_URD(s390_irgen_XI, ovl.fmt.SI.i2, ovl.fmt.SI.b1,
+ ovl.fmt.SI.d1); goto ok;
+ case 0x98: s390_format_RS_RRRD(s390_irgen_LM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x99: /* TRACE */ goto unimplemented;
+ case 0x9a: s390_format_RS_AARD(s390_irgen_LAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0x9b: s390_format_RS_AARD(s390_irgen_STAM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xa8: s390_format_RS_RRRD(s390_irgen_MVCLE, ovl.fmt.RS.r1,
+ ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
+ goto ok;
+ case 0xa9: s390_format_RS_RRRD(s390_irgen_CLCLE, ovl.fmt.RS.r1,
+ ovl.fmt.RS.r3, ovl.fmt.RS.b2, ovl.fmt.RS.d2);
+ goto ok;
+ case 0xac: /* STNSM */ goto unimplemented;
+ case 0xad: /* STOSM */ goto unimplemented;
+ case 0xae: /* SIGP */ goto unimplemented;
+ case 0xaf: /* MC */ goto unimplemented;
+ case 0xb1: /* LRA */ goto unimplemented;
+ case 0xb6: /* STCTL */ goto unimplemented;
+ case 0xb7: /* LCTL */ goto unimplemented;
+ case 0xba: s390_format_RS_RRRD(s390_irgen_CS, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xbb: /* CDS */ goto unimplemented;
+ case 0xbd: s390_format_RS_RURD(s390_irgen_CLM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xbe: s390_format_RS_RURD(s390_irgen_STCM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ case 0xbf: s390_format_RS_RURD(s390_irgen_ICM, ovl.fmt.RS.r1, ovl.fmt.RS.r3,
+ ovl.fmt.RS.b2, ovl.fmt.RS.d2); goto ok;
+ }
+
+ return S390_DECODE_UNKNOWN_INSN;
+
+ok:
+ return S390_DECODE_OK;
+
+unimplemented:
+ return S390_DECODE_UNIMPLEMENTED_INSN;
+}
+
+static s390_decode_t
+s390_decode_6byte_and_irgen(UChar *bytes)
+{
+ typedef union {
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int i2 : 16;
+ unsigned int : 8;
+ unsigned int op2 : 8;
+ } RIE;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ unsigned int i3 : 8;
+ unsigned int i4 : 8;
+ unsigned int i5 : 8;
+ unsigned int op2 : 8;
+ } RIE_RRUUU;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int : 4;
+ unsigned int i2 : 16;
+ unsigned int m3 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RIEv1;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ unsigned int i4 : 16;
+ unsigned int m3 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RIE_RRPU;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int m3 : 4;
+ unsigned int i4 : 16;
+ unsigned int i2 : 8;
+ unsigned int op2 : 8;
+ } RIEv3;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int op2 : 4;
+ unsigned int i2 : 32;
+ } RIL;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int m3 : 4;
+ unsigned int b4 : 4;
+ unsigned int d4 : 12;
+ unsigned int i2 : 8;
+ unsigned int op2 : 8;
+ } RIS;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r2 : 4;
+ unsigned int b4 : 4;
+ unsigned int d4 : 12;
+ unsigned int m3 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RRS;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int l1 : 4;
+ unsigned int : 4;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int : 8;
+ unsigned int op2 : 8;
+ } RSL;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int b2 : 4;
+ unsigned int dl2 : 12;
+ unsigned int dh2 : 8;
+ unsigned int op2 : 8;
+ } RSY;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ unsigned int : 8;
+ unsigned int op2 : 8;
+ } RXE;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r3 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ unsigned int r1 : 4;
+ unsigned int : 4;
+ unsigned int op2 : 8;
+ } RXF;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r1 : 4;
+ unsigned int x2 : 4;
+ unsigned int b2 : 4;
+ unsigned int dl2 : 12;
+ unsigned int dh2 : 8;
+ unsigned int op2 : 8;
+ } RXY;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int i2 : 8;
+ unsigned int b1 : 4;
+ unsigned int dl1 : 12;
+ unsigned int dh1 : 8;
+ unsigned int op2 : 8;
+ } SIY;
+ struct {
+ unsigned int op : 8;
+ unsigned int l : 8;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SS;
+ struct {
+ unsigned int op : 8;
+ unsigned int l1 : 4;
+ unsigned int l2 : 4;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SS_LLRDRD;
+ struct {
+ unsigned int op : 8;
+ unsigned int r1 : 4;
+ unsigned int r3 : 4;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ unsigned int b4 : 4;
+ unsigned int d4 : 12;
+ } SS_RRRDRD2;
+ struct {
+ unsigned int op : 16;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SSE;
+ struct {
+ unsigned int op1 : 8;
+ unsigned int r3 : 4;
+ unsigned int op2 : 4;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int b2 : 4;
+ unsigned int d2 : 12;
+ } SSF;
+ struct {
+ unsigned int op : 16;
+ unsigned int b1 : 4;
+ unsigned int d1 : 12;
+ unsigned int i2 : 16;
+ } SIL;
+ } formats;
+ union {
+ formats fmt;
+ ULong value;
+ } ovl;
+
+ vassert(sizeof(formats) == 6);
+
+ ((char *)(&ovl.value))[0] = bytes[0];
+ ((char *)(&ovl.value))[1] = bytes[1];
+ ((char *)(&ovl.value))[2] = bytes[2];
+ ((char *)(&ovl.value))[3] = bytes[3];
+ ((char *)(&ovl.value))[4] = bytes[4];
+ ((char *)(&ovl.value))[5] = bytes[5];
+ ((char *)(&ovl.value))[6] = 0x0;
+ ((char *)(&ovl.value))[7] = 0x0;
+
+ switch ((ovl.value >> 16) & 0xff00000000ffULL) {
+ case 0xe30000000002ULL: s390_format_RXY_RRRD(s390_irgen_LTG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000003ULL: /* LRAG */ goto unimplemented;
+ case 0xe30000000004ULL: s390_format_RXY_RRRD(s390_irgen_LG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000006ULL: s390_format_RXY_RRRD(s390_irgen_CVBY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000008ULL: s390_format_RXY_RRRD(s390_irgen_AG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000009ULL: s390_format_RXY_RRRD(s390_irgen_SG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000aULL: s390_format_RXY_RRRD(s390_irgen_ALG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000bULL: s390_format_RXY_RRRD(s390_irgen_SLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000cULL: s390_format_RXY_RRRD(s390_irgen_MSG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000dULL: s390_format_RXY_RRRD(s390_irgen_DSG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000000eULL: /* CVBG */ goto unimplemented;
+ case 0xe3000000000fULL: s390_format_RXY_RRRD(s390_irgen_LRVG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000012ULL: s390_format_RXY_RRRD(s390_irgen_LT, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000013ULL: /* LRAY */ goto unimplemented;
+ case 0xe30000000014ULL: s390_format_RXY_RRRD(s390_irgen_LGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000015ULL: s390_format_RXY_RRRD(s390_irgen_LGH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000016ULL: s390_format_RXY_RRRD(s390_irgen_LLGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000017ULL: s390_format_RXY_RRRD(s390_irgen_LLGT, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000018ULL: s390_format_RXY_RRRD(s390_irgen_AGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000019ULL: s390_format_RXY_RRRD(s390_irgen_SGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001aULL: s390_format_RXY_RRRD(s390_irgen_ALGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001bULL: s390_format_RXY_RRRD(s390_irgen_SLGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001cULL: s390_format_RXY_RRRD(s390_irgen_MSGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001dULL: s390_format_RXY_RRRD(s390_irgen_DSGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001eULL: s390_format_RXY_RRRD(s390_irgen_LRV, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000001fULL: s390_format_RXY_RRRD(s390_irgen_LRVH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000020ULL: s390_format_RXY_RRRD(s390_irgen_CG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000021ULL: s390_format_RXY_RRRD(s390_irgen_CLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000024ULL: s390_format_RXY_RRRD(s390_irgen_STG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000026ULL: s390_format_RXY_RRRD(s390_irgen_CVDY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000002eULL: /* CVDG */ goto unimplemented;
+ case 0xe3000000002fULL: s390_format_RXY_RRRD(s390_irgen_STRVG,
+ ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
+ ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000030ULL: s390_format_RXY_RRRD(s390_irgen_CGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000031ULL: s390_format_RXY_RRRD(s390_irgen_CLGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000032ULL: s390_format_RXY_RRRD(s390_irgen_LTGF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000034ULL: s390_format_RXY_RRRD(s390_irgen_CGH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000036ULL: s390_format_RXY_URRD(s390_irgen_PFD, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000003eULL: s390_format_RXY_RRRD(s390_irgen_STRV, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000003fULL: s390_format_RXY_RRRD(s390_irgen_STRVH,
+ ovl.fmt.RXY.r1, ovl.fmt.RXY.x2,
+ ovl.fmt.RXY.b2, ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000046ULL: s390_format_RXY_RRRD(s390_irgen_BCTG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000050ULL: s390_format_RXY_RRRD(s390_irgen_STY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000051ULL: s390_format_RXY_RRRD(s390_irgen_MSY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000054ULL: s390_format_RXY_RRRD(s390_irgen_NY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000055ULL: s390_format_RXY_RRRD(s390_irgen_CLY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000056ULL: s390_format_RXY_RRRD(s390_irgen_OY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000057ULL: s390_format_RXY_RRRD(s390_irgen_XY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000058ULL: s390_format_RXY_RRRD(s390_irgen_LY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000059ULL: s390_format_RXY_RRRD(s390_irgen_CY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005aULL: s390_format_RXY_RRRD(s390_irgen_AY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005bULL: s390_format_RXY_RRRD(s390_irgen_SY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005cULL: s390_format_RXY_RRRD(s390_irgen_MFY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005eULL: s390_format_RXY_RRRD(s390_irgen_ALY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000005fULL: s390_format_RXY_RRRD(s390_irgen_SLY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000070ULL: s390_format_RXY_RRRD(s390_irgen_STHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000071ULL: s390_format_RXY_RRRD(s390_irgen_LAY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000072ULL: s390_format_RXY_RRRD(s390_irgen_STCY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000073ULL: s390_format_RXY_RRRD(s390_irgen_ICY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000075ULL: s390_format_RXY_RRRD(s390_irgen_LAEY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000076ULL: s390_format_RXY_RRRD(s390_irgen_LB, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000077ULL: s390_format_RXY_RRRD(s390_irgen_LGB, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000078ULL: s390_format_RXY_RRRD(s390_irgen_LHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000079ULL: s390_format_RXY_RRRD(s390_irgen_CHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000007aULL: s390_format_RXY_RRRD(s390_irgen_AHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000007bULL: s390_format_RXY_RRRD(s390_irgen_SHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000007cULL: s390_format_RXY_RRRD(s390_irgen_MHY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000080ULL: s390_format_RXY_RRRD(s390_irgen_NG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000081ULL: s390_format_RXY_RRRD(s390_irgen_OG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000082ULL: s390_format_RXY_RRRD(s390_irgen_XG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000086ULL: s390_format_RXY_RRRD(s390_irgen_MLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000087ULL: s390_format_RXY_RRRD(s390_irgen_DLG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000088ULL: s390_format_RXY_RRRD(s390_irgen_ALCG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000089ULL: s390_format_RXY_RRRD(s390_irgen_SLBG, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000008eULL: s390_format_RXY_RRRD(s390_irgen_STPQ, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe3000000008fULL: s390_format_RXY_RRRD(s390_irgen_LPQ, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000090ULL: s390_format_RXY_RRRD(s390_irgen_LLGC, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000091ULL: s390_format_RXY_RRRD(s390_irgen_LLGH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000094ULL: s390_format_RXY_RRRD(s390_irgen_LLC, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000095ULL: s390_format_RXY_RRRD(s390_irgen_LLH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000096ULL: s390_format_RXY_RRRD(s390_irgen_ML, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000097ULL: s390_format_RXY_RRRD(s390_irgen_DL, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000098ULL: s390_format_RXY_RRRD(s390_irgen_ALC, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe30000000099ULL: s390_format_RXY_RRRD(s390_irgen_SLB, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c0ULL: s390_format_RXY_RRRD(s390_irgen_LBH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c2ULL: s390_format_RXY_RRRD(s390_irgen_LLCH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c3ULL: s390_format_RXY_RRRD(s390_irgen_STCH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c4ULL: s390_format_RXY_RRRD(s390_irgen_LHH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c6ULL: s390_format_RXY_RRRD(s390_irgen_LLHH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000c7ULL: s390_format_RXY_RRRD(s390_irgen_STHH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000caULL: s390_format_RXY_RRRD(s390_irgen_LFH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000cbULL: s390_format_RXY_RRRD(s390_irgen_STFH, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000cdULL: s390_format_RXY_RRRD(s390_irgen_CHF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xe300000000cfULL: s390_format_RXY_RRRD(s390_irgen_CLHF, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xeb0000000004ULL: s390_format_RSY_RRRD(s390_irgen_LMG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000aULL: s390_format_RSY_RRRD(s390_irgen_SRAG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000bULL: s390_format_RSY_RRRD(s390_irgen_SLAG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000cULL: s390_format_RSY_RRRD(s390_irgen_SRLG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000dULL: s390_format_RSY_RRRD(s390_irgen_SLLG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000000fULL: /* TRACG */ goto unimplemented;
+ case 0xeb0000000014ULL: s390_format_RSY_RRRD(s390_irgen_CSY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000001cULL: s390_format_RSY_RRRD(s390_irgen_RLLG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000001dULL: s390_format_RSY_RRRD(s390_irgen_RLL, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000020ULL: s390_format_RSY_RURD(s390_irgen_CLMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000021ULL: s390_format_RSY_RURD(s390_irgen_CLMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000024ULL: s390_format_RSY_RRRD(s390_irgen_STMG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000025ULL: /* STCTG */ goto unimplemented;
+ case 0xeb0000000026ULL: s390_format_RSY_RRRD(s390_irgen_STMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000002cULL: s390_format_RSY_RURD(s390_irgen_STCMH,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000002dULL: s390_format_RSY_RURD(s390_irgen_STCMY,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000002fULL: /* LCTLG */ goto unimplemented;
+ case 0xeb0000000030ULL: s390_format_RSY_RRRD(s390_irgen_CSG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000031ULL: /* CDSY */ goto unimplemented;
+ case 0xeb000000003eULL: /* CDSG */ goto unimplemented;
+ case 0xeb0000000044ULL: s390_format_RSY_RRRD(s390_irgen_BXHG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000045ULL: s390_format_RSY_RRRD(s390_irgen_BXLEG,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000004cULL: /* ECAG */ goto unimplemented;
+ case 0xeb0000000051ULL: s390_format_SIY_URD(s390_irgen_TMY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000052ULL: s390_format_SIY_URD(s390_irgen_MVIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000054ULL: s390_format_SIY_URD(s390_irgen_NIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000055ULL: s390_format_SIY_URD(s390_irgen_CLIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000056ULL: s390_format_SIY_URD(s390_irgen_OIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000057ULL: s390_format_SIY_URD(s390_irgen_XIY, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000006aULL: s390_format_SIY_IRD(s390_irgen_ASI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000006eULL: s390_format_SIY_IRD(s390_irgen_ALSI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000007aULL: s390_format_SIY_IRD(s390_irgen_AGSI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb000000007eULL: s390_format_SIY_IRD(s390_irgen_ALGSI, ovl.fmt.SIY.i2,
+ ovl.fmt.SIY.b1, ovl.fmt.SIY.dl1,
+ ovl.fmt.SIY.dh1); goto ok;
+ case 0xeb0000000080ULL: s390_format_RSY_RURD(s390_irgen_ICMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000081ULL: s390_format_RSY_RURD(s390_irgen_ICMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000008eULL: /* MVCLU */ goto unimplemented;
+ case 0xeb000000008fULL: /* CLCLU */ goto unimplemented;
+ case 0xeb0000000090ULL: s390_format_RSY_RRRD(s390_irgen_STMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000096ULL: s390_format_RSY_RRRD(s390_irgen_LMH, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb0000000098ULL: s390_format_RSY_RRRD(s390_irgen_LMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000009aULL: s390_format_RSY_AARD(s390_irgen_LAMY, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb000000009bULL: s390_format_RSY_AARD(s390_irgen_STAMY,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000c0ULL: /* TP */ goto unimplemented;
+ case 0xeb00000000dcULL: s390_format_RSY_RRRD(s390_irgen_SRAK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000ddULL: s390_format_RSY_RRRD(s390_irgen_SLAK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000deULL: s390_format_RSY_RRRD(s390_irgen_SRLK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000dfULL: s390_format_RSY_RRRD(s390_irgen_SLLK, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e2ULL: /* LOCG */ goto unimplemented;
+ case 0xeb00000000e3ULL: /* STOCG */ goto unimplemented;
+ case 0xeb00000000e4ULL: s390_format_RSY_RRRD(s390_irgen_LANG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e6ULL: s390_format_RSY_RRRD(s390_irgen_LAOG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e7ULL: s390_format_RSY_RRRD(s390_irgen_LAXG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000e8ULL: s390_format_RSY_RRRD(s390_irgen_LAAG, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000eaULL: s390_format_RSY_RRRD(s390_irgen_LAALG,
+ ovl.fmt.RSY.r1, ovl.fmt.RSY.r3,
+ ovl.fmt.RSY.b2, ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f2ULL: /* LOC */ goto unimplemented;
+ case 0xeb00000000f3ULL: /* STOC */ goto unimplemented;
+ case 0xeb00000000f4ULL: s390_format_RSY_RRRD(s390_irgen_LAN, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f6ULL: s390_format_RSY_RRRD(s390_irgen_LAO, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f7ULL: s390_format_RSY_RRRD(s390_irgen_LAX, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000f8ULL: s390_format_RSY_RRRD(s390_irgen_LAA, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xeb00000000faULL: s390_format_RSY_RRRD(s390_irgen_LAAL, ovl.fmt.RSY.r1,
+ ovl.fmt.RSY.r3, ovl.fmt.RSY.b2,
+ ovl.fmt.RSY.dl2,
+ ovl.fmt.RSY.dh2); goto ok;
+ case 0xec0000000044ULL: s390_format_RIE_RRP(s390_irgen_BRXHG, ovl.fmt.RIE.r1,
+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
+ goto ok;
+ case 0xec0000000045ULL: s390_format_RIE_RRP(s390_irgen_BRXLG, ovl.fmt.RIE.r1,
+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
+ goto ok;
+ case 0xec0000000051ULL: /* RISBLG */ goto unimplemented;
+ case 0xec0000000054ULL: s390_format_RIE_RRUUU(s390_irgen_RNSBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec0000000055ULL: s390_format_RIE_RRUUU(s390_irgen_RISBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec0000000056ULL: s390_format_RIE_RRUUU(s390_irgen_ROSBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec0000000057ULL: s390_format_RIE_RRUUU(s390_irgen_RXSBG,
+ ovl.fmt.RIE_RRUUU.r1,
+ ovl.fmt.RIE_RRUUU.r2,
+ ovl.fmt.RIE_RRUUU.i3,
+ ovl.fmt.RIE_RRUUU.i4,
+ ovl.fmt.RIE_RRUUU.i5);
+ goto ok;
+ case 0xec000000005dULL: /* RISBHG */ goto unimplemented;
+ case 0xec0000000064ULL: s390_format_RIE_RRPU(s390_irgen_CGRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec0000000065ULL: s390_format_RIE_RRPU(s390_irgen_CLGRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec0000000070ULL: /* CGIT */ goto unimplemented;
+ case 0xec0000000071ULL: /* CLGIT */ goto unimplemented;
+ case 0xec0000000072ULL: /* CIT */ goto unimplemented;
+ case 0xec0000000073ULL: /* CLFIT */ goto unimplemented;
+ case 0xec0000000076ULL: s390_format_RIE_RRPU(s390_irgen_CRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec0000000077ULL: s390_format_RIE_RRPU(s390_irgen_CLRJ,
+ ovl.fmt.RIE_RRPU.r1,
+ ovl.fmt.RIE_RRPU.r2,
+ ovl.fmt.RIE_RRPU.i4,
+ ovl.fmt.RIE_RRPU.m3); goto ok;
+ case 0xec000000007cULL: s390_format_RIE_RUPI(s390_irgen_CGIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec000000007dULL: s390_format_RIE_RUPU(s390_irgen_CLGIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec000000007eULL: s390_format_RIE_RUPI(s390_irgen_CIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec000000007fULL: s390_format_RIE_RUPU(s390_irgen_CLIJ,
+ ovl.fmt.RIEv3.r1,
+ ovl.fmt.RIEv3.m3,
+ ovl.fmt.RIEv3.i4,
+ ovl.fmt.RIEv3.i2); goto ok;
+ case 0xec00000000d8ULL: s390_format_RIE_RRI0(s390_irgen_AHIK, ovl.fmt.RIE.r1,
+ ovl.fmt.RIE.r3, ovl.fmt.RIE.i2);
+ goto ok;
+ case 0xec00000000d9ULL: s390_format_RIE_RRI0(s390_irgen_AGHIK,
+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
+ ovl.fmt.RIE.i2); goto ok;
+ case 0xec00000000daULL: s390_format_RIE_RRI0(s390_irgen_ALHSIK,
+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
+ ovl.fmt.RIE.i2); goto ok;
+ case 0xec00000000dbULL: s390_format_RIE_RRI0(s390_irgen_ALGHSIK,
+ ovl.fmt.RIE.r1, ovl.fmt.RIE.r3,
+ ovl.fmt.RIE.i2); goto ok;
+ case 0xec00000000e4ULL: s390_format_RRS(s390_irgen_CGRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000e5ULL: s390_format_RRS(s390_irgen_CLGRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000f6ULL: s390_format_RRS(s390_irgen_CRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000f7ULL: s390_format_RRS(s390_irgen_CLRB, ovl.fmt.RRS.r1,
+ ovl.fmt.RRS.r2, ovl.fmt.RRS.b4,
+ ovl.fmt.RRS.d4, ovl.fmt.RRS.m3);
+ goto ok;
+ case 0xec00000000fcULL: s390_format_RIS_RURDI(s390_irgen_CGIB,
+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xec00000000fdULL: s390_format_RIS_RURDU(s390_irgen_CLGIB,
+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xec00000000feULL: s390_format_RIS_RURDI(s390_irgen_CIB, ovl.fmt.RIS.r1,
+ ovl.fmt.RIS.m3, ovl.fmt.RIS.b4,
+ ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xec00000000ffULL: s390_format_RIS_RURDU(s390_irgen_CLIB,
+ ovl.fmt.RIS.r1, ovl.fmt.RIS.m3,
+ ovl.fmt.RIS.b4, ovl.fmt.RIS.d4,
+ ovl.fmt.RIS.i2); goto ok;
+ case 0xed0000000004ULL: s390_format_RXE_FRRD(s390_irgen_LDEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000005ULL: s390_format_RXE_FRRD(s390_irgen_LXDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000006ULL: s390_format_RXE_FRRD(s390_irgen_LXEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000007ULL: /* MXDB */ goto unimplemented;
+ case 0xed0000000008ULL: /* KEB */ goto unimplemented;
+ case 0xed0000000009ULL: s390_format_RXE_FRRD(s390_irgen_CEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000aULL: s390_format_RXE_FRRD(s390_irgen_AEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000bULL: s390_format_RXE_FRRD(s390_irgen_SEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000cULL: /* MDEB */ goto unimplemented;
+ case 0xed000000000dULL: s390_format_RXE_FRRD(s390_irgen_DEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000000eULL: s390_format_RXF_FRRDF(s390_irgen_MAEB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed000000000fULL: s390_format_RXF_FRRDF(s390_irgen_MSEB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed0000000010ULL: s390_format_RXE_FRRD(s390_irgen_TCEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000011ULL: s390_format_RXE_FRRD(s390_irgen_TCDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000012ULL: s390_format_RXE_FRRD(s390_irgen_TCXB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000014ULL: s390_format_RXE_FRRD(s390_irgen_SQEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000015ULL: s390_format_RXE_FRRD(s390_irgen_SQDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000017ULL: s390_format_RXE_FRRD(s390_irgen_MEEB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed0000000018ULL: /* KDB */ goto unimplemented;
+ case 0xed0000000019ULL: s390_format_RXE_FRRD(s390_irgen_CDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001aULL: s390_format_RXE_FRRD(s390_irgen_ADB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001bULL: s390_format_RXE_FRRD(s390_irgen_SDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001cULL: s390_format_RXE_FRRD(s390_irgen_MDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001dULL: s390_format_RXE_FRRD(s390_irgen_DDB, ovl.fmt.RXE.r1,
+ ovl.fmt.RXE.x2, ovl.fmt.RXE.b2,
+ ovl.fmt.RXE.d2); goto ok;
+ case 0xed000000001eULL: s390_format_RXF_FRRDF(s390_irgen_MADB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed000000001fULL: s390_format_RXF_FRRDF(s390_irgen_MSDB,
+ ovl.fmt.RXF.r3, ovl.fmt.RXF.x2,
+ ovl.fmt.RXF.b2, ovl.fmt.RXF.d2,
+ ovl.fmt.RXF.r1); goto ok;
+ case 0xed0000000024ULL: /* LDE */ goto unimplemented;
+ case 0xed0000000025ULL: /* LXD */ goto unimplemented;
+ case 0xed0000000026ULL: /* LXE */ goto unimplemented;
+ case 0xed000000002eULL: /* MAE */ goto unimplemented;
+ case 0xed000000002fULL: /* MSE */ goto unimplemented;
+ case 0xed0000000034ULL: /* SQE */ goto unimplemented;
+ case 0xed0000000035ULL: /* SQD */ goto unimplemented;
+ case 0xed0000000037ULL: /* MEE */ goto unimplemented;
+ case 0xed0000000038ULL: /* MAYL */ goto unimplemented;
+ case 0xed0000000039ULL: /* MYL */ goto unimplemented;
+ case 0xed000000003aULL: /* MAY */ goto unimplemented;
+ case 0xed000000003bULL: /* MY */ goto unimplemented;
+ case 0xed000000003cULL: /* MAYH */ goto unimplemented;
+ case 0xed000000003dULL: /* MYH */ goto unimplemented;
+ case 0xed000000003eULL: /* MAD */ goto unimplemented;
+ case 0xed000000003fULL: /* MSD */ goto unimplemented;
+ case 0xed0000000040ULL: /* SLDT */ goto unimplemented;
+ case 0xed0000000041ULL: /* SRDT */ goto unimplemented;
+ case 0xed0000000048ULL: /* SLXT */ goto unimplemented;
+ case 0xed0000000049ULL: /* SRXT */ goto unimplemented;
+ case 0xed0000000050ULL: /* TDCET */ goto unimplemented;
+ case 0xed0000000051ULL: /* TDGET */ goto unimplemented;
+ case 0xed0000000054ULL: /* TDCDT */ goto unimplemented;
+ case 0xed0000000055ULL: /* TDGDT */ goto unimplemented;
+ case 0xed0000000058ULL: /* TDCXT */ goto unimplemented;
+ case 0xed0000000059ULL: /* TDGXT */ goto unimplemented;
+ case 0xed0000000064ULL: s390_format_RXY_FRRD(s390_irgen_LEY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xed0000000065ULL: s390_format_RXY_FRRD(s390_irgen_LDY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xed0000000066ULL: s390_format_RXY_FRRD(s390_irgen_STEY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ case 0xed0000000067ULL: s390_format_RXY_FRRD(s390_irgen_STDY, ovl.fmt.RXY.r1,
+ ovl.fmt.RXY.x2, ovl.fmt.RXY.b2,
+ ovl.fmt.RXY.dl2,
+ ovl.fmt.RXY.dh2); goto ok;
+ }
+
+ switch (((ovl.value >> 16) & 0xff0f00000000ULL) >> 32) {
+ case 0xc000ULL: s390_format_RIL_RP(s390_irgen_LARL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc001ULL: s390_format_RIL_RI(s390_irgen_LGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc004ULL: s390_format_RIL(s390_irgen_BRCL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc005ULL: s390_format_RIL_RP(s390_irgen_BRASL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc006ULL: s390_format_RIL_RU(s390_irgen_XIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc007ULL: s390_format_RIL_RU(s390_irgen_XILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc008ULL: s390_format_RIL_RU(s390_irgen_IIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc009ULL: s390_format_RIL_RU(s390_irgen_IILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00aULL: s390_format_RIL_RU(s390_irgen_NIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00bULL: s390_format_RIL_RU(s390_irgen_NILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00cULL: s390_format_RIL_RU(s390_irgen_OIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00dULL: s390_format_RIL_RU(s390_irgen_OILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00eULL: s390_format_RIL_RU(s390_irgen_LLIHF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc00fULL: s390_format_RIL_RU(s390_irgen_LLILF, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc200ULL: s390_format_RIL_RI(s390_irgen_MSGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc201ULL: s390_format_RIL_RI(s390_irgen_MSFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc204ULL: s390_format_RIL_RU(s390_irgen_SLGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc205ULL: s390_format_RIL_RU(s390_irgen_SLFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc208ULL: s390_format_RIL_RI(s390_irgen_AGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc209ULL: s390_format_RIL_RI(s390_irgen_AFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20aULL: s390_format_RIL_RU(s390_irgen_ALGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20bULL: s390_format_RIL_RU(s390_irgen_ALFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20cULL: s390_format_RIL_RI(s390_irgen_CGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20dULL: s390_format_RIL_RI(s390_irgen_CFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20eULL: s390_format_RIL_RU(s390_irgen_CLGFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc20fULL: s390_format_RIL_RU(s390_irgen_CLFI, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc402ULL: s390_format_RIL_RP(s390_irgen_LLHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc404ULL: s390_format_RIL_RP(s390_irgen_LGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc405ULL: s390_format_RIL_RP(s390_irgen_LHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc406ULL: s390_format_RIL_RP(s390_irgen_LLGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc407ULL: s390_format_RIL_RP(s390_irgen_STHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc408ULL: s390_format_RIL_RP(s390_irgen_LGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40bULL: s390_format_RIL_RP(s390_irgen_STGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40cULL: s390_format_RIL_RP(s390_irgen_LGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40dULL: s390_format_RIL_RP(s390_irgen_LRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40eULL: s390_format_RIL_RP(s390_irgen_LLGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc40fULL: s390_format_RIL_RP(s390_irgen_STRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc600ULL: s390_format_RIL_RP(s390_irgen_EXRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc602ULL: s390_format_RIL_UP(s390_irgen_PFDRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc604ULL: s390_format_RIL_RP(s390_irgen_CGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc605ULL: s390_format_RIL_RP(s390_irgen_CHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc606ULL: s390_format_RIL_RP(s390_irgen_CLGHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc607ULL: s390_format_RIL_RP(s390_irgen_CLHRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc608ULL: s390_format_RIL_RP(s390_irgen_CGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60aULL: s390_format_RIL_RP(s390_irgen_CLGRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60cULL: s390_format_RIL_RP(s390_irgen_CGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60dULL: s390_format_RIL_RP(s390_irgen_CRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60eULL: s390_format_RIL_RP(s390_irgen_CLGFRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc60fULL: s390_format_RIL_RP(s390_irgen_CLRL, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xc800ULL: /* MVCOS */ goto unimplemented;
+ case 0xc801ULL: /* ECTG */ goto unimplemented;
+ case 0xc802ULL: /* CSST */ goto unimplemented;
+ case 0xc804ULL: /* LPD */ goto unimplemented;
+ case 0xc805ULL: /* LPDG */ goto unimplemented;
+ case 0xcc06ULL: /* BRCTH */ goto unimplemented;
+ case 0xcc08ULL: s390_format_RIL_RI(s390_irgen_AIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0aULL: s390_format_RIL_RI(s390_irgen_ALSIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0bULL: s390_format_RIL_RI(s390_irgen_ALSIHN, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0dULL: s390_format_RIL_RI(s390_irgen_CIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ case 0xcc0fULL: s390_format_RIL_RU(s390_irgen_CLIH, ovl.fmt.RIL.r1,
+ ovl.fmt.RIL.i2); goto ok;
+ }
+
+ switch (((ovl.value >> 16) & 0xff0000000000ULL) >> 40) {
+ case 0xd0ULL: /* TRTR */ goto unimplemented;
+ case 0xd1ULL: /* MVN */ goto unimplemented;
+ case 0xd2ULL: s390_format_SS_L0RDRD(s390_irgen_MVC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd3ULL: /* MVZ */ goto unimplemented;
+ case 0xd4ULL: s390_format_SS_L0RDRD(s390_irgen_NC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd5ULL: s390_format_SS_L0RDRD(s390_irgen_CLC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd6ULL: s390_format_SS_L0RDRD(s390_irgen_OC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd7ULL: s390_format_SS_L0RDRD(s390_irgen_XC, ovl.fmt.SS.l,
+ ovl.fmt.SS.b1, ovl.fmt.SS.d1,
+ ovl.fmt.SS.b2, ovl.fmt.SS.d2); goto ok;
+ case 0xd9ULL: /* MVCK */ goto unimplemented;
+ case 0xdaULL: /* MVCP */ goto unimplemented;
+ case 0xdbULL: /* MVCS */ goto unimplemented;
+ case 0xdcULL: /* TR */ goto unimplemented;
+ case 0xddULL: /* TRT */ goto unimplemented;
+ case 0xdeULL: /* ED */ goto unimplemented;
+ case 0xdfULL: /* EDMK */ goto unimplemented;
+ case 0xe1ULL: /* PKU */ goto unimplemented;
+ case 0xe2ULL: /* UNPKU */ goto unimplemented;
+ case 0xe8ULL: /* MVCIN */ goto unimplemented;
+ case 0xe9ULL: /* PKA */ goto unimplemented;
+ case 0xeaULL: /* UNPKA */ goto unimplemented;
+ case 0xeeULL: /* PLO */ goto unimplemented;
+ case 0xefULL: /* LMD */ goto unimplemented;
+ case 0xf0ULL: /* SRP */ goto unimplemented;
+ case 0xf1ULL: /* MVO */ goto unimplemented;
+ case 0xf2ULL: /* PACK */ goto unimplemented;
+ case 0xf3ULL: /* UNPK */ goto unimplemented;
+ case 0xf8ULL: /* ZAP */ goto unimplemented;
+ case 0xf9ULL: /* CP */ goto unimplemented;
+ case 0xfaULL: /* AP */ goto unimplemented;
+ case 0xfbULL: /* SP */ goto unimplemented;
+ case 0xfcULL: /* MP */ goto unimplemented;
+ case 0xfdULL: /* DP */ goto unimplemented;
+ }
+
+ switch (((ovl.value >> 16) & 0xffff00000000ULL) >> 32) {
+ case 0xe500ULL: /* LASP */ goto unimplemented;
+ case 0xe501ULL: /* TPROT */ goto unimplemented;
+ case 0xe502ULL: /* STRAG */ goto unimplemented;
+ case 0xe50eULL: /* MVCSK */ goto unimplemented;
+ case 0xe50fULL: /* MVCDK */ goto unimplemented;
+ case 0xe544ULL: s390_format_SIL_RDI(s390_irgen_MVHHI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe548ULL: s390_format_SIL_RDI(s390_irgen_MVGHI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe54cULL: s390_format_SIL_RDI(s390_irgen_MVHI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe554ULL: s390_format_SIL_RDI(s390_irgen_CHHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe555ULL: s390_format_SIL_RDU(s390_irgen_CLHHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe558ULL: s390_format_SIL_RDI(s390_irgen_CGHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe559ULL: s390_format_SIL_RDU(s390_irgen_CLGHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe55cULL: s390_format_SIL_RDI(s390_irgen_CHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ case 0xe55dULL: s390_format_SIL_RDU(s390_irgen_CLFHSI, ovl.fmt.SIL.b1,
+ ovl.fmt.SIL.d1, ovl.fmt.SIL.i2);
+ goto ok;
+ }
+
+ return S390_DECODE_UNKNOWN_INSN;
+
+ok:
+ return S390_DECODE_OK;
+
+unimplemented:
+ return S390_DECODE_UNIMPLEMENTED_INSN;
+}
+
+/* Handle "special" instructions. */
+static s390_decode_t
+s390_decode_special_and_irgen(UChar *bytes)
+{
+ s390_decode_t status = S390_DECODE_OK;
+
+ /* Got a "Special" instruction preamble. Which one is it? */
+ if (bytes[0] == 0x18 && bytes[1] == 0x22 /* lr %r2, %r2 */) {
+ s390_irgen_client_request();
+ } else if (bytes[0] == 0x18 && bytes[1] == 0x33 /* lr %r3, %r3 */) {
+ s390_irgen_guest_NRADDR();
+ } else if (bytes[0] == 0x18 && bytes[1] == 0x44 /* lr %r4, %r4 */) {
+ s390_irgen_call_noredir();
+ } else {
+ /* We don't know what it is. */
+ return S390_DECODE_UNKNOWN_SPECIAL_INSN;
+ }
+
+ dis_res->len = S390_SPECIAL_OP_PREAMBLE_SIZE + S390_SPECIAL_OP_SIZE;
+
+ return status;
+}
+
+
+/* Function returns # bytes that were decoded or 0 in case of failure */
+UInt
+s390_decode_and_irgen(UChar *bytes, UInt insn_length, DisResult *dres)
+{
+ s390_decode_t status;
+
+ dis_res = dres;
+
+ /* Spot the 8-byte preamble: 18ff lr r15,r15
+ 1811 lr r1,r1
+ 1822 lr r2,r2
+ 1833 lr r3,r3 */
+ if (bytes[ 0] == 0x18 && bytes[ 1] == 0xff && bytes[ 2] == 0x18 &&
+ bytes[ 3] == 0x11 && bytes[ 4] == 0x18 && bytes[ 5] == 0x22 &&
+ bytes[ 6] == 0x18 && bytes[ 7] == 0x33) {
+
+ /* Handle special instruction that follows that preamble. */
+ if (0) vex_printf("special function handling...\n");
+ bytes += S390_SPECIAL_OP_PREAMBLE_SIZE;
+ status = s390_decode_special_and_irgen(bytes);
+ insn_length = S390_SPECIAL_OP_SIZE;
+ } else {
+ /* Handle normal instructions. */
+ switch (insn_length) {
+ case 2:
+ status = s390_decode_2byte_and_irgen(bytes);
+ break;
+
+ case 4:
+ status = s390_decode_4byte_and_irgen(bytes);
+ break;
+
+ case 6:
+ status = s390_decode_6byte_and_irgen(bytes);
+ break;
+
+ default:
+ status = S390_DECODE_ERROR;
+ break;
+ }
+ }
+ /* next instruction is execute, stop here */
+ if (irsb->next == NULL && (*(char *)(HWord) guest_IA_next_instr == 0x44)) {
+ irsb->next = IRExpr_Const(IRConst_U64(guest_IA_next_instr));
+ dis_res->whatNext = Dis_StopHere;
+ }
+
+ if (status == S390_DECODE_OK) return insn_length; /* OK */
+
+ /* Decoding failed somehow */
+ vex_printf("vex s390->IR: ");
+ switch (status) {
+ case S390_DECODE_UNKNOWN_INSN:
+ vex_printf("unknown insn: ");
+ break;
+
+ case S390_DECODE_UNIMPLEMENTED_INSN:
+ vex_printf("unimplemented insn: ");
+ break;
+
+ case S390_DECODE_UNKNOWN_SPECIAL_INSN:
+ vex_printf("unimplemented special insn: ");
+ break;
+
+ default:
+ case S390_DECODE_ERROR:
+ vex_printf("decoding error: ");
+ break;
+ }
+
+ vex_printf("%02x%02x", bytes[0], bytes[1]);
+ if (insn_length > 2) {
+ vex_printf(" %02x%02x", bytes[2], bytes[3]);
+ }
+ if (insn_length > 4) {
+ vex_printf(" %02x%02x", bytes[4], bytes[5]);
+ }
+ vex_printf("\n");
+
+ return 0; /* Failed */
+}
+
+
+/* Generate an IRExpr for an address. */
+static __inline__ IRExpr *
+mkaddr_expr(Addr64 addr)
+{
+ return IRExpr_Const(IRConst_U64(addr));
+}
+
+
+/* Disassemble a single instruction INSN into IR. */
+static DisResult
+disInstr_S390_WRK(UChar *insn, Bool (*resteerOkFn)(void *, Addr64),
+ void *callback_data)
+{
+ UChar byte;
+ UInt insn_length;
+ DisResult dres;
+
+ /* ---------------------------------------------------- */
+ /* --- Compute instruction length -- */
+ /* ---------------------------------------------------- */
+
+ /* Get the first byte of the insn. */
+ byte = insn[0];
+
+ /* The leftmost two bits (0:1) encode the length of the insn in bytes.
+ 00 -> 2 bytes, 01 -> 4 bytes, 10 -> 4 bytes, 11 -> 6 bytes. */
+ insn_length = ((((byte >> 6) + 1) >> 1) + 1) << 1;
+
+ guest_IA_next_instr = guest_IA_curr_instr + insn_length;
+
+ /* ---------------------------------------------------- */
+ /* --- Initialise the DisResult data -- */
+ /* ---------------------------------------------------- */
+ dres.whatNext = Dis_Continue;
+ dres.len = insn_length;
+ dres.continueAt = 0;
+
+ /* fixs390: we should probably pass the resteer-function and the callback
+ data. It's not needed for correctness but improves performance. */
+
+ /* Normal and special instruction handling starts here. */
+ if (s390_decode_and_irgen(insn, insn_length, &dres) == 0) {
+ /* All decode failures end up here. The decoder has already issued an
+ error message.
+ Tell the dispatcher that this insn cannot be decoded, and so has
+ not been executed, and (is currently) the next to be executed.
+ IA should be up-to-date since it made so at the start of each
+ insn, but nevertheless be paranoid and update it again right
+ now. */
+ addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
+ mkaddr_expr(guest_IA_curr_instr)));
+
+ irsb->next = mkaddr_expr(guest_IA_curr_instr);
+ irsb->jumpkind = Ijk_NoDecode;
+ dres.whatNext = Dis_StopHere;
+ dres.len = 0;
+
+ return dres;
+ }
+
+ return dres;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Top-level fn ---*/
+/*------------------------------------------------------------*/
+
+/* Disassemble a single instruction into IR. The instruction
+ is located in host memory at &guest_code[delta]. */
+
+DisResult
+disInstr_S390(IRSB *irsb_IN,
+ Bool put_IP,
+ Bool (*resteerOkFn)(void *, Addr64),
+ Bool resteerCisOk,
+ void *callback_opaque,
+ UChar *guest_code,
+ Long delta,
+ Addr64 guest_IP,
+ VexArch guest_arch,
+ VexArchInfo *archinfo,
+ VexAbiInfo *abiinfo,
+ Bool host_bigendian)
+{
+ vassert(guest_arch == VexArchS390X);
+
+ /* The instruction decoder requires a big-endian machine. */
+ vassert(host_bigendian == True);
+
+ /* Set globals (see top of this file) */
+ guest_IA_curr_instr = guest_IP;
+
+ irsb = irsb_IN;
+
+ vassert(guest_arch == VexArchS390X);
+
+ /* We may be asked to update the guest IA before going further. */
+ if (put_IP)
+ addStmtToIRSB(irsb, IRStmt_Put(S390_GUEST_OFFSET(guest_IA),
+ mkaddr_expr(guest_IA_curr_instr)));
+
+ return disInstr_S390_WRK(guest_code + delta, resteerOkFn, callback_opaque);
+}
+
+/*---------------------------------------------------------------*/
+/*--- end guest_s390_toIR.c ---*/
+/*---------------------------------------------------------------*/
--- /dev/null
+/* -*- mode: C; c-basic-offset: 3; -*- */
+
+/*---------------------------------------------------------------*/
+/*--- begin host_s390_defs.c ---*/
+/*---------------------------------------------------------------*/
+
+/*
+ This file is part of Valgrind, a dynamic binary instrumentation
+ framework.
+
+ Copyright IBM Corp. 2010-2011
+
+ This program is free software; you can redistribute it and/or
+ modify it under the terms of the GNU General Public License as
+ published by the Free Software Foundation; either version 2 of the
+ License, or (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
+
+ The GNU General Public License is contained in the file COPYING.
+*/
+
+/* Contributed by Florian Krohm */
+
+#include "libvex_basictypes.h"
+#include "libvex.h"
+#include "libvex_trc_values.h"
+#include "libvex_guest_offsets.h"
+#include "libvex_s390x_common.h"
+
+#include "main_util.h"
+#include "main_globals.h"
+#include "host_generic_regs.h"
+#include "host_s390_defs.h"
+#include "host_s390_disasm.h"
+#include <stdarg.h>
+
+/* KLUDGE: We need to know the hwcaps of the host when generating
+ code. But that info is not passed to emit_S390Instr. Only mode64 is
+ being passed. So, ideally, we want this passed as an argument, too.
+ Until then, we use a global variable. This variable is set as a side
+ effect of iselSB_S390. This is safe because instructions are selected
+ before they are emitted. */
+const VexArchInfo *s390_archinfo_host;
+
+/*------------------------------------------------------------*/
+/*--- Registers ---*/
+/*------------------------------------------------------------*/
+
+/* Decompile the given register into a static buffer and return it */
+const HChar *
+s390_hreg_as_string(HReg reg)
+{
+ static HChar buf[10];
+
+ static const HChar ireg_names[16][5] = {
+ "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
+ "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
+ };
+
+ static const HChar freg_names[16][5] = {
+ "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
+ "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15"
+ };
+
+ UInt r; /* hregNumber() returns an UInt */
+
+ r = hregNumber(reg);
+
+ /* Be generic for all virtual regs. */
+ if (hregIsVirtual(reg)) {
+ buf[0] = '\0';
+ switch (hregClass(reg)) {
+ case HRcInt64: vex_sprintf(buf, "%%vR%d", r); break;
+ case HRcFlt64: vex_sprintf(buf, "%%vF%d", r); break;
+ default: goto fail;
+ }
+ return buf;
+ }
+
+ /* But specific for real regs. */
+ vassert(r < 16);
+
+ switch (hregClass(reg)) {
+ case HRcInt64: return ireg_names[r];
+ case HRcFlt64: return freg_names[r];
+ default: goto fail;
+ }
+
+ fail: vpanic("s390_hreg_as_string");
+}
+
+
+/* Tell the register allocator which registers can be allocated. */
+void
+s390_hreg_get_allocable(Int *nregs, HReg **arr)
+{
+ UInt i;
+
+ /* Total number of allocable registers (all classes) */
+ *nregs = 16 /* GPRs */
+ - 1 /* r0 */
+ - 1 /* r12 register holding VG_(dispatch_ctr) */
+ - 1 /* r13 guest state pointer */
+ - 1 /* r14 link register */
+ - 1 /* r15 stack pointer */
+ + 16 /* FPRs */
+ ;
+
+ *arr = LibVEX_Alloc(*nregs * sizeof(HReg));
+
+ i = 0;
+
+ /* GPR0 is not available because it is interpreted as 0, when used
+ as a base or index register. */
+ (*arr)[i++] = mkHReg(1, HRcInt64, False);
+ (*arr)[i++] = mkHReg(2, HRcInt64, False);
+ (*arr)[i++] = mkHReg(3, HRcInt64, False);
+ (*arr)[i++] = mkHReg(4, HRcInt64, False);
+ (*arr)[i++] = mkHReg(5, HRcInt64, False);
+ (*arr)[i++] = mkHReg(6, HRcInt64, False);
+ (*arr)[i++] = mkHReg(7, HRcInt64, False);
+ (*arr)[i++] = mkHReg(8, HRcInt64, False);
+ (*arr)[i++] = mkHReg(9, HRcInt64, False);
+ /* GPR10 and GPR11 are used for instructions that use register pairs.
+ Otherwise, they are available to the allocator */
+ (*arr)[i++] = mkHReg(10, HRcInt64, False);
+ (*arr)[i++] = mkHReg(11, HRcInt64, False);
+ /* GPR12 is not available because it caches VG_(dispatch_ctr) */
+ /* GPR13 is not available because it is used as guest state pointer */
+ /* GPR14 is not available because it is used as link register */
+ /* GPR15 is not available because it is used as stack pointer */
+
+ /* Add the available real (non-virtual) FPRs */
+ (*arr)[i++] = mkHReg(0, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(1, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(2, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(3, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(4, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(5, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(6, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(7, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(8, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(9, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(10, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(11, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(12, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(13, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(14, HRcFlt64, False);
+ (*arr)[i++] = mkHReg(15, HRcFlt64, False);
+ /* FPR12 - FPR15 are also used as register pairs for 128-bit
+ floating point operations */
+}
+
+
+/* Return the real register that holds the guest state pointer */
+HReg
+s390_hreg_guest_state_pointer(void)
+{
+ return mkHReg(S390_REGNO_GUEST_STATE_POINTER, HRcInt64, False);
+}
+
+/* Is VALUE within the domain of a 20-bit signed integer. */
+static __inline__ Bool
+fits_signed_20bit(Int value)
+{
+ return ((value << 12) >> 12) == value;
+}
+
+
+/* Is VALUE within the domain of a 12-bit unsigned integer. */
+static __inline__ Bool
+fits_unsigned_12bit(Int value)
+{
+ return (value & 0xFFF) == value;
+}
+
+/*------------------------------------------------------------*/
+/*--- Addressing modes (amodes) ---*/
+/*------------------------------------------------------------*/
+
+/* Construct a b12 amode. */
+s390_amode *
+s390_amode_b12(Int d, HReg b)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_unsigned_12bit(d));
+
+ am->tag = S390_AMODE_B12;
+ am->d = d;
+ am->b = b;
+ am->x = 0; /* hregNumber(0) == 0 */
+
+ return am;
+}
+
+
+/* Construct a b20 amode. */
+s390_amode *
+s390_amode_b20(Int d, HReg b)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_signed_20bit(d));
+
+ am->tag = S390_AMODE_B20;
+ am->d = d;
+ am->b = b;
+ am->x = 0; /* hregNumber(0) == 0 */
+
+ return am;
+}
+
+
+/* Construct a bx12 amode. */
+s390_amode *
+s390_amode_bx12(Int d, HReg b, HReg x)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_unsigned_12bit(d));
+ vassert(b != 0);
+ vassert(x != 0);
+
+ am->tag = S390_AMODE_BX12;
+ am->d = d;
+ am->b = b;
+ am->x = x;
+
+ return am;
+}
+
+
+/* Construct a bx20 amode. */
+s390_amode *
+s390_amode_bx20(Int d, HReg b, HReg x)
+{
+ s390_amode *am = LibVEX_Alloc(sizeof(s390_amode));
+
+ vassert(fits_signed_20bit(d));
+ vassert(b != 0);
+ vassert(x != 0);
+
+ am->tag = S390_AMODE_BX20;
+ am->d = d;
+ am->b = b;
+ am->x = x;
+
+ return am;
+}
+
+
+/* Construct an AMODE for accessing the guest state at OFFSET */
+s390_amode *
+s390_amode_for_guest_state(Int offset)
+{
+ if (fits_unsigned_12bit(offset))
+ return s390_amode_b12(offset, s390_hreg_guest_state_pointer());
+ if (fits_signed_20bit(offset))
+ return s390_amode_b20(offset, s390_hreg_guest_state_pointer());
+
+ vpanic("invalid guest state offset");
+}
+
+
+/* Decompile the given amode into a static buffer and return it. */
+const HChar *
+s390_amode_as_string(const s390_amode *am)
+{
+ static HChar buf[30];
+ HChar *p;
+
+ buf[0] = '\0';
+ p = buf;
+
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_B20:
+ vex_sprintf(p, "%d(%s)", am->d, s390_hreg_as_string(am->b));
+ break;
+
+ case S390_AMODE_BX12:
+ case S390_AMODE_BX20:
+ /* s390_hreg_as_string returns pointer to local buffer. Need to
+ split this into two printfs */
+ p += vex_sprintf(p, "%d(%s,", am->d, s390_hreg_as_string(am->x));
+ vex_sprintf(p, "%s)", s390_hreg_as_string(am->b));
+ break;
+
+ default:
+ vpanic("s390_amode_as_string");
+ }
+
+ return buf;
+}
+
+
+/* Helper function for s390_amode_is_sane */
+static __inline__ Bool
+is_virtual_gpr(HReg reg)
+{
+ return hregIsVirtual(reg) && hregClass(reg) == HRcInt64;
+}
+
+
+/* Sanity check for an amode */
+Bool
+s390_amode_is_sane(const s390_amode *am)
+{
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ return is_virtual_gpr(am->b) && fits_unsigned_12bit(am->d);
+
+ case S390_AMODE_B20:
+ return is_virtual_gpr(am->b) && fits_signed_20bit(am->d);
+
+ case S390_AMODE_BX12:
+ return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) &&
+ fits_unsigned_12bit(am->d);
+
+ case S390_AMODE_BX20:
+ return is_virtual_gpr(am->b) && is_virtual_gpr(am->x) &&
+ fits_signed_20bit(am->d);
+
+ default:
+ vpanic("s390_amode_is_sane");
+ }
+}
+
+
+/* Record the register use of an amode */
+void
+s390_amode_get_reg_usage(HRegUsage *u, const s390_amode *am)
+{
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_B20:
+ addHRegUse(u, HRmRead, am->b);
+ return;
+
+ case S390_AMODE_BX12:
+ case S390_AMODE_BX20:
+ addHRegUse(u, HRmRead, am->b);
+ addHRegUse(u, HRmRead, am->x);
+ return;
+
+ default:
+ vpanic("s390_amode_get_reg_usage");
+ }
+}
+
+
+void
+s390_amode_map_regs(HRegRemap *m, s390_amode *am)
+{
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_B20:
+ am->b = lookupHRegRemap(m, am->b);
+ return;
+
+ case S390_AMODE_BX12:
+ case S390_AMODE_BX20:
+ am->b = lookupHRegRemap(m, am->b);
+ am->x = lookupHRegRemap(m, am->x);
+ return;
+
+ default:
+ vpanic("s390_amode_map_regs");
+ }
+}
+
+
+
+void
+ppS390AMode(struct s390_amode *am)
+{
+ vex_printf("%s", s390_amode_as_string(am));
+}
+
+void
+ppS390Instr(struct s390_insn *insn, Bool mode64)
+{
+ vex_printf("%s", s390_insn_as_string(insn));
+}
+
+void
+ppHRegS390(HReg reg)
+{
+ vex_printf("%s", s390_hreg_as_string(reg));
+}
+
+/*------------------------------------------------------------*/
+/*--- Helpers for register allocation ---*/
+/*------------------------------------------------------------*/
+
+/* Called once per translation. */
+void
+getAllocableRegs_S390(Int *nregs, HReg **arr, Bool mode64)
+{
+ s390_hreg_get_allocable(nregs, arr);
+}
+
+
+/* Tell the register allocator how the given instruction uses the registers
+ it refers to. */
+void
+getRegUsage_S390Instr(HRegUsage *u, struct s390_insn *insn, Bool mode64)
+{
+ s390_insn_get_reg_usage(u, insn);
+}
+
+
+/* Map the registers of the given instruction */
+void
+mapRegs_S390Instr(HRegRemap *m, struct s390_insn *insn, Bool mode64)
+{
+ s390_insn_map_regs(m, insn);
+}
+
+
+/* Figure out if the given insn represents a reg-reg move, and if so
+ assign the source and destination to *src and *dst. If in doubt say No.
+ Used by the register allocator to do move coalescing. */
+Bool
+isMove_S390Instr(struct s390_insn *insn, HReg *src, HReg *dst)
+{
+ return s390_insn_is_reg_reg_move(insn, src, dst);
+}
+
+
+/* Generate s390 spill/reload instructions under the direction of the
+ register allocator. Note it's critical these don't write the
+ condition codes. This is like an Ist_Put */
+void
+genSpill_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64)
+{
+ s390_amode *am;
+
+ vassert(offsetB >= 0);
+ vassert(offsetB <= (1 << 12)); /* because we use b12 amode */
+ vassert(!hregIsVirtual(rreg));
+
+ *i1 = *i2 = NULL;
+
+ am = s390_amode_for_guest_state(offsetB);
+
+ switch (hregClass(rreg)) {
+ case HRcInt64:
+ case HRcFlt64:
+ *i1 = s390_insn_store(8, am, rreg);
+ return;
+
+ default:
+ ppHRegClass(hregClass(rreg));
+ vpanic("genSpill_S390: unimplemented regclass");
+ }
+}
+
+
+/* This is like an Iex_Get */
+void
+genReload_S390(HInstr **i1, HInstr **i2, HReg rreg, Int offsetB, Bool mode64)
+{
+ s390_amode *am;
+
+ vassert(offsetB >= 0);
+ vassert(offsetB <= (1 << 12)); /* because we use b12 amode */
+ vassert(!hregIsVirtual(rreg));
+
+ *i1 = *i2 = NULL;
+
+ am = s390_amode_for_guest_state(offsetB);
+
+ switch (hregClass(rreg)) {
+ case HRcInt64:
+ case HRcFlt64:
+ *i1 = s390_insn_load(8, rreg, am);
+ return;
+
+ default:
+ ppHRegClass(hregClass(rreg));
+ vpanic("genReload_S390: unimplemented regclass");
+ }
+}
+
+/* Helper function for s390_insn_get_reg_usage */
+static void
+s390_opnd_RMI_get_reg_usage(HRegUsage *u, s390_opnd_RMI op)
+{
+ switch (op.tag) {
+ case S390_OPND_REG:
+ addHRegUse(u, HRmRead, op.variant.reg);
+ break;
+
+ case S390_OPND_AMODE:
+ s390_amode_get_reg_usage(u, op.variant.am);
+ break;
+
+ case S390_OPND_IMMEDIATE:
+ break;
+
+ default:
+ vpanic("s390_opnd_RMI_get_reg_usage");
+ }
+}
+
+
+/* Tell the register allocator how the given insn uses the registers */
+void
+s390_insn_get_reg_usage(HRegUsage *u, const s390_insn *insn)
+{
+ initHRegUsage(u);
+
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ addHRegUse(u, HRmWrite, insn->variant.load.dst);
+ s390_amode_get_reg_usage(u, insn->variant.load.src);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ addHRegUse(u, HRmWrite, insn->variant.load_immediate.dst);
+ break;
+
+ case S390_INSN_STORE:
+ addHRegUse(u, HRmRead, insn->variant.store.src);
+ s390_amode_get_reg_usage(u, insn->variant.store.dst);
+ break;
+
+ case S390_INSN_MOVE:
+ addHRegUse(u, HRmRead, insn->variant.move.src);
+ addHRegUse(u, HRmWrite, insn->variant.move.dst);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.cond_move.src);
+ addHRegUse(u, HRmWrite, insn->variant.cond_move.dst);
+ break;
+
+ case S390_INSN_ALU:
+ addHRegUse(u, HRmWrite, insn->variant.alu.dst);
+ addHRegUse(u, HRmRead, insn->variant.alu.dst); /* op1 */
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.alu.op2);
+ break;
+
+ case S390_INSN_MUL:
+ addHRegUse(u, HRmRead, insn->variant.mul.dst_lo); /* op1 */
+ addHRegUse(u, HRmWrite, insn->variant.mul.dst_lo);
+ addHRegUse(u, HRmWrite, insn->variant.mul.dst_hi);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.mul.op2);
+ break;
+
+ case S390_INSN_DIV:
+ addHRegUse(u, HRmRead, insn->variant.div.op1_lo);
+ addHRegUse(u, HRmRead, insn->variant.div.op1_hi);
+ addHRegUse(u, HRmWrite, insn->variant.div.op1_lo);
+ addHRegUse(u, HRmWrite, insn->variant.div.op1_hi);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.div.op2);
+ break;
+
+ case S390_INSN_DIVS:
+ addHRegUse(u, HRmRead, insn->variant.divs.op1);
+ addHRegUse(u, HRmWrite, insn->variant.divs.op1); /* quotient */
+ addHRegUse(u, HRmWrite, insn->variant.divs.rem); /* remainder */
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.divs.op2);
+ break;
+
+ case S390_INSN_FLOGR:
+ addHRegUse(u, HRmWrite, insn->variant.flogr.bitpos);
+ addHRegUse(u, HRmWrite, insn->variant.flogr.modval);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.flogr.src);
+ break;
+
+ case S390_INSN_UNOP:
+ addHRegUse(u, HRmWrite, insn->variant.unop.dst);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.unop.src);
+ break;
+
+ case S390_INSN_TEST:
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.test.src);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ addHRegUse(u, HRmWrite, insn->variant.cc2bool.dst);
+ break;
+
+ case S390_INSN_CAS:
+ addHRegUse(u, HRmRead, insn->variant.cas.op1);
+ s390_amode_get_reg_usage(u, insn->variant.cas.op2);
+ addHRegUse(u, HRmRead, insn->variant.cas.op3);
+ addHRegUse(u, HRmWrite, insn->variant.cas.old_mem);
+ break;
+
+ case S390_INSN_COMPARE:
+ addHRegUse(u, HRmRead, insn->variant.compare.src1);
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.compare.src2);
+ break;
+
+ case S390_INSN_BRANCH:
+ s390_opnd_RMI_get_reg_usage(u, insn->variant.branch.dst);
+ /* The destination address is loaded into S390_REGNO_RETURN_VALUE.
+ See s390_insn_branch_emit. */
+ addHRegUse(u, HRmWrite,
+ mkHReg(S390_REGNO_RETURN_VALUE, HRcInt64, False));
+ break;
+
+ case S390_INSN_HELPER_CALL: {
+ UInt i;
+
+ /* Assume that all volatile registers are clobbered. ABI says,
+ volatile registers are: r0 - r5. Valgrind's register allocator
+ does not know about r0, so we can leave that out */
+ for (i = 1; i <= 5; ++i) {
+ addHRegUse(u, HRmWrite, mkHReg(i, HRcInt64, False));
+ }
+
+ /* Ditto for floating point registers. f0 - f7 are volatile */
+ for (i = 0; i <= 7; ++i) {
+ addHRegUse(u, HRmWrite, mkHReg(i, HRcFlt64, False));
+ }
+
+ /* The registers that are used for passing arguments will be read.
+ Not all of them may, but in general we need to assume that. */
+ for (i = 0; i < insn->variant.helper_call.num_args; ++i) {
+ addHRegUse(u, HRmRead, mkHReg(s390_gprno_from_arg_index(i),
+ HRcInt64, False));
+ }
+
+ /* s390_insn_helper_call_emit also reads / writes the link register
+ and stack pointer. But those registers are not visible to the
+ register allocator. So we don't need to do anything for them. */
+ break;
+ }
+
+ case S390_INSN_BFP_TRIOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_triop.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.dst); /* first */
+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.op2); /* second */
+ addHRegUse(u, HRmRead, insn->variant.bfp_triop.op3); /* third */
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_binop.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_binop.dst); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp_binop.op2); /* right */
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_unop.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_unop.op); /* operand */
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ addHRegUse(u, HRmWrite, insn->variant.bfp_compare.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp_compare.op1); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp_compare.op2); /* right */
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_binop.dst_hi);
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_binop.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.dst_hi); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.dst_lo); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.op2_hi); /* right */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_binop.op2_lo); /* right */
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_compare.dst);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op1_hi); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op1_lo); /* left */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op2_hi); /* right */
+ addHRegUse(u, HRmRead, insn->variant.bfp128_compare.op2_lo); /* right */
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi);
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_TO:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi);
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_lo);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_FROM:
+ addHRegUse(u, HRmWrite, insn->variant.bfp128_unop.dst_hi);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_hi);
+ addHRegUse(u, HRmRead, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ default:
+ vpanic("s390_insn_get_reg_usage");
+ }
+}
+
+
+/* Helper function for s390_insn_map_regs */
+static void
+s390_opnd_RMI_map_regs(HRegRemap *m, s390_opnd_RMI *op)
+{
+ switch (op->tag) {
+ case S390_OPND_REG:
+ op->variant.reg = lookupHRegRemap(m, op->variant.reg);
+ break;
+
+ case S390_OPND_IMMEDIATE:
+ break;
+
+ case S390_OPND_AMODE:
+ s390_amode_map_regs(m, op->variant.am);
+ break;
+
+ default:
+ vpanic("s390_opnd_RMI_map_regs");
+ }
+}
+
+
+void
+s390_insn_map_regs(HRegRemap *m, s390_insn *insn)
+{
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ insn->variant.load.dst = lookupHRegRemap(m, insn->variant.load.dst);
+ s390_amode_map_regs(m, insn->variant.load.src);
+ break;
+
+ case S390_INSN_STORE:
+ s390_amode_map_regs(m, insn->variant.store.dst);
+ insn->variant.store.src = lookupHRegRemap(m, insn->variant.store.src);
+ break;
+
+ case S390_INSN_MOVE:
+ insn->variant.move.dst = lookupHRegRemap(m, insn->variant.move.dst);
+ insn->variant.move.src = lookupHRegRemap(m, insn->variant.move.src);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ insn->variant.cond_move.dst = lookupHRegRemap(m, insn->variant.cond_move.dst);
+ s390_opnd_RMI_map_regs(m, &insn->variant.cond_move.src);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ insn->variant.load_immediate.dst =
+ lookupHRegRemap(m, insn->variant.load_immediate.dst);
+ break;
+
+ case S390_INSN_ALU:
+ insn->variant.alu.dst = lookupHRegRemap(m, insn->variant.alu.dst);
+ s390_opnd_RMI_map_regs(m, &insn->variant.alu.op2);
+ break;
+
+ case S390_INSN_MUL:
+ insn->variant.mul.dst_hi = lookupHRegRemap(m, insn->variant.mul.dst_hi);
+ insn->variant.mul.dst_lo = lookupHRegRemap(m, insn->variant.mul.dst_lo);
+ s390_opnd_RMI_map_regs(m, &insn->variant.mul.op2);
+ break;
+
+ case S390_INSN_DIV:
+ insn->variant.div.op1_hi = lookupHRegRemap(m, insn->variant.div.op1_hi);
+ insn->variant.div.op1_lo = lookupHRegRemap(m, insn->variant.div.op1_lo);
+ s390_opnd_RMI_map_regs(m, &insn->variant.div.op2);
+ break;
+
+ case S390_INSN_DIVS:
+ insn->variant.divs.op1 = lookupHRegRemap(m, insn->variant.divs.op1);
+ insn->variant.divs.rem = lookupHRegRemap(m, insn->variant.divs.rem);
+ s390_opnd_RMI_map_regs(m, &insn->variant.divs.op2);
+ break;
+
+ case S390_INSN_FLOGR:
+ insn->variant.flogr.bitpos = lookupHRegRemap(m, insn->variant.flogr.bitpos);
+ insn->variant.flogr.modval = lookupHRegRemap(m, insn->variant.flogr.modval);
+ s390_opnd_RMI_map_regs(m, &insn->variant.flogr.src);
+ break;
+
+ case S390_INSN_UNOP:
+ insn->variant.unop.dst = lookupHRegRemap(m, insn->variant.unop.dst);
+ s390_opnd_RMI_map_regs(m, &insn->variant.unop.src);
+ break;
+
+ case S390_INSN_TEST:
+ s390_opnd_RMI_map_regs(m, &insn->variant.test.src);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ insn->variant.cc2bool.dst = lookupHRegRemap(m, insn->variant.cc2bool.dst);
+ break;
+
+ case S390_INSN_CAS:
+ insn->variant.cas.op1 = lookupHRegRemap(m, insn->variant.cas.op1);
+ s390_amode_map_regs(m, insn->variant.cas.op2);
+ insn->variant.cas.op3 = lookupHRegRemap(m, insn->variant.cas.op3);
+ insn->variant.cas.old_mem = lookupHRegRemap(m, insn->variant.cas.old_mem);
+ break;
+
+ case S390_INSN_COMPARE:
+ insn->variant.compare.src1 = lookupHRegRemap(m, insn->variant.compare.src1);
+ s390_opnd_RMI_map_regs(m, &insn->variant.compare.src2);
+ break;
+
+ case S390_INSN_BRANCH:
+ s390_opnd_RMI_map_regs(m, &insn->variant.branch.dst);
+ /* No need to map S390_REGNO_RETURN_VALUE. It's not virtual */
+ break;
+
+ case S390_INSN_HELPER_CALL:
+ /* s390_insn_helper_call_emit also reads / writes the link register
+ and stack pointer. But those registers are not visible to the
+ register allocator. So we don't need to do anything for them.
+ As for the arguments of the helper call -- they will be loaded into
+ non-virtual registers. Again, we don't need to do anything for those
+ here. */
+ break;
+
+ case S390_INSN_BFP_TRIOP:
+ insn->variant.bfp_triop.dst = lookupHRegRemap(m, insn->variant.bfp_triop.dst);
+ insn->variant.bfp_triop.op2 = lookupHRegRemap(m, insn->variant.bfp_triop.op2);
+ insn->variant.bfp_triop.op3 = lookupHRegRemap(m, insn->variant.bfp_triop.op3);
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ insn->variant.bfp_binop.dst = lookupHRegRemap(m, insn->variant.bfp_binop.dst);
+ insn->variant.bfp_binop.op2 = lookupHRegRemap(m, insn->variant.bfp_binop.op2);
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ insn->variant.bfp_unop.dst = lookupHRegRemap(m, insn->variant.bfp_unop.dst);
+ insn->variant.bfp_unop.op = lookupHRegRemap(m, insn->variant.bfp_unop.op);
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ insn->variant.bfp_compare.dst = lookupHRegRemap(m, insn->variant.bfp_compare.dst);
+ insn->variant.bfp_compare.op1 = lookupHRegRemap(m, insn->variant.bfp_compare.op1);
+ insn->variant.bfp_compare.op2 = lookupHRegRemap(m, insn->variant.bfp_compare.op2);
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ insn->variant.bfp128_binop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.dst_hi);
+ insn->variant.bfp128_binop.dst_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.dst_lo);
+ insn->variant.bfp128_binop.op2_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.op2_hi);
+ insn->variant.bfp128_binop.op2_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_binop.op2_lo);
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ insn->variant.bfp128_compare.dst =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.dst);
+ insn->variant.bfp128_compare.op1_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op1_hi);
+ insn->variant.bfp128_compare.op1_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op1_lo);
+ insn->variant.bfp128_compare.op2_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op2_hi);
+ insn->variant.bfp128_compare.op2_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_compare.op2_lo);
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ insn->variant.bfp128_unop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi);
+ insn->variant.bfp128_unop.dst_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_lo);
+ insn->variant.bfp128_unop.op_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi);
+ insn->variant.bfp128_unop.op_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_TO:
+ insn->variant.bfp128_unop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi);
+ insn->variant.bfp128_unop.dst_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_lo);
+ insn->variant.bfp128_unop.op_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_FROM:
+ insn->variant.bfp128_unop.dst_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.dst_hi);
+ insn->variant.bfp128_unop.op_hi =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_hi);
+ insn->variant.bfp128_unop.op_lo =
+ lookupHRegRemap(m, insn->variant.bfp128_unop.op_lo);
+ break;
+
+ default:
+ vpanic("s390_insn_map_regs");
+ }
+}
+
+
+/* Return True, if INSN is a move between two registers of the same class.
+ In that case assign the source and destination registers to SRC and DST,
+ respectively. */
+Bool
+s390_insn_is_reg_reg_move(const s390_insn *insn, HReg *src, HReg *dst)
+{
+ if (insn->tag == S390_INSN_MOVE &&
+ hregClass(insn->variant.move.src) == hregClass(insn->variant.move.dst)) {
+ *src = insn->variant.move.src;
+ *dst = insn->variant.move.dst;
+ return True;
+ }
+
+ return False;
+}
+
+
+#undef likely
+#undef unlikely
+#define likely(x) __builtin_expect(!!(x), 1)
+#define unlikely(x) __builtin_expect(!!(x), 0)
+
+/*------------------------------------------------------------*/
+/*--- Functions to emit a sequence of bytes ---*/
+/*------------------------------------------------------------*/
+
+
+static __inline__ UChar *
+emit_2bytes(UChar *p, ULong val)
+{
+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 6, 2) + 2;
+}
+
+
+static __inline__ UChar *
+emit_4bytes(UChar *p, ULong val)
+{
+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 4, 4) + 4;
+}
+
+
+static __inline__ UChar *
+emit_6bytes(UChar *p, ULong val)
+{
+ return (UChar *)__builtin_memcpy(p, ((UChar *)&val) + 2, 6) + 6;
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Functions to emit various instruction formats ---*/
+/*------------------------------------------------------------*/
+
+
+static UChar *
+emit_RI(UChar *p, UInt op, UChar r1, UShort i2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 20;
+ the_insn |= ((ULong)i2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RIL(UChar *p, ULong op, UChar r1, UInt i2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 36;
+ the_insn |= ((ULong)i2) << 0;
+
+ return emit_6bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RR(UChar *p, UInt op, UChar r1, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_2bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RRE(UChar *p, UInt op, UChar r1, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RRF(UChar *p, UInt op, UChar r1, UChar r3, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 12;
+ the_insn |= ((ULong)r3) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RRF3(UChar *p, UInt op, UChar r3, UChar r1, UChar r2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r3) << 12;
+ the_insn |= ((ULong)r1) << 4;
+ the_insn |= ((ULong)r2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RS(UChar *p, UInt op, UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 20;
+ the_insn |= ((ULong)r3) << 16;
+ the_insn |= ((ULong)b2) << 12;
+ the_insn |= ((ULong)d2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RSY(UChar *p, ULong op, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 36;
+ the_insn |= ((ULong)r3) << 32;
+ the_insn |= ((ULong)b2) << 28;
+ the_insn |= ((ULong)dl2) << 16;
+ the_insn |= ((ULong)dh2) << 8;
+
+ return emit_6bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RX(UChar *p, UInt op, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 20;
+ the_insn |= ((ULong)x2) << 16;
+ the_insn |= ((ULong)b2) << 12;
+ the_insn |= ((ULong)d2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_RXY(UChar *p, ULong op, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)r1) << 36;
+ the_insn |= ((ULong)x2) << 32;
+ the_insn |= ((ULong)b2) << 28;
+ the_insn |= ((ULong)dl2) << 16;
+ the_insn |= ((ULong)dh2) << 8;
+
+ return emit_6bytes(p, the_insn);
+}
+
+
+static UChar *
+emit_S(UChar *p, UInt op, UChar b2, UShort d2)
+{
+ ULong the_insn = op;
+
+ the_insn |= ((ULong)b2) << 12;
+ the_insn |= ((ULong)d2) << 0;
+
+ return emit_4bytes(p, the_insn);
+}
+
+
+/*------------------------------------------------------------*/
+/*--- Functions to emit particular instructions ---*/
+/*------------------------------------------------------------*/
+
+
+static Char *
+s390_emit_AR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ar", r1, r2);
+
+ return emit_RR(p, 0x1a00, r1, r2);
+}
+
+
+static Char *
+s390_emit_AGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "agr", r1, r2);
+
+ return emit_RRE(p, 0xb9080000, r1, r2);
+}
+
+
+static Char *
+s390_emit_A(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "a", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5a000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_AY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ay", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000005aULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_AG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ag", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000008ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_AFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "afi", r1, i2);
+
+ return emit_RIL(p, 0xc20900000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_AGFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "agfi", r1, i2);
+
+ return emit_RIL(p, 0xc20800000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_AH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "ah", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x4a000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_AHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ahy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000007aULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_AHI(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "ahi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa70a0000, r1, i2);
+}
+
+
+static Char *
+s390_emit_AGHI(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "aghi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa70b0000, r1, i2);
+}
+
+
+static Char *
+s390_emit_NR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "nr", r1, r2);
+
+ return emit_RR(p, 0x1400, r1, r2);
+}
+
+
+static Char *
+s390_emit_NGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ngr", r1, r2);
+
+ return emit_RRE(p, 0xb9800000, r1, r2);
+}
+
+
+static Char *
+s390_emit_N(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "n", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x54000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_NY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ny", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000054ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_NG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ng", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000080ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_NIHF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "nihf", r1, i2);
+
+ return emit_RIL(p, 0xc00a00000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_NILF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "nilf", r1, i2);
+
+ return emit_RIL(p, 0xc00b00000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_NILL(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "nill", r1, i2);
+
+ return emit_RI(p, 0xa5070000, r1, i2);
+}
+
+
+static Char *
+s390_emit_BASR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "basr", r1, r2);
+
+ return emit_RR(p, 0x0d00, r1, r2);
+}
+
+
+static Char *
+s390_emit_BCR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(XMNM, GPR), S390_XMNM_BCR, r1, r2);
+
+ return emit_RR(p, 0x0700, r1, r2);
+}
+
+
+static Char *
+s390_emit_BRC(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(XMNM, PCREL), S390_XMNM_BRC, r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa7040000, r1, i2);
+}
+
+
+static Char *
+s390_emit_CR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "cr", r1, r2);
+
+ return emit_RR(p, 0x1900, r1, r2);
+}
+
+
+static Char *
+s390_emit_CGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "cgr", r1, r2);
+
+ return emit_RRE(p, 0xb9200000, r1, r2);
+}
+
+
+static Char *
+s390_emit_C(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "c", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x59000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_CY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "cy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000059ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_CG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "cg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000020ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_CFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "cfi", r1, i2);
+
+ return emit_RIL(p, 0xc20d00000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_CS(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, UDXB), "cs", r1, r3, d2, 0, b2);
+
+ return emit_RS(p, 0xba000000, r1, r3, b2, d2);
+}
+
+
+static Char *
+s390_emit_CSY(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csy", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb0000000014ULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_CSG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "csg", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb0000000030ULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_CLR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "clr", r1, r2);
+
+ return emit_RR(p, 0x1500, r1, r2);
+}
+
+
+static Char *
+s390_emit_CLGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "clgr", r1, r2);
+
+ return emit_RRE(p, 0xb9210000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CL(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "cl", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x55000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_CLY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "cly", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000055ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_CLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "clg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000021ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_CLFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "clfi", r1, i2);
+
+ return emit_RIL(p, 0xc20f00000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_DR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dr", r1, r2);
+
+ return emit_RR(p, 0x1d00, r1, r2);
+}
+
+
+static Char *
+s390_emit_D(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "d", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5d000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_DLR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dlr", r1, r2);
+
+ return emit_RRE(p, 0xb9970000, r1, r2);
+}
+
+
+static Char *
+s390_emit_DLGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dlgr", r1, r2);
+
+ return emit_RRE(p, 0xb9870000, r1, r2);
+}
+
+
+static Char *
+s390_emit_DL(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "dl", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000097ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_DLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "dlg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000087ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_DSGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "dsgr", r1, r2);
+
+ return emit_RRE(p, 0xb90d0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_DSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "dsg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000000dULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_XR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "xr", r1, r2);
+
+ return emit_RR(p, 0x1700, r1, r2);
+}
+
+
+static Char *
+s390_emit_XGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "xgr", r1, r2);
+
+ return emit_RRE(p, 0xb9820000, r1, r2);
+}
+
+
+static Char *
+s390_emit_X(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "x", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x57000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_XY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "xy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000057ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_XG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "xg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000082ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_XIHF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "xihf", r1, i2);
+
+ return emit_RIL(p, 0xc00600000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_XILF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "xilf", r1, i2);
+
+ return emit_RIL(p, 0xc00700000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_FLOGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "flogr", r1, r2);
+
+ return emit_RRE(p, 0xb9830000, r1, r2);
+}
+
+
+static Char *
+s390_emit_IC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "ic", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x43000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_ICY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "icy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000073ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_IIHF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iihf", r1, i2);
+
+ return emit_RIL(p, 0xc00800000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_IIHH(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iihh", r1, i2);
+
+ return emit_RI(p, 0xa5000000, r1, i2);
+}
+
+
+static Char *
+s390_emit_IIHL(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iihl", r1, i2);
+
+ return emit_RI(p, 0xa5010000, r1, i2);
+}
+
+
+static Char *
+s390_emit_IILF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iilf", r1, i2);
+
+ return emit_RIL(p, 0xc00900000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_IILH(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iilh", r1, i2);
+
+ return emit_RI(p, 0xa5020000, r1, i2);
+}
+
+
+static Char *
+s390_emit_IILL(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "iill", r1, i2);
+
+ return emit_RI(p, 0xa5030000, r1, i2);
+}
+
+
+static Char *
+s390_emit_IPM(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, GPR), "ipm", r1);
+
+ return emit_RRE(p, 0xb2220000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lr", r1, r2);
+
+ return emit_RR(p, 0x1800, r1, r2);
+}
+
+
+static Char *
+s390_emit_LGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lgr", r1, r2);
+
+ return emit_RRE(p, 0xb9040000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LGFR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lgfr", r1, r2);
+
+ return emit_RRE(p, 0xb9140000, r1, r2);
+}
+
+
+static Char *
+s390_emit_L(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "l", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x58000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_LY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ly", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000058ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000004ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgf", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000014ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LGFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "lgfi", r1, i2);
+
+ return emit_RIL(p, 0xc00100000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_LTR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ltr", r1, r2);
+
+ return emit_RR(p, 0x1200, r1, r2);
+}
+
+
+static Char *
+s390_emit_LTGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ltgr", r1, r2);
+
+ return emit_RRE(p, 0xb9020000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LT(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lt", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000012ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LTG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ltg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000002ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lbr", r1, r2);
+
+ return emit_RRE(p, 0xb9260000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LGBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lgbr", r1, r2);
+
+ return emit_RRE(p, 0xb9060000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lb", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000076ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LGB(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgb", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000077ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LCR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lcr", r1, r2);
+
+ return emit_RR(p, 0x1300, r1, r2);
+}
+
+
+static Char *
+s390_emit_LCGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lcgr", r1, r2);
+
+ return emit_RRE(p, 0xb9030000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LHR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lhr", r1, r2);
+
+ return emit_RRE(p, 0xb9270000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LGHR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "lghr", r1, r2);
+
+ return emit_RRE(p, 0xb9070000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "lh", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x48000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_LHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lhy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000078ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "lgh", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000015ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LHI(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "lhi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa7080000, r1, i2);
+}
+
+
+static Char *
+s390_emit_LGHI(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "lghi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa7090000, r1, i2);
+}
+
+
+static Char *
+s390_emit_LLGFR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llgfr", r1, r2);
+
+ return emit_RRE(p, 0xb9160000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LLGF(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgf", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000016ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LLCR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llcr", r1, r2);
+
+ return emit_RRE(p, 0xb9940000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LLGCR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llgcr", r1, r2);
+
+ return emit_RRE(p, 0xb9840000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LLC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llc", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000094ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LLGC(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgc", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000090ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LLHR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llhr", r1, r2);
+
+ return emit_RRE(p, 0xb9950000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LLGHR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "llghr", r1, r2);
+
+ return emit_RRE(p, 0xb9850000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LLH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llh", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000095ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LLGH(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "llgh", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000091ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LLILF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "llilf", r1, i2);
+
+ return emit_RIL(p, 0xc00f00000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_LLILH(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "llilh", r1, i2);
+
+ return emit_RI(p, 0xa50e0000, r1, i2);
+}
+
+
+static Char *
+s390_emit_LLILL(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "llill", r1, i2);
+
+ return emit_RI(p, 0xa50f0000, r1, i2);
+}
+
+
+static Char *
+s390_emit_MR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "mr", r1, r2);
+
+ return emit_RR(p, 0x1c00, r1, r2);
+}
+
+
+static Char *
+s390_emit_M(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "m", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5c000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_MFY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "mfy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000005cULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_MH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "mh", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x4c000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_MHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "mhy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000007cULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_MHI(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "mhi", r1, (Int)(Short)i2);
+
+ return emit_RI(p, 0xa70c0000, r1, i2);
+}
+
+
+static Char *
+s390_emit_MLR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "mlr", r1, r2);
+
+ return emit_RRE(p, 0xb9960000, r1, r2);
+}
+
+
+static Char *
+s390_emit_MLGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "mlgr", r1, r2);
+
+ return emit_RRE(p, 0xb9860000, r1, r2);
+}
+
+
+static Char *
+s390_emit_ML(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "ml", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000096ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_MLG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "mlg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000086ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_MSR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "msr", r1, r2);
+
+ return emit_RRE(p, 0xb2520000, r1, r2);
+}
+
+
+static Char *
+s390_emit_MSGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "msgr", r1, r2);
+
+ return emit_RRE(p, 0xb90c0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_MS(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "ms", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x71000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_MSY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "msy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000051ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_MSG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "msg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000000cULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_MSFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "msfi", r1, i2);
+
+ return emit_RIL(p, 0xc20100000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_MSGFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, INT), "msgfi", r1, i2);
+
+ return emit_RIL(p, 0xc20000000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_OR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "or", r1, r2);
+
+ return emit_RR(p, 0x1600, r1, r2);
+}
+
+
+static Char *
+s390_emit_OGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "ogr", r1, r2);
+
+ return emit_RRE(p, 0xb9810000, r1, r2);
+}
+
+
+static Char *
+s390_emit_O(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "o", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x56000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_OY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "oy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000056ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_OG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "og", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000081ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_OIHF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "oihf", r1, i2);
+
+ return emit_RIL(p, 0xc00c00000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_OILF(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "oilf", r1, i2);
+
+ return emit_RIL(p, 0xc00d00000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_OILL(UChar *p, UChar r1, UShort i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "oill", r1, i2);
+
+ return emit_RI(p, 0xa50b0000, r1, i2);
+}
+
+
+static Char *
+s390_emit_SLL(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sll", r1, d2, 0, b2);
+
+ return emit_RS(p, 0x89000000, r1, r3, b2, d2);
+}
+
+
+static Char *
+s390_emit_SLLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "sllg", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb000000000dULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_SRA(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sra", r1, d2, 0, b2);
+
+ return emit_RS(p, 0x8a000000, r1, r3, b2, d2);
+}
+
+
+static Char *
+s390_emit_SRAG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srag", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb000000000aULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_SRL(UChar *p, UChar r1, UChar r3, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "srl", r1, d2, 0, b2);
+
+ return emit_RS(p, 0x88000000, r1, r3, b2, d2);
+}
+
+
+static Char *
+s390_emit_SRLG(UChar *p, UChar r1, UChar r3, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, GPR, SDXB), "srlg", r1, r3, dh2, dl2, 0, b2);
+
+ return emit_RSY(p, 0xeb000000000cULL, r1, r3, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_ST(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "st", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x50000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_STY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sty", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000050ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_STG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "stg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000024ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_STC(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "stc", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x42000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_STCY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "stcy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000072ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_STH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sth", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x40000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_STHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sthy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000070ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_SR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "sr", r1, r2);
+
+ return emit_RR(p, 0x1b00, r1, r2);
+}
+
+
+static Char *
+s390_emit_SGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, GPR), "sgr", r1, r2);
+
+ return emit_RRE(p, 0xb9090000, r1, r2);
+}
+
+
+static Char *
+s390_emit_S(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "s", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x5b000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_SY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000005bULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_SG(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "sg", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe30000000009ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_SH(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UDXB), "sh", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x4b000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_SHY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, SDXB), "shy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xe3000000007bULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_SLFI(UChar *p, UChar r1, UInt i2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, UINT), "slfi", r1, i2);
+
+ return emit_RIL(p, 0xc20500000000ULL, r1, i2);
+}
+
+
+static Char *
+s390_emit_LDR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ldr", r1, r2);
+
+ return emit_RR(p, 0x2800, r1, r2);
+}
+
+
+static Char *
+s390_emit_LE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "le", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x78000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_LD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "ld", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x68000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_LEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "ley", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000064ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "ldy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000065ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_LFPC(UChar *p, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, UDXB), "lfpc", d2, 0, b2);
+
+ return emit_S(p, 0xb29d0000, b2, d2);
+}
+
+
+static Char *
+s390_emit_LDGR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "ldgr", r1, r2);
+
+ return emit_RRE(p, 0xb3c10000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LGDR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, GPR, FPR), "lgdr", r1, r2);
+
+ return emit_RRE(p, 0xb3cd0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LZER(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, FPR), "lzer", r1);
+
+ return emit_RRE(p, 0xb3740000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LZDR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, FPR), "lzdr", r1);
+
+ return emit_RRE(p, 0xb3750000, r1, r2);
+}
+
+
+static Char *
+s390_emit_SFPC(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, GPR), "sfpc", r1);
+
+ return emit_RRE(p, 0xb3840000, r1, r2);
+}
+
+
+static Char *
+s390_emit_STE(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "ste", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x70000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_STD(UChar *p, UChar r1, UChar x2, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, UDXB), "std", r1, d2, x2, b2);
+
+ return emit_RX(p, 0x60000000, r1, x2, b2, d2);
+}
+
+
+static Char *
+s390_emit_STEY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "stey", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000066ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_STDY(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl2, UChar dh2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, SDXB), "stdy", r1, dh2, dl2, x2, b2);
+
+ return emit_RXY(p, 0xed0000000067ULL, r1, x2, b2, dl2, dh2);
+}
+
+
+static Char *
+s390_emit_STFPC(UChar *p, UChar b2, UShort d2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC2(MNM, UDXB), "stfpc", d2, 0, b2);
+
+ return emit_S(p, 0xb29c0000, b2, d2);
+}
+
+
+static Char *
+s390_emit_AEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "aebr", r1, r2);
+
+ return emit_RRE(p, 0xb30a0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_ADBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "adbr", r1, r2);
+
+ return emit_RRE(p, 0xb31a0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_AXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "axbr", r1, r2);
+
+ return emit_RRE(p, 0xb34a0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cebr", r1, r2);
+
+ return emit_RRE(p, 0xb3090000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3190000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "cxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3490000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CEFBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cefbr", r1, r2);
+
+ return emit_RRE(p, 0xb3940000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CDFBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cdfbr", r1, r2);
+
+ return emit_RRE(p, 0xb3950000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CXFBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cxfbr", r1, r2);
+
+ return emit_RRE(p, 0xb3960000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CEGBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cegbr", r1, r2);
+
+ return emit_RRE(p, 0xb3a40000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CDGBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cdgbr", r1, r2);
+
+ return emit_RRE(p, 0xb3a50000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CXGBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, GPR), "cxgbr", r1, r2);
+
+ return emit_RRE(p, 0xb3a60000, r1, r2);
+}
+
+
+static Char *
+s390_emit_CFEBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfebr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3980000, r3, r1, r2);
+}
+
+
+static Char *
+s390_emit_CFDBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfdbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3990000, r3, r1, r2);
+}
+
+
+static Char *
+s390_emit_CFXBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cfxbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb39a0000, r3, r1, r2);
+}
+
+
+static Char *
+s390_emit_CGEBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgebr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3a80000, r3, r1, r2);
+}
+
+
+static Char *
+s390_emit_CGDBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgdbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3a90000, r3, r1, r2);
+}
+
+
+static Char *
+s390_emit_CGXBR(UChar *p, UChar r3, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, GPR, UINT, FPR), "cgxbr", r1, r3, r2);
+
+ return emit_RRF3(p, 0xb3aa0000, r3, r1, r2);
+}
+
+
+static Char *
+s390_emit_DEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "debr", r1, r2);
+
+ return emit_RRE(p, 0xb30d0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_DDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ddbr", r1, r2);
+
+ return emit_RRE(p, 0xb31d0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_DXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "dxbr", r1, r2);
+
+ return emit_RRE(p, 0xb34d0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LCEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lcebr", r1, r2);
+
+ return emit_RRE(p, 0xb3030000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LCDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lcdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3130000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LCXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lcxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3430000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LDEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ldebr", r1, r2);
+
+ return emit_RRE(p, 0xb3040000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LXDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lxdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3050000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LXEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lxebr", r1, r2);
+
+ return emit_RRE(p, 0xb3060000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LNEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lnebr", r1, r2);
+
+ return emit_RRE(p, 0xb3010000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LNDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lndbr", r1, r2);
+
+ return emit_RRE(p, 0xb3110000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LNXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lnxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3410000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LPEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lpebr", r1, r2);
+
+ return emit_RRE(p, 0xb3000000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LPDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lpdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3100000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LPXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lpxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3400000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LEDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ledbr", r1, r2);
+
+ return emit_RRE(p, 0xb3440000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LDXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "ldxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3450000, r1, r2);
+}
+
+
+static Char *
+s390_emit_LEXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "lexbr", r1, r2);
+
+ return emit_RRE(p, 0xb3460000, r1, r2);
+}
+
+
+static Char *
+s390_emit_MEEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "meebr", r1, r2);
+
+ return emit_RRE(p, 0xb3170000, r1, r2);
+}
+
+
+static Char *
+s390_emit_MDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "mdbr", r1, r2);
+
+ return emit_RRE(p, 0xb31c0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_MXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "mxbr", r1, r2);
+
+ return emit_RRE(p, 0xb34c0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_MAEBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "maebr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb30e0000, r1, r3, r2);
+}
+
+
+static Char *
+s390_emit_MADBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "madbr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb31e0000, r1, r3, r2);
+}
+
+
+static Char *
+s390_emit_MSEBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msebr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb30f0000, r1, r3, r2);
+}
+
+
+static Char *
+s390_emit_MSDBR(UChar *p, UChar r1, UChar r3, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC4(MNM, FPR, FPR, FPR), "msdbr", r1, r3, r2);
+
+ return emit_RRF(p, 0xb31f0000, r1, r3, r2);
+}
+
+
+static Char *
+s390_emit_SQEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sqebr", r1, r2);
+
+ return emit_RRE(p, 0xb3140000, r1, r2);
+}
+
+
+static Char *
+s390_emit_SQDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sqdbr", r1, r2);
+
+ return emit_RRE(p, 0xb3150000, r1, r2);
+}
+
+
+static Char *
+s390_emit_SQXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sqxbr", r1, r2);
+
+ return emit_RRE(p, 0xb3160000, r1, r2);
+}
+
+
+static Char *
+s390_emit_SEBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sebr", r1, r2);
+
+ return emit_RRE(p, 0xb30b0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_SDBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sdbr", r1, r2);
+
+ return emit_RRE(p, 0xb31b0000, r1, r2);
+}
+
+
+static Char *
+s390_emit_SXBR(UChar *p, UChar r1, UChar r2)
+{
+ if (unlikely(vex_traceflags & VEX_TRACE_ASM))
+ s390_disasm(ENC3(MNM, FPR, FPR), "sxbr", r1, r2);
+
+ return emit_RRE(p, 0xb34b0000, r1, r2);
+}
+
+/* For both 32-bit and 64-bit clients we can use the instructions that
+ were available on z900. See binutils/opcodes/s390-opc.txt
+
+ Note, that entering a wrapper for a z/arch instruction does not
+ imply that the client is a 64-bit client. It only means that this
+ instruction is a good match for the expression at hand.
+*/
+
+/* Provide a symbolic name for register "R0" */
+#define R0 0
+
+/* Split up a 20-bit displacement into its high and low piece
+ suitable for passing as function arguments */
+#define DISP20(d) ((d) & 0xFFF), (((d) >> 12) & 0xFF)
+
+/*---------------------------------------------------------------*/
+/*--- Helper functions ---*/
+/*---------------------------------------------------------------*/
+
+static __inline__ Bool
+uint_fits_signed_16bit(UInt val)
+{
+ int v = val & 0xFFFFu;
+
+ /* sign extend */
+ v = (v << 16) >> 16;
+
+ return val == (UInt)v;
+}
+
+
+static __inline__ Bool
+ulong_fits_signed_16bit(ULong val)
+{
+ Long v = val & 0xFFFFu;
+
+ /* sign extend */
+ v = (v << 48) >> 48;
+
+ return val == (ULong)v;
+}
+
+
+static __inline__ Bool
+ulong_fits_signed_32bit(ULong val)
+{
+ Long v = val & 0xFFFFFFFFu;
+
+ /* sign extend */
+ v = (v << 32) >> 32;
+
+ return val == (ULong)v;
+}
+
+
+static __inline__ Bool
+ulong_fits_unsigned_32bit(ULong val)
+{
+ return (val & 0xFFFFFFFFu) == val;
+}
+
+
+/* Load a 64-bit immediate VAL into register REG. */
+static UChar *
+s390_emit_load_64imm(UChar *p, UChar reg, ULong val)
+{
+ if (ulong_fits_signed_16bit(val)) {
+ return s390_emit_LGHI(p, reg, val);
+ }
+
+ if (s390_host_has_eimm) {
+ if (ulong_fits_unsigned_32bit(val)) {
+ return s390_emit_LLILF(p, reg, val);
+ }
+ if (ulong_fits_signed_32bit(val)) {
+ /* LGFI's sign extension will recreate the correct 64-bit value */
+ return s390_emit_LGFI(p, reg, val);
+ }
+ /* Do it in two steps: upper half [0:31] and lower half [32:63] */
+ p = s390_emit_IIHF(p, reg, val >> 32);
+ return s390_emit_IILF(p, reg, val & 0xFFFFFFFF);
+ }
+
+ /* Fall back */
+ if (ulong_fits_unsigned_32bit(val)) {
+ p = s390_emit_LLILH(p, reg, (val >> 16) & 0xFFFF); /* sets val[32:47]
+ val[0:31] = 0 */
+ p = s390_emit_IILL(p, reg, val & 0xFFFF); /* sets val[48:63] */
+ return p;
+ }
+
+ p = s390_emit_IIHH(p, reg, (val >> 48) & 0xFFFF);
+ p = s390_emit_IIHL(p, reg, (val >> 32) & 0xFFFF);
+ p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF);
+ p = s390_emit_IILL(p, reg, val & 0xFFFF);
+
+ return p;
+}
+
+/* Load a 32-bit immediate VAL into register REG. */
+static UChar *
+s390_emit_load_32imm(UChar *p, UChar reg, UInt val)
+{
+ if (uint_fits_signed_16bit(val)) {
+ /* LHI's sign extension will recreate the correct 32-bit value */
+ return s390_emit_LHI(p, reg, val);
+ }
+ if (s390_host_has_eimm) {
+ return s390_emit_IILF(p, reg, val);
+ }
+ /* val[0:15] --> (val >> 16) & 0xFFFF
+ val[16:31] --> val & 0xFFFF */
+ p = s390_emit_IILH(p, reg, (val >> 16) & 0xFFFF);
+ return s390_emit_IILL(p, reg, val & 0xFFFF);
+}
+
+/*------------------------------------------------------------*/
+/*--- Wrapper functions ---*/
+/*------------------------------------------------------------*/
+
+/* r1[32:63],r1+1[32:63] = r1+1[32:63] * memory[op2addr][32:63] */
+static UChar *
+s390_emit_MFYw(UChar *p, UChar r1, UChar x, UChar b, UShort dl, UChar dh)
+{
+ if (s390_host_has_gie) {
+ return s390_emit_MFY(p, r1, x, b, dl, dh);
+ }
+
+ /* Load from memory into R0, then MULTIPLY with R1 */
+ p = s390_emit_LY(p, R0, x, b, dl, dh);
+ return s390_emit_MR(p, r1, R0);
+}
+
+/* r1[32:63] = r1[32:63] * i2 */
+static UChar *
+s390_emit_MSFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_gie) {
+ return s390_emit_MSFI(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then MULTIPLY R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_MSR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] & i2 */
+static UChar *
+s390_emit_NILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_NILF(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then AND R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] | i2 */
+static UChar *
+s390_emit_OILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_OILF(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then AND R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_OR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] ^ i2 */
+static UChar *
+s390_emit_XILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_XILF(p, r1, i2);
+ }
+
+ /* Load I2 into R0; then AND R0 with R1 */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_XR(p, r1, R0);
+}
+
+
+/* r1[32:63] = sign_extend(r2[56:63]) */
+static UChar *
+s390_emit_LBRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LBR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLL(p, r1, R0, R0, 24); /* r1 = r1 << 24 */
+ return s390_emit_SRA(p, r1, R0, R0, 24); /* r1 = r1 >>a 24 */
+}
+
+
+/* r1[0:63] = sign_extend(r2[56:63]) */
+static UChar *
+s390_emit_LGBRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LGBR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLLG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 << 56 */
+ return s390_emit_SRAG(p, r1, r1, R0, DISP20(56)); /* r1 = r1 >>a 56 */
+}
+
+
+/* r1[32:63] = sign_extend(r2[48:63]) */
+static UChar *
+s390_emit_LHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLL(p, r1, R0, R0, 16); /* r1 = r1 << 16 */
+ return s390_emit_SRA(p, r1, R0, R0, 16); /* r1 = r1 >>a 16 */
+}
+
+
+/* r1[0:63] = sign_extend(r2[48:63]) */
+static UChar *
+s390_emit_LGHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LGHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2); /* r1 = r2 */
+ p = s390_emit_SLLG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 << 48 */
+ return s390_emit_SRAG(p, r1, r1, R0, DISP20(48)); /* r1 = r1 >>a 48 */
+}
+
+
+/* r1[0:63] = sign_extend(i2) */
+static UChar *
+s390_emit_LGFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LGFI(p, r1, i2);
+ }
+
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_LGFR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend($r2[56:63]) */
+static UChar *
+s390_emit_LLCRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLCR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LHI(p, R0, 0xFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[0:63] = zero_extend($r2[56:63]) */
+static UChar *
+s390_emit_LLGCRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLGCR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LLILL(p, R0, 0xFF);
+ return s390_emit_NGR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend(r2[48:63]) */
+static UChar *
+s390_emit_LLHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LLILL(p, R0, 0xFFFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[0:63] = zero_extend(r2[48:63]) */
+static UChar *
+s390_emit_LLGHRw(UChar *p, UChar r1, UChar r2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLGHR(p, r1, r2);
+ }
+
+ p = s390_emit_LR(p, r1, r2);
+ p = s390_emit_LLILL(p, R0, 0xFFFF);
+ return s390_emit_NGR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend(mem[op2addr][0:7]) */
+static UChar *
+s390_emit_LLCw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLC(p, r1, x2, b2, dl, dh);
+ }
+
+ if (dh == 0) {
+ p = s390_emit_IC(p, r1, x2, b2, dl);
+ } else {
+ p = s390_emit_ICY(p, r1, x2, b2, dl, dh);
+ }
+ p = s390_emit_LLILL(p, R0, 0xFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[32:63] = zero_extend(mem[op2addr][0:15]) */
+static UChar *
+s390_emit_LLHw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLH(p, r1, x2, b2, dl, dh);
+ }
+
+ p = s390_emit_LLGH(p, r1, x2, b2, dl, dh);
+ p = s390_emit_LLILL(p, R0, 0xFFFF);
+ return s390_emit_NR(p, r1, R0);
+}
+
+
+/* r1[0:63] = zero_extend(i2) */
+static UChar *
+s390_emit_LLILFw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LLILF(p, r1, i2);
+ }
+
+ p = s390_emit_LLILH(p, r1, (i2 >> 16) & 0xFFFF); /* i2[0:15] */
+ return s390_emit_OILL(p, r1, i2 & 0xFFFF);
+}
+
+
+/* r1[32:63] = r1[32:63] + i2 */
+static UChar *
+s390_emit_AFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_AFI(p, r1, i2);
+ }
+ /* Load 32 bit immediate to R0 then add */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_AR(p, r1, R0);
+}
+
+
+/* r1[32:63] = r1[32:63] - i2 */
+static UChar *
+s390_emit_SLFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_SLFI(p, r1, i2);
+ }
+
+ /* Load 32 bit immediate to R0 then subtract */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_SR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_LTw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LT(p, r1, x2, b2, dl, dh);
+ }
+ /* Load 32 bit from memory to R0 then compare */
+ if (dh == 0) {
+ p = s390_emit_L(p, R0, x2, b2, dl);
+ } else {
+ p = s390_emit_LY(p, R0, x2, b2, dl, dh);
+ }
+ return s390_emit_LTR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_LTGw(UChar *p, UChar r1, UChar x2, UChar b2, UShort dl, UChar dh)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_LTG(p, r1, x2, b2, dl, dh);
+ }
+ /* Load 64 bit from memory to R0 then compare */
+ p = s390_emit_LG(p, R0, x2, b2, dl, dh);
+ return s390_emit_LTGR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_CFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_CFI(p, r1, i2);
+ }
+ /* Load 32 bit immediate to R0 then compare */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_CR(p, r1, R0);
+}
+
+
+static UChar *
+s390_emit_CLFIw(UChar *p, UChar r1, UInt i2)
+{
+ if (s390_host_has_eimm) {
+ return s390_emit_CLFI(p, r1, i2);
+ }
+ /* Load 32 bit immediate to R0 then compare */
+ p = s390_emit_load_32imm(p, R0, i2);
+ return s390_emit_CLR(p, r1, R0);
+}
+
+/* Split up a 20-bit displacement into its high and low piece
+ suitable for passing as function arguments */
+#define DISP20(d) ((d) & 0xFFF), (((d) >> 12) & 0xFF)
+
+/*---------------------------------------------------------------*/
+/*--- Constructors for the various s390_insn kinds ---*/
+/*---------------------------------------------------------------*/
+
+s390_insn *
+s390_insn_load(UChar size, HReg dst, s390_amode *src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_LOAD;
+ insn->size = size;
+ insn->variant.load.src = src;
+ insn->variant.load.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_store(UChar size, s390_amode *dst, HReg src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_STORE;
+ insn->size = size;
+ insn->variant.store.src = src;
+ insn->variant.store.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_move(UChar size, HReg dst, HReg src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_MOVE;
+ insn->size = size;
+ insn->variant.move.src = src;
+ insn->variant.move.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_cond_move(UChar size, s390_cc_t cond, HReg dst, s390_opnd_RMI src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_COND_MOVE;
+ insn->size = size;
+ insn->variant.cond_move.cond = cond;
+ insn->variant.cond_move.src = src;
+ insn->variant.cond_move.dst = dst;
+
+ vassert(size == 1 || size == 2 || size == 4 || size == 8);
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_load_immediate(UChar size, HReg dst, ULong value)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_LOAD_IMMEDIATE;
+ insn->size = size;
+ insn->variant.load_immediate.dst = dst;
+ insn->variant.load_immediate.value = value;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_alu(UChar size, s390_alu_t tag, HReg dst, s390_opnd_RMI op2)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_ALU;
+ insn->size = size;
+ insn->variant.alu.tag = tag;
+ insn->variant.alu.dst = dst;
+ insn->variant.alu.op2 = op2;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_mul(UChar size, HReg dst_hi, HReg dst_lo, s390_opnd_RMI op2,
+ Bool signed_multiply)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(! hregIsVirtual(dst_hi));
+ vassert(! hregIsVirtual(dst_lo));
+
+ insn->tag = S390_INSN_MUL;
+ insn->size = size;
+ insn->variant.mul.dst_hi = dst_hi;
+ insn->variant.mul.dst_lo = dst_lo;
+ insn->variant.mul.op2 = op2;
+ insn->variant.mul.signed_multiply = signed_multiply;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_div(UChar size, HReg op1_hi, HReg op1_lo, s390_opnd_RMI op2,
+ Bool signed_divide)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+ vassert(! hregIsVirtual(op1_hi));
+ vassert(! hregIsVirtual(op1_lo));
+
+ insn->tag = S390_INSN_DIV;
+ insn->size = size;
+ insn->variant.div.op1_hi = op1_hi;
+ insn->variant.div.op1_lo = op1_lo;
+ insn->variant.div.op2 = op2;
+ insn->variant.div.signed_divide = signed_divide;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_divs(UChar size, HReg rem, HReg op1, s390_opnd_RMI op2)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 8);
+ vassert(! hregIsVirtual(op1));
+ vassert(! hregIsVirtual(rem));
+
+ insn->tag = S390_INSN_DIVS;
+ insn->size = size;
+ insn->variant.divs.rem = rem; /* remainder */
+ insn->variant.divs.op1 = op1; /* also quotient */
+ insn->variant.divs.op2 = op2;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_flogr(UChar size, HReg bitpos, HReg modval, s390_opnd_RMI src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 8);
+ vassert(! hregIsVirtual(bitpos));
+ vassert(! hregIsVirtual(modval));
+
+ insn->tag = S390_INSN_FLOGR;
+ insn->size = size;
+ insn->variant.flogr.bitpos = bitpos; /* bit position */
+ insn->variant.flogr.modval = modval; /* modified input value */
+ insn->variant.flogr.src = src;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_unop(UChar size, s390_unop_t tag, HReg dst, s390_opnd_RMI opnd)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_UNOP;
+ insn->size = size;
+ insn->variant.unop.tag = tag;
+ insn->variant.unop.dst = dst;
+ insn->variant.unop.src = opnd;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_test(UChar size, s390_opnd_RMI src)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+
+ insn->tag = S390_INSN_TEST;
+ insn->size = size;
+ insn->variant.test.src = src;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_cc2bool(HReg dst, s390_cc_t cond)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_CC2BOOL;
+ insn->size = 0; /* does not matter */
+ insn->variant.cc2bool.cond = cond;
+ insn->variant.cc2bool.dst = dst;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_cas(UChar size, HReg op1, s390_amode *op2, HReg op3, HReg old_mem)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+ vassert(op2->x == 0);
+
+ insn->tag = S390_INSN_CAS;
+ insn->size = size;
+ insn->variant.cas.op1 = op1;
+ insn->variant.cas.op2 = op2;
+ insn->variant.cas.op3 = op3;
+ insn->variant.cas.old_mem = old_mem;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_compare(UChar size, HReg src1, s390_opnd_RMI src2,
+ Bool signed_comparison)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+
+ insn->tag = S390_INSN_COMPARE;
+ insn->size = size;
+ insn->variant.compare.src1 = src1;
+ insn->variant.compare.src2 = src2;
+ insn->variant.compare.signed_comparison = signed_comparison;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_branch(IRJumpKind kind, s390_cc_t cond, s390_opnd_RMI dst)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BRANCH;
+ insn->size = 0; /* does not matter */
+ insn->variant.branch.kind = kind;
+ insn->variant.branch.dst = dst;
+ insn->variant.branch.cond = cond;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_helper_call(s390_cc_t cond, Addr64 target, UInt num_args,
+ HChar *name)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_HELPER_CALL;
+ insn->size = 0; /* does not matter */
+ insn->variant.helper_call.cond = cond;
+ insn->variant.helper_call.target = target;
+ insn->variant.helper_call.num_args = num_args;
+ insn->variant.helper_call.name = name;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_triop(UChar size, s390_bfp_triop_t tag, HReg dst, HReg op2,
+ HReg op3, s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP_TRIOP;
+ insn->size = size;
+ insn->variant.bfp_triop.tag = tag;
+ insn->variant.bfp_triop.dst = dst;
+ insn->variant.bfp_triop.op2 = op2;
+ insn->variant.bfp_triop.op3 = op3;
+ insn->variant.bfp_triop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_binop(UChar size, s390_bfp_binop_t tag, HReg dst, HReg op2,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP_BINOP;
+ insn->size = size;
+ insn->variant.bfp_binop.tag = tag;
+ insn->variant.bfp_binop.dst = dst;
+ insn->variant.bfp_binop.op2 = op2;
+ insn->variant.bfp_binop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_unop(UChar size, s390_bfp_unop_t tag, HReg dst, HReg op,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP_UNOP;
+ insn->size = size;
+ insn->variant.bfp_unop.tag = tag;
+ insn->variant.bfp_unop.dst = dst;
+ insn->variant.bfp_unop.op = op;
+ insn->variant.bfp_unop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp_compare(UChar size, HReg dst, HReg op1, HReg op2)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ vassert(size == 4 || size == 8);
+
+ insn->tag = S390_INSN_BFP_COMPARE;
+ insn->size = size;
+ insn->variant.bfp_compare.dst = dst;
+ insn->variant.bfp_compare.op1 = op1;
+ insn->variant.bfp_compare.op2 = op2;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_binop(UChar size, s390_bfp_binop_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op2_hi, HReg op2_lo,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_BINOP;
+ insn->size = size;
+ insn->variant.bfp128_binop.tag = tag;
+ insn->variant.bfp128_binop.dst_hi = dst_hi;
+ insn->variant.bfp128_binop.dst_lo = dst_lo;
+ insn->variant.bfp128_binop.op2_hi = op2_hi;
+ insn->variant.bfp128_binop.op2_lo = op2_lo;
+ insn->variant.bfp128_binop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_unop(UChar size, s390_bfp_binop_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op_hi, HReg op_lo,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_UNOP;
+ insn->size = size;
+ insn->variant.bfp128_unop.tag = tag;
+ insn->variant.bfp128_unop.dst_hi = dst_hi;
+ insn->variant.bfp128_unop.dst_lo = dst_lo;
+ insn->variant.bfp128_unop.op_hi = op_hi;
+ insn->variant.bfp128_unop.op_lo = op_lo;
+ insn->variant.bfp128_unop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_compare(UChar size, HReg dst, HReg op1_hi, HReg op1_lo,
+ HReg op2_hi, HReg op2_lo)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_COMPARE;
+ insn->size = size;
+ insn->variant.bfp128_compare.dst = dst;
+ insn->variant.bfp128_compare.op1_hi = op1_hi;
+ insn->variant.bfp128_compare.op1_lo = op1_lo;
+ insn->variant.bfp128_compare.op2_hi = op2_hi;
+ insn->variant.bfp128_compare.op2_lo = op2_lo;
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_convert_to(UChar size, s390_bfp_unop_t tag, HReg dst_hi,
+ HReg dst_lo, HReg op)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_CONVERT_TO;
+ insn->size = size;
+ insn->variant.bfp128_unop.tag = tag;
+ insn->variant.bfp128_unop.dst_hi = dst_hi;
+ insn->variant.bfp128_unop.dst_lo = dst_lo;
+ insn->variant.bfp128_unop.op_hi = op;
+ insn->variant.bfp128_unop.op_lo = INVALID_HREG; /* unused */
+ insn->variant.bfp128_unop.rounding_mode = S390_ROUND_NEAREST_EVEN; /* unused */
+
+ return insn;
+}
+
+
+s390_insn *
+s390_insn_bfp128_convert_from(UChar size, s390_bfp_unop_t tag, HReg dst,
+ HReg op_hi, HReg op_lo,
+ s390_round_t rounding_mode)
+{
+ s390_insn *insn = LibVEX_Alloc(sizeof(s390_insn));
+
+ insn->tag = S390_INSN_BFP128_CONVERT_FROM;
+ insn->size = size;
+ insn->variant.bfp128_unop.tag = tag;
+ insn->variant.bfp128_unop.dst_hi = dst;
+ insn->variant.bfp128_unop.dst_lo = INVALID_HREG; /* unused */
+ insn->variant.bfp128_unop.op_hi = op_hi;
+ insn->variant.bfp128_unop.op_lo = op_lo;
+ insn->variant.bfp128_unop.rounding_mode = rounding_mode;
+
+ return insn;
+}
+
+
+/*---------------------------------------------------------------*/
+/*--- Debug print ---*/
+/*---------------------------------------------------------------*/
+
+static const HChar *
+s390_cc_as_string(s390_cc_t cc)
+{
+ switch (cc) {
+ case S390_CC_NEVER: return "never";
+ case S390_CC_OVFL: return "overflow";
+ case S390_CC_H: return "greater than"; /* A > B ; high */
+ case S390_CC_NLE: return "not low or equal";
+ case S390_CC_L: return "less than"; /* A < B ; low */
+ case S390_CC_NHE: return "not high or equal";
+ case S390_CC_LH: return "low or high";
+ case S390_CC_NE: return "not equal"; /* A != B ; not zero */
+ case S390_CC_E: return "equal"; /* A == B ; zero */
+ case S390_CC_NLH: return "not low or high";
+ case S390_CC_HE: return "greater or equal"; /* A >= B ; high or equal*/
+ case S390_CC_NL: return "not low"; /* not low */
+ case S390_CC_LE: return "less or equal"; /* A <= B ; low or equal */
+ case S390_CC_NH: return "not high";
+ case S390_CC_NO: return "not overflow";
+ case S390_CC_ALWAYS: return "always";
+ default:
+ vpanic("s390_cc_as_string");
+ }
+}
+
+
+/* Helper function for writing out a V insn */
+static void
+s390_sprintf(HChar *buf, HChar *fmt, ...)
+{
+ HChar *p;
+ ULong value;
+ va_list args;
+ va_start(args, fmt);
+
+ p = buf;
+ for ( ; *fmt; ++fmt) {
+ Int c = *fmt;
+
+ if (c != '%') {
+ *p++ = c;
+ continue;
+ }
+
+ c = *++fmt; /* next char */
+ switch (c) {
+ case '%':
+ *p++ = c; /* %% */
+ continue;
+
+ case 's': /* %s */
+ p += vex_sprintf(p, "%s", va_arg(args, HChar *));
+ continue;
+
+ case 'M': /* %M = mnemonic */
+ p += vex_sprintf(p, "%-8s", va_arg(args, HChar *));
+ continue;
+
+ case 'R': /* %R = register */
+ p += vex_sprintf(p, "%s", s390_hreg_as_string(va_arg(args, HReg)));
+ continue;
+
+ case 'A': /* %A = amode */
+ p += vex_sprintf(p, "%s",
+ s390_amode_as_string(va_arg(args, s390_amode *)));
+ continue;
+
+ case 'C': /* %C = condition code */
+ p += vex_sprintf(p, "%s", s390_cc_as_string(va_arg(args, s390_cc_t)));
+ continue;
+
+ case 'L': { /* %L = argument list in helper call*/
+ UInt i, num_args;
+
+ num_args = va_arg(args, UInt);
+
+ for (i = 0; i < num_args; ++i) {
+ if (i != 0) p += vex_sprintf(p, ", ");
+ p += vex_sprintf(p, "r%d", s390_gprno_from_arg_index(i));
+ }
+ continue;
+ }
+
+ case 'O': { /* %O = RMI operand */
+ s390_opnd_RMI *op = va_arg(args, s390_opnd_RMI *);
+
+ switch (op->tag) {
+ case S390_OPND_REG:
+ p += vex_sprintf(p, "%s", s390_hreg_as_string(op->variant.reg));
+ continue;
+
+ case S390_OPND_AMODE:
+ p += vex_sprintf(p, "%s", s390_amode_as_string(op->variant.am));
+ continue;
+
+ case S390_OPND_IMMEDIATE:
+ value = op->variant.imm;
+ goto print_value;
+
+ default:
+ goto fail;
+ }
+ }
+
+ case 'I': /* %I = immediate value */
+ value = va_arg(args, ULong);
+ goto print_value;
+
+ print_value:
+ if ((Long)value < 0)
+ p += vex_sprintf(p, "%lld", (Long)value);
+ else if (value < 100)
+ p += vex_sprintf(p, "%llu", value);
+ else
+ p += vex_sprintf(p, "0x%llx", value);
+ continue;
+
+ default:
+ goto fail;
+ }
+ }
+ *p = '\0';
+ va_end(args);
+
+ return;
+
+ fail: vpanic("s390_printf");
+}
+
+
+/* Decompile the given insn into a static buffer and return it */
+const HChar *
+s390_insn_as_string(const s390_insn *insn)
+{
+ static HChar buf[300];
+ const HChar *op;
+ HChar *p;
+
+ buf[0] = '\0';
+
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ s390_sprintf(buf, "%M %R,%A", "v-load", insn->variant.load.dst,
+ insn->variant.load.src);
+ break;
+
+ case S390_INSN_STORE:
+ s390_sprintf(buf, "%M %R,%A", "v-store", insn->variant.store.src,
+ insn->variant.store.dst);
+ break;
+
+ case S390_INSN_MOVE:
+ s390_sprintf(buf, "%M %R,%R", "v-move", insn->variant.move.dst,
+ insn->variant.move.src);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ s390_sprintf(buf, "%M if (%C) %R,%O", "v-move",
+ insn->variant.cond_move.cond, insn->variant.cond_move.dst,
+ &insn->variant.cond_move.src);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ s390_sprintf(buf, "%M %R,%I", "v-loadi", insn->variant.load_immediate.dst,
+ insn->variant.load_immediate.value);
+ break;
+
+ case S390_INSN_ALU:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: op = "v-add"; break;
+ case S390_ALU_SUB: op = "v-sub"; break;
+ case S390_ALU_MUL: op = "v-mul"; break;
+ case S390_ALU_AND: op = "v-and"; break;
+ case S390_ALU_OR: op = "v-or"; break;
+ case S390_ALU_XOR: op = "v-xor"; break;
+ case S390_ALU_LSH: op = "v-lsh"; break;
+ case S390_ALU_RSH: op = "v-rsh"; break;
+ case S390_ALU_RSHA: op = "v-rsha"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R,%O", op, insn->variant.alu.dst,
+ insn->variant.alu.dst /* op1 same as dst */,
+ &insn->variant.alu.op2);
+ break;
+
+ case S390_INSN_MUL:
+ if (insn->variant.mul.signed_multiply) {
+ op = "v-muls";
+ } else {
+ op = "v-mulu";
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.mul.dst_hi,
+ &insn->variant.mul.op2);
+ break;
+
+ case S390_INSN_DIV:
+ if (insn->variant.div.signed_divide) {
+ op = "v-divs";
+ } else {
+ op = "v-divu";
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.div.op1_hi,
+ &insn->variant.div.op2);
+ break;
+
+ case S390_INSN_DIVS:
+ s390_sprintf(buf, "%M %R,%O", "v-divsi", insn->variant.divs.op1,
+ &insn->variant.divs.op2);
+ break;
+
+ case S390_INSN_FLOGR:
+ s390_sprintf(buf, "%M %R,%O", "v-flogr", insn->variant.flogr.bitpos,
+ &insn->variant.flogr.src);
+ break;
+
+ case S390_INSN_UNOP:
+ switch (insn->variant.unop.tag) {
+ case S390_ZERO_EXTEND_8:
+ case S390_ZERO_EXTEND_16:
+ case S390_ZERO_EXTEND_32:
+ op = "v-zerox";
+ break;
+
+ case S390_SIGN_EXTEND_8:
+ case S390_SIGN_EXTEND_16:
+ case S390_SIGN_EXTEND_32:
+ op = "v-signx";
+ break;
+
+ case S390_NEGATE:
+ op = "v-neg";
+ break;
+
+ default:
+ goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.unop.dst,
+ &insn->variant.unop.src);
+ break;
+
+ case S390_INSN_TEST:
+ s390_sprintf(buf, "%M %O", "v-test", &insn->variant.test.src);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ s390_sprintf(buf, "%M %R,%C", "v-cc2b", insn->variant.cc2bool.dst,
+ insn->variant.cc2bool.cond);
+ break;
+
+ case S390_INSN_CAS:
+ s390_sprintf(buf, "%M %R,%A,%R,%R", "v-cas", insn->variant.cas.op1,
+ insn->variant.cas.op2, insn->variant.cas.op3,
+ insn->variant.cas.old_mem);
+ break;
+
+ case S390_INSN_COMPARE:
+ if (insn->variant.compare.signed_comparison) {
+ op = "v-cmps";
+ } else {
+ op = "v-cmpu";
+ }
+ s390_sprintf(buf, "%M %R,%O", op, insn->variant.compare.src1,
+ &insn->variant.compare.src2);
+ break;
+
+ case S390_INSN_BRANCH:
+ switch (insn->variant.branch.kind) {
+ case Ijk_ClientReq: op = "clientreq"; break;
+ case Ijk_Sys_syscall: op = "syscall"; break;
+ case Ijk_Yield: op = "yield"; break;
+ case Ijk_EmWarn: op = "emwarn"; break;
+ case Ijk_EmFail: op = "emfail"; break;
+ case Ijk_MapFail: op = "mapfail"; break;
+ case Ijk_NoDecode: op = "nodecode"; break;
+ case Ijk_TInval: op = "tinval"; break;
+ case Ijk_NoRedir: op = "noredir"; break;
+ case Ijk_SigTRAP: op = "sigtrap"; break;
+ case Ijk_Boring: op = "goto"; break;
+ case Ijk_Call: op = "call"; break;
+ case Ijk_Ret: op = "return"; break;
+ default:
+ goto fail;
+ }
+ s390_sprintf(buf, "if (%C) %s %O", insn->variant.branch.cond, op,
+ &insn->variant.branch.dst);
+ break;
+
+ case S390_INSN_HELPER_CALL: {
+
+ if (insn->variant.helper_call.cond != S390_CC_ALWAYS) {
+ s390_sprintf(buf, "%M if (%C) %s{%I}(%L)", "v-call",
+ insn->variant.helper_call.cond,
+ insn->variant.helper_call.name,
+ insn->variant.helper_call.target,
+ insn->variant.helper_call.num_args);
+ } else {
+ s390_sprintf(buf, "%M %s{%I}(%L)", "v-call",
+ insn->variant.helper_call.name,
+ insn->variant.helper_call.target,
+ insn->variant.helper_call.num_args);
+ }
+ break;
+ }
+
+ case S390_INSN_BFP_TRIOP:
+ switch (insn->variant.bfp_triop.tag) {
+ case S390_BFP_MADD: op = "v-fmadd"; break;
+ case S390_BFP_MSUB: op = "v-fmsub"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R,%R,%R", op, insn->variant.bfp_triop.dst,
+ insn->variant.bfp_triop.dst /* op1 same as dst */,
+ insn->variant.bfp_triop.op2, insn->variant.bfp_triop.op3);
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ switch (insn->variant.bfp_binop.tag) {
+ case S390_BFP_ADD: op = "v-fadd"; break;
+ case S390_BFP_SUB: op = "v-fsub"; break;
+ case S390_BFP_MUL: op = "v-fmul"; break;
+ case S390_BFP_DIV: op = "v-fdiv"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.bfp_binop.dst,
+ insn->variant.bfp_binop.dst /* op1 same as dst */,
+ insn->variant.bfp_binop.op2);
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ s390_sprintf(buf, "%M %R,%R,%R", "v-fcmp", insn->variant.bfp_compare.dst,
+ insn->variant.bfp_compare.op1, insn->variant.bfp_compare.op2);
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_ABS: op = "v-fabs"; break;
+ case S390_BFP_NABS: op = "v-fnabs"; break;
+ case S390_BFP_NEG: op = "v-fneg"; break;
+ case S390_BFP_SQRT: op = "v-fsqrt"; break;
+ case S390_BFP_I32_TO_F32:
+ case S390_BFP_I32_TO_F64:
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_I64_TO_F32:
+ case S390_BFP_I64_TO_F64:
+ case S390_BFP_I64_TO_F128: op = "v-i2f"; break;
+ case S390_BFP_F32_TO_I32:
+ case S390_BFP_F32_TO_I64:
+ case S390_BFP_F64_TO_I32:
+ case S390_BFP_F64_TO_I64:
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64: op = "v-f2i"; break;
+ case S390_BFP_F32_TO_F64:
+ case S390_BFP_F32_TO_F128:
+ case S390_BFP_F64_TO_F32:
+ case S390_BFP_F64_TO_F128:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: op = "v-f2f"; break;
+ default: goto fail;
+ }
+ s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp_unop.dst,
+ insn->variant.bfp_unop.op);
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ switch (insn->variant.bfp128_binop.tag) {
+ case S390_BFP_ADD: op = "v-fadd"; break;
+ case S390_BFP_SUB: op = "v-fsub"; break;
+ case S390_BFP_MUL: op = "v-fmul"; break;
+ case S390_BFP_DIV: op = "v-fdiv"; break;
+ default: goto fail;
+ }
+ /* Only write the register that identifies the register pair */
+ s390_sprintf(buf, "%M %R,%R,%R", op, insn->variant.bfp128_binop.dst_hi,
+ insn->variant.bfp128_binop.dst_hi /* op1 same as dst */,
+ insn->variant.bfp128_binop.op2_hi);
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ /* Only write the register that identifies the register pair */
+ s390_sprintf(buf, "%M %R,%R,%R", "v-fcmp", insn->variant.bfp128_compare.dst,
+ insn->variant.bfp128_compare.op1_hi,
+ insn->variant.bfp128_compare.op2_hi);
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ case S390_INSN_BFP128_CONVERT_TO:
+ case S390_INSN_BFP128_CONVERT_FROM:
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_ABS: op = "v-fabs"; break;
+ case S390_BFP_NABS: op = "v-fnabs"; break;
+ case S390_BFP_NEG: op = "v-fneg"; break;
+ case S390_BFP_SQRT: op = "v-fsqrt"; break;
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_I64_TO_F128: op = "v-i2f"; break;
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64: op = "v-f2i"; break;
+ case S390_BFP_F32_TO_F128:
+ case S390_BFP_F64_TO_F128:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: op = "v-f2f"; break;
+ default: goto fail;
+ }
+ /* Only write the register that identifies the register pair */
+ s390_sprintf(buf, "%M %R,%R", op, insn->variant.bfp128_unop.dst_hi,
+ insn->variant.bfp128_unop.op_hi);
+ break;
+
+ default: goto fail;
+ }
+
+ /* Write out how many bytes are involved in the operation */
+
+ {
+ UInt len, i;
+
+ for (p = buf; *p; ++p)
+ continue;
+
+ len = p - buf;
+
+ if (len < 32) {
+ for (i = len; i < 32; ++i)
+ p += vex_sprintf(p, " ");
+ } else {
+ p += vex_sprintf(p, "\t");
+ }
+ }
+
+ /* Special cases first */
+ switch (insn->tag) {
+ case S390_INSN_UNOP:
+ switch (insn->variant.unop.tag) {
+ case S390_SIGN_EXTEND_8:
+ case S390_ZERO_EXTEND_8: p += vex_sprintf(p, "1 -> "); goto common;
+ case S390_SIGN_EXTEND_16:
+ case S390_ZERO_EXTEND_16: p += vex_sprintf(p, "2 -> "); goto common;
+ case S390_SIGN_EXTEND_32:
+ case S390_ZERO_EXTEND_32: p += vex_sprintf(p, "4 -> "); goto common;
+ default:
+ goto common;
+ }
+
+ case S390_INSN_BFP_UNOP:
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_I32_TO_F32:
+ case S390_BFP_I32_TO_F64:
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_F32_TO_I32:
+ case S390_BFP_F32_TO_I64:
+ case S390_BFP_F32_TO_F64:
+ case S390_BFP_F32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common;
+ case S390_BFP_I64_TO_F32:
+ case S390_BFP_I64_TO_F64:
+ case S390_BFP_I64_TO_F128:
+ case S390_BFP_F64_TO_I32:
+ case S390_BFP_F64_TO_I64:
+ case S390_BFP_F64_TO_F32:
+ case S390_BFP_F64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common;
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: p += vex_sprintf(p, "16 -> "); goto common;
+ default:
+ goto common;
+ }
+
+ case S390_INSN_BFP128_UNOP:
+ case S390_INSN_BFP128_CONVERT_TO:
+ case S390_INSN_BFP128_CONVERT_FROM:
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_I32_TO_F128:
+ case S390_BFP_F32_TO_F128: p += vex_sprintf(p, "4 -> "); goto common;
+ case S390_BFP_I64_TO_F128:
+ case S390_BFP_F64_TO_F128: p += vex_sprintf(p, "8 -> "); goto common;
+ case S390_BFP_F128_TO_I32:
+ case S390_BFP_F128_TO_I64:
+ case S390_BFP_F128_TO_F32:
+ case S390_BFP_F128_TO_F64: p += vex_sprintf(p, "16 -> "); goto common;
+ default:
+ goto common;
+ }
+
+ default:
+ goto common;
+ }
+
+ /* Common case */
+ common:
+ vex_sprintf(p, "%u bytes", (UInt)insn->size);
+
+ return buf;
+
+ fail: vpanic("s390_insn_as_string");
+}
+
+
+
+/* Load NUM bytes from memory into register REG using addressing mode AM. */
+static UChar *
+s390_emit_load_mem(UChar *p, UInt num, UChar reg, const s390_amode *am)
+{
+ UInt b = hregNumber(am->b);
+ UInt x = hregNumber(am->x); /* 0 for B12 and B20 */
+ UInt d = am->d;
+
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ switch (num) {
+ case 1: return s390_emit_IC(p, reg, x, b, d);
+ case 2: return s390_emit_LH(p, reg, x, b, d);
+ case 4: return s390_emit_L(p, reg, x, b, d);
+ case 8: return s390_emit_LG(p, reg, x, b, DISP20(d));
+ default: goto fail;
+ }
+ break;
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ switch (num) {
+ case 1: return s390_emit_ICY(p, reg, x, b, DISP20(d));
+ case 2: return s390_emit_LHY(p, reg, x, b, DISP20(d));
+ case 4: return s390_emit_LY(p, reg, x, b, DISP20(d));
+ case 8: return s390_emit_LG(p, reg, x, b, DISP20(d));
+ default: goto fail;
+ }
+ break;
+
+ default: goto fail;
+ }
+
+ fail:
+ vpanic("s390_emit_load_mem");
+}
+
+
+/* Load condition code into register REG */
+static UChar *
+s390_emit_load_cc(UChar *p, UChar reg)
+{
+ p = s390_emit_LGHI(p, reg, 0); /* Clear out, cc not affected */
+ p = s390_emit_IPM(p, reg, reg);
+ /* Shift 28 bits to the right --> [0,1,2,3] */
+ return s390_emit_SRLG(p, reg, reg, 0, DISP20(28)); /* REG = cc */
+}
+
+
+/*---------------------------------------------------------------*/
+/*--- Code generation ---*/
+/*---------------------------------------------------------------*/
+
+/* Do not load more bytes than requested. */
+static UChar *
+s390_insn_load_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r, x, b, d;
+ const s390_amode *src;
+
+ src = insn->variant.load.src;
+
+ r = hregNumber(insn->variant.load.dst);
+
+ if (hregClass(insn->variant.load.dst) == HRcFlt64) {
+ b = hregNumber(src->b);
+ x = hregNumber(src->x); /* 0 for B12 and B20 */
+ d = src->d;
+
+ switch (insn->size) {
+
+ case 4:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_LE(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_LEY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 8:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_LD(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_LDY(buf, r, x, b, DISP20(d));
+ }
+ break;
+ }
+ vpanic("s390_insn_load_emit");
+ }
+
+ /* Integer stuff */
+ return s390_emit_load_mem(buf, insn->size, r, src);
+}
+
+
+static UChar *
+s390_insn_store_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r, x, b, d;
+ const s390_amode *dst;
+
+ dst = insn->variant.store.dst;
+
+ r = hregNumber(insn->variant.store.src);
+ b = hregNumber(dst->b);
+ x = hregNumber(dst->x); /* 0 for B12 and B20 */
+ d = dst->d;
+
+ if (hregClass(insn->variant.store.src) == HRcFlt64) {
+ switch (insn->size) {
+
+ case 4:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STE(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STEY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 8:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STD(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STDY(buf, r, x, b, DISP20(d));
+ }
+ break;
+ }
+ vpanic("s390_insn_store_emit");
+ }
+
+ /* Integer stuff */
+ switch (insn->size) {
+ case 1:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STC(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STCY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 2:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_STH(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STHY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 4:
+ switch (dst->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_ST(buf, r, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_STY(buf, r, x, b, DISP20(d));
+ }
+ break;
+
+ case 8:
+ return s390_emit_STG(buf, r, x, b, DISP20(d));
+
+ default:
+ break;
+ }
+
+ vpanic("s390_insn_store_emit");
+}
+
+
+static UChar *
+s390_insn_move_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt dst, src;
+ HRegClass dst_class, src_class;
+
+ dst = hregNumber(insn->variant.move.dst);
+ src = hregNumber(insn->variant.move.src);
+
+ dst_class = hregClass(insn->variant.move.dst);
+ src_class = hregClass(insn->variant.move.src);
+
+ if (dst_class == src_class) {
+ if (dst_class == HRcInt64)
+ return s390_emit_LGR(buf, dst, src);
+ if (dst_class == HRcFlt64)
+ return s390_emit_LDR(buf, dst, src);
+ } else {
+ if (dst_class == HRcFlt64 && src_class == HRcInt64)
+ return s390_emit_LDGR(buf, dst, src);
+ if (dst_class == HRcInt64 && src_class == HRcFlt64)
+ return s390_emit_LGDR(buf, dst, src);
+ /* A move between floating point registers and general purpose
+ registers of different size should never occur and indicates
+ an error elsewhere. */
+ }
+
+ vpanic("s390_insn_move_emit");
+}
+
+
+static UChar *
+s390_insn_load_immediate_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r;
+ ULong value = insn->variant.load_immediate.value;
+
+ r = hregNumber(insn->variant.load_immediate.dst);
+
+ if (hregClass(insn->variant.load_immediate.dst) == HRcFlt64) {
+ vassert(value == 0);
+ switch (insn->size) {
+ case 4: return s390_emit_LZER(buf, r, value);
+ case 8: return s390_emit_LZDR(buf, r, value);
+ }
+ vpanic("s390_insn_load_immediate_emit");
+ }
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load the immediate values as a 4 byte value. That does not hurt as
+ those extra bytes will not be looked at. Fall through .... */
+ case 4:
+ return s390_emit_load_32imm(buf, r, value);
+
+ case 8:
+ return s390_emit_load_64imm(buf, r, value);
+ }
+
+ vpanic("s390_insn_load_immediate_emit");
+}
+
+
+/* There is no easy way to do ALU operations on 1-byte or 2-byte operands.
+ So we simply perform a 4-byte operation. Doing so uses possibly undefined
+ bits and produces an undefined result in those extra bit positions. But
+ upstream does not look at those positions, so this is OK. */
+static UChar *
+s390_insn_alu_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UInt dst;
+
+ dst = hregNumber(insn->variant.alu.dst);
+ op2 = insn->variant.alu.op2;
+
+ /* Second operand is in a register */
+ if (op2.tag == S390_OPND_REG) {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AR(buf, dst, r2);
+ case S390_ALU_SUB: return s390_emit_SR(buf, dst, r2);
+ case S390_ALU_MUL: return s390_emit_MSR(buf, dst, r2);
+ case S390_ALU_AND: return s390_emit_NR(buf, dst, r2);
+ case S390_ALU_OR: return s390_emit_OR(buf, dst, r2);
+ case S390_ALU_XOR: return s390_emit_XR(buf, dst, r2);
+ case S390_ALU_LSH: return s390_emit_SLL(buf, dst, 0, r2, 0);
+ case S390_ALU_RSH: return s390_emit_SRL(buf, dst, 0, r2, 0);
+ case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, 0, r2, 0);
+ }
+ goto fail;
+
+ case 8:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AGR(buf, dst, r2);
+ case S390_ALU_SUB: return s390_emit_SGR(buf, dst, r2);
+ case S390_ALU_MUL: return s390_emit_MSGR(buf, dst, r2);
+ case S390_ALU_AND: return s390_emit_NGR(buf, dst, r2);
+ case S390_ALU_OR: return s390_emit_OGR(buf, dst, r2);
+ case S390_ALU_XOR: return s390_emit_XGR(buf, dst, r2);
+ case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, r2, DISP20(0));
+ case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, r2, DISP20(0));
+ case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, r2, DISP20(0));
+ }
+ goto fail;
+ }
+ goto fail;
+ }
+
+ /* 2nd operand is in memory */
+ if (op2.tag == S390_OPND_AMODE) {
+ UInt b, x, d;
+ const s390_amode *src = op2.variant.am;
+
+ b = hregNumber(src->b);
+ x = hregNumber(src->x); /* 0 for B12 and B20 */
+ d = src->d;
+
+ /* Shift operands are special here as there are no opcodes that
+ allow a memory operand. So we first load the 2nd operand to R0. */
+ if (insn->variant.alu.tag == S390_ALU_LSH ||
+ insn->variant.alu.tag == S390_ALU_RSH ||
+ insn->variant.alu.tag == S390_ALU_RSHA) {
+
+ buf = s390_emit_load_mem(buf, insn->size, R0, src);
+
+ if (insn->size == 8) {
+ if (insn->variant.alu.tag == S390_ALU_LSH)
+ return s390_emit_SLLG(buf, dst, dst, R0, DISP20(0));
+ if (insn->variant.alu.tag == S390_ALU_RSH)
+ return s390_emit_SRLG(buf, dst, dst, R0, DISP20(0));
+ if (insn->variant.alu.tag == S390_ALU_RSHA)
+ return s390_emit_SRAG(buf, dst, dst, R0, DISP20(0));
+ } else {
+ if (insn->variant.alu.tag == S390_ALU_LSH)
+ return s390_emit_SLL(buf, dst, 0, R0, 0);
+ if (insn->variant.alu.tag == S390_ALU_RSH)
+ return s390_emit_SRL(buf, dst, 0, R0, 0);
+ if (insn->variant.alu.tag == S390_ALU_RSHA)
+ return s390_emit_SRA(buf, dst, 0, R0, 0);
+ }
+ }
+
+ switch (insn->size) {
+ case 1:
+ /* Move the byte from memory into scratch register r0 */
+ buf = s390_emit_load_mem(buf, 1, R0, src);
+
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AR(buf, dst, R0);
+ case S390_ALU_SUB: return s390_emit_SR(buf, dst, R0);
+ case S390_ALU_MUL: return s390_emit_MSR(buf, dst, R0);
+ case S390_ALU_AND: return s390_emit_NR(buf, dst, R0);
+ case S390_ALU_OR: return s390_emit_OR(buf, dst, R0);
+ case S390_ALU_XOR: return s390_emit_XR(buf, dst, R0);
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+
+ case 2:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ return s390_emit_AH(buf, dst, x, b, d);
+
+ case S390_ALU_SUB:
+ return s390_emit_SH(buf, dst, x, b, d);
+
+ case S390_ALU_MUL:
+ return s390_emit_MH(buf, dst, x, b, d);
+
+ /* For bitwise operations: Move two bytes from memory into scratch
+ register r0; then perform operation */
+ case S390_ALU_AND:
+ buf = s390_emit_LH(buf, R0, x, b, d);
+ return s390_emit_NR(buf, dst, R0);
+
+ case S390_ALU_OR:
+ buf = s390_emit_LH(buf, R0, x, b, d);
+ return s390_emit_OR(buf, dst, R0);
+
+ case S390_ALU_XOR:
+ buf = s390_emit_LH(buf, R0, x, b, d);
+ return s390_emit_XR(buf, dst, R0);
+
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ return s390_emit_AHY(buf, dst, x, b, DISP20(d));
+
+ case S390_ALU_SUB:
+ return s390_emit_SHY(buf, dst, x, b, DISP20(d));
+
+ case S390_ALU_MUL:
+ return s390_emit_MHY(buf, dst, x, b, DISP20(d));
+
+ /* For bitwise operations: Move two bytes from memory into scratch
+ register r0; then perform operation */
+ case S390_ALU_AND:
+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
+ return s390_emit_NR(buf, dst, R0);
+
+ case S390_ALU_OR:
+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
+ return s390_emit_OR(buf, dst, R0);
+
+ case S390_ALU_XOR:
+ buf = s390_emit_LHY(buf, R0, x, b, DISP20(d));
+ return s390_emit_XR(buf, dst, R0);
+
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+ }
+ goto fail;
+
+ case 4:
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_A(buf, dst, x, b, d);
+ case S390_ALU_SUB: return s390_emit_S(buf, dst, x, b, d);
+ case S390_ALU_MUL: return s390_emit_MS(buf, dst, x, b, d);
+ case S390_ALU_AND: return s390_emit_N(buf, dst, x, b, d);
+ case S390_ALU_OR: return s390_emit_O(buf, dst, x, b, d);
+ case S390_ALU_XOR: return s390_emit_X(buf, dst, x, b, d);
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_SUB: return s390_emit_SY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_MUL: return s390_emit_MSY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_AND: return s390_emit_NY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_OR: return s390_emit_OY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_XOR: return s390_emit_XY(buf, dst, x, b, DISP20(d));
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+ }
+ goto fail;
+
+ case 8:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD: return s390_emit_AG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_SUB: return s390_emit_SG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_MUL: return s390_emit_MSG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_AND: return s390_emit_NG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_OR: return s390_emit_OG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_XOR: return s390_emit_XG(buf, dst, x, b, DISP20(d));
+ case S390_ALU_LSH:
+ case S390_ALU_RSH:
+ case S390_ALU_RSHA: ; /* avoid GCC warning */
+ }
+ goto fail;
+ }
+ goto fail;
+ }
+
+ /* 2nd operand is an immediate value */
+ if (op2.tag == S390_OPND_IMMEDIATE) {
+ ULong value;
+
+ /* No masking of the value is required as it is not sign extended */
+ value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* There is no 1-byte opcode. Do the computation in
+ 2 bytes. The extra byte will be ignored. */
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ return s390_emit_AHI(buf, dst, value);
+
+ case S390_ALU_SUB:
+ /* fixs390 later: as an optimization could perhaps use SLFI ? */
+ buf = s390_emit_LHI(buf, R0, value);
+ return s390_emit_SR(buf, dst, R0);
+
+ case S390_ALU_MUL:
+ return s390_emit_MHI(buf, dst, value);
+
+ case S390_ALU_AND: return s390_emit_NILL(buf, dst, value);
+ case S390_ALU_OR: return s390_emit_OILL(buf, dst, value);
+ case S390_ALU_XOR:
+ /* There is no XILL instruction. Load the immediate value into
+ R0 and combine with the destination register. */
+ buf = s390_emit_LHI(buf, R0, value);
+ return s390_emit_XR(buf, dst, R0);
+
+ case S390_ALU_LSH:
+ return s390_emit_SLL(buf, dst, 0, 0, value);
+
+ case S390_ALU_RSH:
+ return s390_emit_SRL(buf, dst, 0, 0, value);
+
+ case S390_ALU_RSHA:
+ return s390_emit_SRA(buf, dst, 0, 0, value);
+ }
+ goto fail;
+
+ case 4:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ if (uint_fits_signed_16bit(value)) {
+ return s390_emit_AHI(buf, dst, value);
+ }
+ return s390_emit_AFIw(buf, dst, value);
+
+ case S390_ALU_SUB: return s390_emit_SLFIw(buf, dst, value);
+ case S390_ALU_MUL: return s390_emit_MSFIw(buf, dst, value);
+ case S390_ALU_AND: return s390_emit_NILFw(buf, dst, value);
+ case S390_ALU_OR: return s390_emit_OILFw(buf, dst, value);
+ case S390_ALU_XOR: return s390_emit_XILFw(buf, dst, value);
+ case S390_ALU_LSH: return s390_emit_SLL(buf, dst, 0, 0, value);
+ case S390_ALU_RSH: return s390_emit_SRL(buf, dst, 0, 0, value);
+ case S390_ALU_RSHA: return s390_emit_SRA(buf, dst, 0, 0, value);
+ }
+ goto fail;
+
+ case 8:
+ switch (insn->variant.alu.tag) {
+ case S390_ALU_ADD:
+ if (ulong_fits_signed_16bit(value)) {
+ return s390_emit_AGHI(buf, dst, value);
+ }
+ if (ulong_fits_signed_32bit(value) && s390_host_has_eimm) {
+ return s390_emit_AGFI(buf, dst, value);
+ }
+ /* Load constant into R0 then add */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_AGR(buf, dst, R0);
+
+ case S390_ALU_SUB:
+ /* fixs390 later: as an optimization could perhaps use SLFI ? */
+ /* Load value into R0; then subtract from destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_SGR(buf, dst, R0);
+
+ case S390_ALU_MUL:
+ if (ulong_fits_signed_32bit(value) && s390_host_has_gie) {
+ return s390_emit_MSGFI(buf, dst, value);
+ }
+ /* Load constant into R0 then add */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_MSGR(buf, dst, R0);
+
+ /* Do it in two steps: upper half [0:31] and lower half [32:63] */
+ case S390_ALU_AND:
+ if (s390_host_has_eimm) {
+ buf = s390_emit_NIHF(buf, dst, value >> 32);
+ return s390_emit_NILF(buf, dst, value & 0xFFFFFFFF);
+ }
+ /* Load value into R0; then combine with destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_NGR(buf, dst, R0);
+
+ case S390_ALU_OR:
+ if (s390_host_has_eimm) {
+ buf = s390_emit_OIHF(buf, dst, value >> 32);
+ return s390_emit_OILF(buf, dst, value & 0xFFFFFFFF);
+ }
+ /* Load value into R0; then combine with destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_OGR(buf, dst, R0);
+
+ case S390_ALU_XOR:
+ if (s390_host_has_eimm) {
+ buf = s390_emit_XIHF(buf, dst, value >> 32);
+ return s390_emit_XILF(buf, dst, value & 0xFFFFFFFF);
+ }
+ /* Load value into R0; then combine with destination reg */
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_XGR(buf, dst, R0);
+
+ case S390_ALU_LSH: return s390_emit_SLLG(buf, dst, dst, 0, DISP20(value));
+ case S390_ALU_RSH: return s390_emit_SRLG(buf, dst, dst, 0, DISP20(value));
+ case S390_ALU_RSHA: return s390_emit_SRAG(buf, dst, dst, 0, DISP20(value));
+ }
+ goto fail;
+ }
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_alu_emit");
+}
+
+
+static UChar *
+s390_widen_emit(UChar *buf, const s390_insn *insn, UInt from_size,
+ Bool sign_extend)
+{
+ s390_opnd_RMI opnd;
+ UInt dst;
+
+ dst = hregNumber(insn->variant.unop.dst);
+ opnd = insn->variant.unop.src;
+
+ switch (opnd.tag) {
+ case S390_OPND_REG: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ UChar r2 = hregNumber(opnd.variant.reg);
+
+ switch (from_size) {
+ case 1:
+ /* Widening to a half-word is implemented like widening to a word
+ because the upper half-word will not be looked at. */
+ if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */
+ if (sign_extend)
+ return s390_emit_LBRw(buf, r1, r2);
+ else
+ return s390_emit_LLCRw(buf, r1, r2);
+ }
+ if (insn->size == 8) { /* 8 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGBRw(buf, r1, r2);
+ else
+ return s390_emit_LLGCRw(buf, r1, r2);
+ }
+ goto fail;
+
+ case 2:
+ if (insn->size == 4) { /* 16 --> 32 */
+ if (sign_extend)
+ return s390_emit_LHRw(buf, r1, r2);
+ else
+ return s390_emit_LLHRw(buf, r1, r2);
+ }
+ if (insn->size == 8) { /* 16 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGHRw(buf, r1, r2);
+ else
+ return s390_emit_LLGHRw(buf, r1, r2);
+ }
+ goto fail;
+
+ case 4:
+ if (insn->size == 8) { /* 32 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGFR(buf, r1, r2);
+ else
+ return s390_emit_LLGFR(buf, r1, r2);
+ }
+ goto fail;
+
+ default: /* unexpected "from" size */
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ const s390_amode *src = opnd.variant.am;
+ UChar b = hregNumber(src->b);
+ UChar x = hregNumber(src->x);
+ Int d = src->d;
+
+ switch (from_size) {
+ case 1:
+ if (insn->size == 4 || insn->size == 2) {
+ if (sign_extend)
+ return s390_emit_LB(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_LLCw(buf, r1, x, b, DISP20(d));
+ }
+ if (insn->size == 8) {
+ if (sign_extend)
+ return s390_emit_LGB(buf, r1, x, b, DISP20(d));
+ else
+ /* No wrapper required. Opcode exists as RXE and RXY */
+ return s390_emit_LLGC(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 2:
+ if (insn->size == 4) { /* 16 --> 32 */
+ if (sign_extend == 0)
+ return s390_emit_LLHw(buf, r1, x, b, DISP20(d));
+
+ switch (src->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ return s390_emit_LH(buf, r1, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ return s390_emit_LHY(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+ }
+ if (insn->size == 8) { /* 16 --> 64 */
+ /* No wrappers required. Opcodes exist as RXE and RXY */
+ if (sign_extend)
+ return s390_emit_LGH(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_LLGH(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 4:
+ if (insn->size == 8) { /* 32 --> 64 */
+ /* No wrappers required. Opcodes exist as RXE and RXY */
+ if (sign_extend)
+ return s390_emit_LGF(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_LLGF(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ default: /* unexpected "from" size */
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ ULong value = opnd.variant.imm;
+
+ switch (from_size) {
+ case 1:
+ if (insn->size == 4 || insn->size == 2) { /* 8 --> 32 8 --> 16 */
+ if (sign_extend) {
+ /* host can do the sign extension to 16-bit; LHI does the rest */
+ return s390_emit_LHI(buf, r1, (Short)(Char)(UChar)value);
+ } else {
+ return s390_emit_LHI(buf, r1, value);
+ }
+ }
+ if (insn->size == 8) { /* 8 --> 64 */
+ if (sign_extend) {
+ /* host can do the sign extension to 16-bit; LGHI does the rest */
+ return s390_emit_LGHI(buf, r1, (Short)(Char)(UChar)value);
+ } else {
+ return s390_emit_LGHI(buf, r1, value);
+ }
+ }
+ goto fail;
+
+ case 2:
+ if (insn->size == 4) { /* 16 --> 32 */
+ return s390_emit_LHI(buf, r1, value);
+ }
+ if (insn->size == 8) { /* 16 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGHI(buf, r1, value);
+ else
+ return s390_emit_LLILL(buf, r1, value);
+ }
+ goto fail;
+
+ case 4:
+ if (insn->size == 8) { /* 32 --> 64 */
+ if (sign_extend)
+ return s390_emit_LGFIw(buf, r1, value);
+ else
+ return s390_emit_LLILFw(buf, r1, value);
+ }
+ goto fail;
+
+ default: /* unexpected "from" size */
+ goto fail;
+ }
+ }
+ }
+
+ fail:
+ vpanic("s390_widen_emit");
+}
+
+
+static UChar *
+s390_negate_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI opnd;
+
+ opnd = insn->variant.unop.src;
+
+ switch (opnd.tag) {
+ case S390_OPND_REG: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ UChar r2 = hregNumber(opnd.variant.reg);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ return s390_emit_LCR(buf, r1, r2);
+
+ case 8:
+ return s390_emit_LCGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+
+ /* Load bytes into scratch register R0, then negate */
+ buf = s390_emit_load_mem(buf, insn->size, R0, opnd.variant.am);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ return s390_emit_LCR(buf, r1, R0);
+
+ case 8:
+ return s390_emit_LCGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ UChar r1 = hregNumber(insn->variant.unop.dst);
+ ULong value = opnd.variant.imm;
+
+ value = ~value + 1; /* two's complement */
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load the immediate values as a 4 byte value. That does not hurt as
+ those extra bytes will not be looked at. Fall through .... */
+ case 4:
+ return s390_emit_load_32imm(buf, r1, value);
+
+ case 8:
+ return s390_emit_load_64imm(buf, r1, value);
+
+ default:
+ goto fail;
+ }
+ }
+ }
+
+ fail:
+ vpanic("s390_negate_emit");
+}
+
+
+static UChar *
+s390_insn_unop_emit(UChar *buf, const s390_insn *insn)
+{
+ switch (insn->variant.unop.tag) {
+ case S390_ZERO_EXTEND_8: return s390_widen_emit(buf, insn, 1, 0);
+ case S390_ZERO_EXTEND_16: return s390_widen_emit(buf, insn, 2, 0);
+ case S390_ZERO_EXTEND_32: return s390_widen_emit(buf, insn, 4, 0);
+
+ case S390_SIGN_EXTEND_8: return s390_widen_emit(buf, insn, 1, 1);
+ case S390_SIGN_EXTEND_16: return s390_widen_emit(buf, insn, 2, 1);
+ case S390_SIGN_EXTEND_32: return s390_widen_emit(buf, insn, 4, 1);
+
+ case S390_NEGATE: return s390_negate_emit(buf, insn);
+ }
+
+ vpanic("s390_insn_unop_emit");
+}
+
+
+/* Only 4-byte and 8-byte operands are handled. 1-byte and 2-byte
+ comparisons will have been converted to 4-byte comparisons in
+ s390_isel_cc and should not occur here. */
+static UChar *
+s390_insn_test_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI opnd;
+
+ opnd = insn->variant.test.src;
+
+ switch (opnd.tag) {
+ case S390_OPND_REG: {
+ UInt reg = hregNumber(opnd.variant.reg);
+
+ switch (insn->size) {
+ case 4:
+ return s390_emit_LTR(buf, reg, reg);
+
+ case 8:
+ return s390_emit_LTGR(buf, reg, reg);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = opnd.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ return s390_emit_LTw(buf, R0, x, b, DISP20(d));
+
+ case 8:
+ return s390_emit_LTGw(buf, R0, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = opnd.variant.imm;
+
+ switch (insn->size) {
+ case 4:
+ buf = s390_emit_load_32imm(buf, R0, value);
+ return s390_emit_LTR(buf, R0, R0);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_LTGR(buf, R0, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_test_emit");
+}
+
+
+static UChar *
+s390_insn_cc2bool_emit(UChar *buf, const s390_insn *insn)
+{
+ UChar r1 = hregNumber(insn->variant.cc2bool.dst);
+ s390_cc_t cond = insn->variant.cc2bool.cond;
+
+ /* Make the destination register be 1 or 0, depending on whether
+ the relevant condition holds. A 64-bit value is computed. */
+ if (cond == S390_CC_ALWAYS)
+ return s390_emit_LGHI(buf, r1, 1); /* r1 = 1 */
+
+ buf = s390_emit_load_cc(buf, r1); /* r1 = cc */
+ buf = s390_emit_LGHI(buf, R0, cond); /* r0 = mask */
+ buf = s390_emit_SLLG(buf, r1, R0, r1, DISP20(0)); /* r1 = mask << cc */
+ buf = s390_emit_SRLG(buf, r1, r1, 0, DISP20(3)); /* r1 = r1 >> 3 */
+ buf = s390_emit_NILL(buf, r1, 1); /* r1 = r1 & 0x1 */
+
+ return buf;
+}
+
+
+/* Only 4-byte and 8-byte operands are handled. */
+static UChar *
+s390_insn_cas_emit(UChar *buf, const s390_insn *insn)
+{
+ UChar r1, r3, b, old;
+ Int d;
+ s390_amode *am;
+
+ r1 = hregNumber(insn->variant.cas.op1); /* expected value */
+ r3 = hregNumber(insn->variant.cas.op3);
+ old= hregNumber(insn->variant.cas.old_mem);
+ am = insn->variant.cas.op2;
+ b = hregNumber(am->b);
+ d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ /* r1 must no be overwritten. So copy it to R0 and let CS clobber it */
+ buf = s390_emit_LR(buf, R0, r1);
+ if (am->tag == S390_AMODE_B12)
+ buf = s390_emit_CS(buf, R0, r3, b, d);
+ else
+ buf = s390_emit_CSY(buf, R0, r3, b, DISP20(d));
+ /* Now copy R0 which has the old memory value to OLD */
+ return s390_emit_LR(buf, old, R0);
+
+ case 8:
+ /* r1 must no be overwritten. So copy it to R0 and let CS clobber it */
+ buf = s390_emit_LGR(buf, R0, r1);
+ buf = s390_emit_CSG(buf, R0, r3, b, DISP20(d));
+ /* Now copy R0 which has the old memory value to OLD */
+ return s390_emit_LGR(buf, old, R0);
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_cas_emit");
+}
+
+
+/* Only 4-byte and 8-byte comparisons are handled. 1-byte and 2-byte
+ comparisons will have been converted to 4-byte comparisons in
+ s390_isel_cc and should not occur here. */
+static UChar *
+s390_insn_compare_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ HReg op1;
+ Bool signed_comparison;
+
+ op1 = insn->variant.compare.src1;
+ op2 = insn->variant.compare.src2;
+ signed_comparison = insn->variant.compare.signed_comparison;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r1 = hregNumber(op1);
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 4:
+ if (signed_comparison)
+ return s390_emit_CR(buf, r1, r2);
+ else
+ return s390_emit_CLR(buf, r1, r2);
+
+ case 8:
+ if (signed_comparison)
+ return s390_emit_CGR(buf, r1, r2);
+ else
+ return s390_emit_CLGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ UChar r1 = hregNumber(op1);
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ if (signed_comparison)
+ return s390_emit_C(buf, r1, x, b, d);
+ else
+ return s390_emit_CL(buf, r1, x, b, d);
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ if (signed_comparison)
+ return s390_emit_CY(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_CLY(buf, r1, x, b, DISP20(d));
+ }
+ goto fail;
+
+ case 8:
+ if (signed_comparison)
+ return s390_emit_CG(buf, r1, x, b, DISP20(d));
+ else
+ return s390_emit_CLG(buf, r1, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ UChar r1 = hregNumber(op1);
+ ULong value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 4:
+ if (signed_comparison)
+ return s390_emit_CFIw(buf, r1, value);
+ else
+ return s390_emit_CLFIw(buf, r1, value);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ if (signed_comparison)
+ return s390_emit_CGR(buf, r1, R0);
+ else
+ return s390_emit_CLGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_compare_emit");
+}
+
+
+static UChar *
+s390_insn_mul_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UChar r1;
+ Bool signed_multiply;
+
+ /* The register number identifying the register pair */
+ r1 = hregNumber(insn->variant.mul.dst_hi);
+
+ op2 = insn->variant.mul.op2;
+ signed_multiply = insn->variant.mul.signed_multiply;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ if (signed_multiply)
+ return s390_emit_MR(buf, r1, r2);
+ else
+ return s390_emit_MLR(buf, r1, r2);
+
+ case 8:
+ if (signed_multiply)
+ vpanic("s390_insn_mul_emit");
+ else
+ return s390_emit_MLGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load bytes into scratch register R0, then multiply */
+ buf = s390_emit_load_mem(buf, insn->size, R0, am);
+ if (signed_multiply)
+ return s390_emit_MR(buf, r1, R0);
+ else
+ return s390_emit_MLR(buf, r1, R0);
+
+ case 4:
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ if (signed_multiply)
+ return s390_emit_M(buf, r1, x, b, d);
+ else
+ return s390_emit_ML(buf, r1, x, b, DISP20(d));
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ if (signed_multiply)
+ return s390_emit_MFYw(buf, r1, x, b, DISP20(d));
+ else
+ vpanic("s390_insn_mul_emit");
+ }
+ goto fail;
+
+ case 8:
+ if (signed_multiply)
+ vpanic("s390_insn_mul_emit");
+ else
+ return s390_emit_MLG(buf, r1, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ case 4:
+ buf = s390_emit_load_32imm(buf, R0, value);
+ if (signed_multiply)
+ return s390_emit_MR(buf, r1, R0);
+ else
+ return s390_emit_MLR(buf, r1, R0);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ if (signed_multiply)
+ vpanic("s390_insn_mul_emit");
+ else
+ return s390_emit_MLGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_mul_emit");
+}
+
+
+static UChar *
+s390_insn_div_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UChar r1;
+ Bool signed_divide;
+
+ r1 = hregNumber(insn->variant.div.op1_hi);
+ op2 = insn->variant.div.op2;
+ signed_divide = insn->variant.div.signed_divide;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ switch (insn->size) {
+ case 4:
+ if (signed_divide)
+ return s390_emit_DR(buf, r1, r2);
+ else
+ return s390_emit_DLR(buf, r1, r2);
+
+ case 8:
+ if (signed_divide)
+ vpanic("s390_insn_div_emit");
+ else
+ return s390_emit_DLGR(buf, r1, r2);
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ switch (insn->size) {
+ case 4:
+ switch (am->tag) {
+ case S390_AMODE_B12:
+ case S390_AMODE_BX12:
+ if (signed_divide)
+ return s390_emit_D(buf, r1, x, b, d);
+ else
+ return s390_emit_DL(buf, r1, x, b, DISP20(d));
+
+ case S390_AMODE_B20:
+ case S390_AMODE_BX20:
+ buf = s390_emit_LY(buf, R0, x, b, DISP20(d));
+ if (signed_divide)
+ return s390_emit_DR(buf, r1, R0);
+ else
+ return s390_emit_DLR(buf, r1, R0);
+ }
+ goto fail;
+
+ case 8:
+ if (signed_divide)
+ vpanic("s390_insn_div_emit");
+ else
+ return s390_emit_DLG(buf, r1, x, b, DISP20(d));
+
+ default:
+ goto fail;
+ }
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = op2.variant.imm;
+
+ switch (insn->size) {
+ case 4:
+ buf = s390_emit_load_32imm(buf, R0, value);
+ if (signed_divide)
+ return s390_emit_DR(buf, r1, R0);
+ else
+ return s390_emit_DLR(buf, r1, R0);
+
+ case 8:
+ buf = s390_emit_load_64imm(buf, R0, value);
+ if (signed_divide)
+ vpanic("s390_insn_div_emit");
+ else
+ return s390_emit_DLGR(buf, r1, R0);
+
+ default:
+ goto fail;
+ }
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_div_emit");
+}
+
+
+static UChar *
+s390_insn_divs_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI op2;
+ UChar r1;
+
+ r1 = hregNumber(insn->variant.divs.rem);
+ op2 = insn->variant.divs.op2;
+
+ switch (op2.tag) {
+ case S390_OPND_REG: {
+ UInt r2 = hregNumber(op2.variant.reg);
+
+ return s390_emit_DSGR(buf, r1, r2);
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = op2.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ return s390_emit_DSG(buf, r1, x, b, DISP20(d));
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = op2.variant.imm;
+
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_DSGR(buf, r1, R0);
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_divs_emit");
+}
+
+
+static UChar *
+s390_insn_flogr_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI src;
+ UChar r1, r1p1;
+
+ r1 = hregNumber(insn->variant.flogr.bitpos);
+ r1p1 = hregNumber(insn->variant.flogr.modval);
+
+ vassert((r1 & 0x1) == 0);
+ vassert(r1p1 == r1 + 1);
+
+ src = insn->variant.flogr.src;
+
+ switch (src.tag) {
+ case S390_OPND_REG: {
+ UInt r2 = hregNumber(src.variant.reg);
+
+ return s390_emit_FLOGR(buf, r1, r2);
+ }
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = src.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ buf = s390_emit_LG(buf, R0, x, b, DISP20(d));
+ return s390_emit_FLOGR(buf, r1, R0);
+ }
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = src.variant.imm;
+
+ buf = s390_emit_load_64imm(buf, R0, value);
+ return s390_emit_FLOGR(buf, r1, R0);
+ }
+
+ default:
+ goto fail;
+ }
+
+ fail:
+ vpanic("s390_insn_flogr_emit");
+}
+
+
+static UChar *
+s390_insn_branch_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_opnd_RMI dst;
+ s390_cc_t cond;
+ IRJumpKind kind;
+ UInt trc;
+ UChar *p, *ptmp = 0; /* avoid compiler warnings */
+
+ kind = insn->variant.branch.kind;
+ cond = insn->variant.branch.cond;
+ dst = insn->variant.branch.dst;
+
+ p = buf;
+ trc = 0;
+
+ if (cond != S390_CC_ALWAYS) {
+ /* So we have something like this
+ if (cond) goto X;
+ Y: ...
+ We convert this into
+ if (! cond) goto Y; // BRC insn; 4 bytes
+ return_reg = X;
+ return to dispatcher
+ Y:
+ */
+ ptmp = p; /* 4 bytes (a BRC insn) to be filled in here */
+ p += 4;
+ }
+
+ /* If a non-boring, set guest-state-pointer appropriately. */
+
+ switch (insn->variant.branch.kind) {
+ case Ijk_ClientReq: trc = VEX_TRC_JMP_CLIENTREQ; break;
+ case Ijk_Sys_syscall: trc = VEX_TRC_JMP_SYS_SYSCALL; break;
+ case Ijk_Yield: trc = VEX_TRC_JMP_YIELD; break;
+ case Ijk_EmWarn: trc = VEX_TRC_JMP_EMWARN; break;
+ case Ijk_EmFail: trc = VEX_TRC_JMP_EMFAIL; break;
+ case Ijk_MapFail: trc = VEX_TRC_JMP_MAPFAIL; break;
+ case Ijk_NoDecode: trc = VEX_TRC_JMP_NODECODE; break;
+ case Ijk_TInval: trc = VEX_TRC_JMP_TINVAL; break;
+ case Ijk_NoRedir: trc = VEX_TRC_JMP_NOREDIR; break;
+ case Ijk_SigTRAP: trc = VEX_TRC_JMP_SIGTRAP; break;
+ case Ijk_Ret: trc = 0; break;
+ case Ijk_Call: trc = 0; break;
+ case Ijk_Boring: trc = 0; break;
+ break;
+
+ default:
+ vpanic("s390_insn_branch_emit: unknown jump kind");
+ }
+
+ /* Get the destination address into the return register */
+ switch (dst.tag) {
+ case S390_OPND_REG:
+ p = s390_emit_LGR(p, S390_REGNO_RETURN_VALUE, hregNumber(dst.variant.reg));
+ break;
+
+ case S390_OPND_AMODE: {
+ const s390_amode *am = dst.variant.am;
+ UChar b = hregNumber(am->b);
+ UChar x = hregNumber(am->x);
+ Int d = am->d;
+
+ p = s390_emit_LG(p, S390_REGNO_RETURN_VALUE, x, b, DISP20(d));
+ break;
+ }
+
+ case S390_OPND_IMMEDIATE:
+ p = s390_emit_load_64imm(p, S390_REGNO_RETURN_VALUE, dst.variant.imm);
+ break;
+
+ default:
+ goto fail;
+ }
+
+ if (trc != 0) {
+ /* Something special. Set guest-state pointer appropriately */
+ p = s390_emit_LGHI(p, S390_REGNO_GUEST_STATE_POINTER, trc);
+ } else {
+ /* Nothing special needs to be done for calls and returns. */
+ }
+
+ p = s390_emit_BCR(p, S390_CC_ALWAYS, S390_REGNO_LINK_REGISTER);
+
+ if (cond != S390_CC_ALWAYS) {
+ Int delta = p - ptmp;
+
+ delta >>= 1; /* immediate constant is #half-words */
+ vassert(delta > 0 && delta < (1 << 16));
+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
+ }
+
+ return p;
+
+ fail:
+ vpanic("s390_insn_branch_emit");
+}
+
+
+static UChar *
+s390_insn_helper_call_emit(UChar *buf, const s390_insn *insn)
+{
+ s390_cc_t cond;
+ ULong target;
+ UChar *ptmp = buf;
+
+ cond = insn->variant.helper_call.cond;
+ target = insn->variant.helper_call.target;
+
+ if (cond != S390_CC_ALWAYS) {
+ /* So we have something like this
+ if (cond) call X;
+ Y: ...
+ We convert this into
+ if (! cond) goto Y; // BRC opcode; 4 bytes
+ call X;
+ Y:
+ */
+ /* 4 bytes (a BRC insn) to be filled in here */
+ buf += 4;
+ }
+
+ /* Load the target address into a register, that
+ (a) is not used for passing parameters to the helper and
+ (b) can be clobbered by the callee
+ r1 looks like a good choice.
+ Also, need to arrange for the return address be put into the
+ link-register */
+ buf = s390_emit_load_64imm(buf, 1, target);
+
+ /* Stash away the client's FPC register because the helper might change it. */
+ buf = s390_emit_STFPC(buf, S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_FPC_C);
+
+ /* Before we can call the helper, we need to save the link register,
+ because the BASR will overwrite it. We cannot use a register for that.
+ (a) Volatile registers will be modified by the helper.
+ (b) For saved registers the client code assumes that they have not
+ changed after the function returns. So we cannot use it to store
+ the link register.
+ In the dispatcher, before calling the client code, we have arranged for
+ a location on the stack for this purpose. See dispatch-s390x-linux.S. */
+ buf = s390_emit_STG(buf, S390_REGNO_LINK_REGISTER, 0, // save LR
+ S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_LR, 0);
+ buf = s390_emit_BASR(buf, S390_REGNO_LINK_REGISTER, 1); // call helper
+ buf = s390_emit_LG(buf, S390_REGNO_LINK_REGISTER, 0, // restore LR
+ S390_REGNO_STACK_POINTER, S390_OFFSET_SAVED_LR, 0);
+ buf = s390_emit_LFPC(buf, S390_REGNO_STACK_POINTER, // restore FPC
+ S390_OFFSET_SAVED_FPC_C);
+
+ if (cond != S390_CC_ALWAYS) {
+ Int delta = buf - ptmp;
+
+ delta >>= 1; /* immediate constant is #half-words */
+ vassert(delta > 0 && delta < (1 << 16));
+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
+ }
+
+ return buf;
+}
+
+
+static UChar *
+s390_insn_cond_move_emit(UChar *buf, const s390_insn *insn)
+{
+ HReg dst;
+ s390_opnd_RMI src;
+ s390_cc_t cond;
+ UChar *p, *ptmp = 0; /* avoid compiler warnings */
+
+ cond = insn->variant.cond_move.cond;
+ dst = insn->variant.cond_move.dst;
+ src = insn->variant.cond_move.src;
+
+ p = buf;
+
+ /* Branch (if cond fails) over move instrs */
+ if (cond != S390_CC_ALWAYS) {
+ /* Don't know how many bytes to jump over yet.
+ Make space for a BRC instruction (4 bytes) and fill in later. */
+ ptmp = p; /* to be filled in here */
+ p += 4;
+ }
+
+ // cond true: move src => dst
+
+ switch (src.tag) {
+ case S390_OPND_REG:
+ p = s390_emit_LGR(p, hregNumber(dst), hregNumber(src.variant.reg));
+ break;
+
+ case S390_OPND_AMODE:
+ p = s390_emit_load_mem(p, insn->size, hregNumber(dst), src.variant.am);
+ break;
+
+ case S390_OPND_IMMEDIATE: {
+ ULong value = src.variant.imm;
+ UInt r = hregNumber(dst);
+
+ switch (insn->size) {
+ case 1:
+ case 2:
+ /* Load the immediate values as a 4 byte value. That does not hurt as
+ those extra bytes will not be looked at. Fall through .... */
+ case 4:
+ p = s390_emit_load_32imm(p, r, value);
+ break;
+
+ case 8:
+ p = s390_emit_load_64imm(p, r, value);
+ break;
+ }
+ break;
+ }
+
+ default:
+ goto fail;
+ }
+
+ if (cond != S390_CC_ALWAYS) {
+ Int delta = p - ptmp;
+
+ delta >>= 1; /* immediate constant is #half-words */
+ vassert(delta > 0 && delta < (1 << 16));
+ s390_emit_BRC(ptmp, s390_cc_invert(cond), delta);
+ }
+
+ return p;
+
+ fail:
+ vpanic("s390_insn_cond_move_emit");
+}
+
+
+/* Little helper function to the rounding mode in the real FPC
+ register */
+static UChar *
+s390_set_fpc_rounding_mode(UChar *buf, s390_round_t rounding_mode)
+{
+ UChar bits;
+
+ /* Determine BFP rounding bits */
+ switch (rounding_mode) {
+ case S390_ROUND_NEAREST_EVEN: bits = 0; break;
+ case S390_ROUND_ZERO: bits = 1; break;
+ case S390_ROUND_POSINF: bits = 2; break;
+ case S390_ROUND_NEGINF: bits = 3; break;
+ default: vpanic("invalid rounding mode\n");
+ }
+
+ /* Copy FPC from guest state to R0 and OR in the new rounding mode */
+ buf = s390_emit_L(buf, R0, 0, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // r0 = guest_fpc
+
+ buf = s390_emit_NILL(buf, R0, 0xFFFC); /* Clear out right-most 2 bits */
+ buf = s390_emit_OILL(buf, R0, bits); /* OR in the new rounding mode */
+ buf = s390_emit_SFPC(buf, R0, 0); /* Load FPC register from R0 */
+
+ return buf;
+}
+
+
+static UChar *
+s390_insn_bfp_triop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp_triop.dst);
+ UInt r2 = hregNumber(insn->variant.bfp_triop.op2);
+ UInt r3 = hregNumber(insn->variant.bfp_triop.op3);
+ s390_round_t rounding_mode = insn->variant.bfp_triop.rounding_mode;
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->size) {
+ case 4:
+ switch (insn->variant.bfp_triop.tag) {
+ case S390_BFP_MADD: buf = s390_emit_MAEBR(buf, r1, r3, r2); break;
+ case S390_BFP_MSUB: buf = s390_emit_MSEBR(buf, r1, r3, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case 8:
+ switch (insn->variant.bfp_triop.tag) {
+ case S390_BFP_MADD: buf = s390_emit_MADBR(buf, r1, r3, r2); break;
+ case S390_BFP_MSUB: buf = s390_emit_MSDBR(buf, r1, r3, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp_triop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp_binop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp_binop.dst);
+ UInt r2 = hregNumber(insn->variant.bfp_binop.op2);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->size) {
+ case 4:
+ switch (insn->variant.bfp_binop.tag) {
+ case S390_BFP_ADD: buf = s390_emit_AEBR(buf, r1, r2); break;
+ case S390_BFP_SUB: buf = s390_emit_SEBR(buf, r1, r2); break;
+ case S390_BFP_MUL: buf = s390_emit_MEEBR(buf, r1, r2); break;
+ case S390_BFP_DIV: buf = s390_emit_DEBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case 8:
+ switch (insn->variant.bfp_binop.tag) {
+ case S390_BFP_ADD: buf = s390_emit_ADBR(buf, r1, r2); break;
+ case S390_BFP_SUB: buf = s390_emit_SDBR(buf, r1, r2); break;
+ case S390_BFP_MUL: buf = s390_emit_MDBR(buf, r1, r2); break;
+ case S390_BFP_DIV: buf = s390_emit_DDBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc);
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp_binop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp_unop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp_unop.dst);
+ UInt r2 = hregNumber(insn->variant.bfp_unop.op);
+ s390_round_t rounding_mode = insn->variant.bfp_unop.rounding_mode;
+ s390_round_t m3 = rounding_mode;
+
+ /* The "convert to fixed" instructions have a field for the rounding
+ mode and no FPC modification is necessary. So we handle them
+ upfront. */
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_F32_TO_I32: return s390_emit_CFEBR(buf, m3, r1, r2);
+ case S390_BFP_F64_TO_I32: return s390_emit_CFDBR(buf, m3, r1, r2);
+ case S390_BFP_F32_TO_I64: return s390_emit_CGEBR(buf, m3, r1, r2);
+ case S390_BFP_F64_TO_I64: return s390_emit_CGDBR(buf, m3, r1, r2);
+ default: break;
+ }
+
+ /* For all other insns if a special rounding mode is requested,
+ we need to set the FPC first and restore it later. */
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_ABS:
+ switch (insn->size) {
+ case 4: buf = s390_emit_LPEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_LPDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_LPXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_NABS:
+ switch (insn->size) {
+ case 4: buf = s390_emit_LNEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_LNDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_LNXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_NEG:
+ switch (insn->size) {
+ case 4: buf = s390_emit_LCEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_LCDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_LCXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_SQRT:
+ switch (insn->size) {
+ case 4: buf = s390_emit_SQEBR(buf, r1, r2); break;
+ case 8: buf = s390_emit_SQDBR(buf, r1, r2); break;
+ case 16: buf = s390_emit_SQXBR(buf, r1, r2); break;
+ default: goto fail;
+ }
+ break;
+
+ case S390_BFP_I32_TO_F32: buf = s390_emit_CEFBR(buf, r1, r2); break;
+ case S390_BFP_I32_TO_F64: buf = s390_emit_CDFBR(buf, r1, r2); break;
+ case S390_BFP_I32_TO_F128: buf = s390_emit_CXFBR(buf, r1, r2); break;
+ case S390_BFP_I64_TO_F32: buf = s390_emit_CEGBR(buf, r1, r2); break;
+ case S390_BFP_I64_TO_F64: buf = s390_emit_CDGBR(buf, r1, r2); break;
+ case S390_BFP_I64_TO_F128: buf = s390_emit_CXGBR(buf, r1, r2); break;
+
+ case S390_BFP_F32_TO_F64: buf = s390_emit_LDEBR(buf, r1, r2); break;
+ case S390_BFP_F32_TO_F128: buf = s390_emit_LXEBR(buf, r1, r2); break;
+ case S390_BFP_F64_TO_F32: buf = s390_emit_LEDBR(buf, r1, r2); break;
+ case S390_BFP_F64_TO_F128: buf = s390_emit_LXDBR(buf, r1, r2); break;
+
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp_unop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp_compare_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt dst = hregNumber(insn->variant.bfp_compare.dst);
+ UInt r1 = hregNumber(insn->variant.bfp_compare.op1);
+ UInt r2 = hregNumber(insn->variant.bfp_compare.op2);
+
+ switch (insn->size) {
+ case 4:
+ buf = s390_emit_CEBR(buf, r1, r2);
+ break;
+
+ case 8:
+ buf = s390_emit_CDBR(buf, r1, r2);
+ break;
+
+ default: goto fail;
+ }
+
+ return s390_emit_load_cc(buf, dst); /* Load condition code into DST */
+
+ fail:
+ vpanic("s390_insn_bfp_compare_emit");
+}
+
+
+static UChar *
+s390_insn_bfp128_binop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1_hi = hregNumber(insn->variant.bfp128_binop.dst_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_binop.dst_lo);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_binop.op2_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_binop.op2_lo);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+ vassert((r2_hi & 0x2) == 0);
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->variant.bfp128_binop.tag) {
+ case S390_BFP_ADD: buf = s390_emit_AXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_SUB: buf = s390_emit_SXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_MUL: buf = s390_emit_MXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_DIV: buf = s390_emit_DXBR(buf, r1_hi, r2_hi); break;
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp128_binop_emit");
+}
+
+
+static UChar *
+s390_insn_bfp128_compare_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt dst = hregNumber(insn->variant.bfp128_compare.dst);
+ UInt r1_hi = hregNumber(insn->variant.bfp128_compare.op1_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_compare.op1_lo);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_compare.op2_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_compare.op2_lo);
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+ vassert((r2_hi & 0x2) == 0);
+
+ buf = s390_emit_CXBR(buf, r1_hi, r2_hi);
+
+ /* Load condition code into DST */
+ return s390_emit_load_cc(buf, dst);
+}
+
+
+static UChar *
+s390_insn_bfp128_unop_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1_hi = hregNumber(insn->variant.bfp128_unop.dst_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_unop.dst_lo);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_unop.op_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_unop.op_lo);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+ vassert((r2_hi & 0x2) == 0);
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ buf = s390_set_fpc_rounding_mode(buf, rounding_mode);
+ }
+
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_ABS: buf = s390_emit_LPXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_NABS: buf = s390_emit_LNXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_NEG: buf = s390_emit_LCXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_SQRT: buf = s390_emit_SQXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_F128_TO_F32: buf = s390_emit_LEXBR(buf, r1_hi, r2_hi); break;
+ case S390_BFP_F128_TO_F64: buf = s390_emit_LDXBR(buf, r1_hi, r2_hi); break;
+ default: goto fail;
+ }
+
+ if (rounding_mode != S390_ROUND_NEAREST_EVEN) {
+ /* Restore FPC register from guest state */
+ buf = s390_emit_LFPC(buf, S390_REGNO_GUEST_STATE_POINTER,
+ OFFSET_s390x_fpc); // fpc = guest_fpc
+ }
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp128_unop_emit");
+}
+
+
+/* Conversion to 128-bit BFP does not require a rounding mode */
+static UChar *
+s390_insn_bfp128_convert_to_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1_hi = hregNumber(insn->variant.bfp128_unop.dst_hi);
+ UInt r1_lo = hregNumber(insn->variant.bfp128_unop.dst_lo);
+ UInt r2 = hregNumber(insn->variant.bfp128_unop.op_hi);
+
+ /* Paranoia */
+ vassert(insn->size == 16);
+ vassert(r1_lo == r1_hi + 2);
+ vassert((r1_hi & 0x2) == 0);
+
+ switch (insn->variant.bfp128_unop.tag) {
+ case S390_BFP_I32_TO_F128: buf = s390_emit_CXFBR(buf, r1_hi, r2); break;
+ case S390_BFP_I64_TO_F128: buf = s390_emit_CXGBR(buf, r1_hi, r2); break;
+ case S390_BFP_F32_TO_F128: buf = s390_emit_LXEBR(buf, r1_hi, r2); break;
+ case S390_BFP_F64_TO_F128: buf = s390_emit_LXDBR(buf, r1_hi, r2); break;
+ default: goto fail;
+ }
+
+ return buf;
+
+ fail:
+ vpanic("s390_insn_bfp128_convert_to_emit");
+}
+
+
+static UChar *
+s390_insn_bfp128_convert_from_emit(UChar *buf, const s390_insn *insn)
+{
+ UInt r1 = hregNumber(insn->variant.bfp128_unop.dst_hi);
+ UInt r2_hi = hregNumber(insn->variant.bfp128_unop.op_hi);
+ UInt r2_lo = hregNumber(insn->variant.bfp128_unop.op_lo);
+ s390_round_t rounding_mode = insn->variant.bfp_binop.rounding_mode;
+
+ /* Paranoia */
+ vassert(insn->size != 16);
+ vassert(r2_lo == r2_hi + 2);
+ vassert((r2_hi & 0x2) == 0);
+
+ /* The "convert to fixed" instructions have a field for the rounding
+ mode and no FPC modification is necessary. So we handle them
+ upfront. */
+ switch (insn->variant.bfp_unop.tag) {
+ case S390_BFP_F128_TO_I32: return s390_emit_CFXBR(buf, rounding_mode,
+ r1, r2_hi); break;
+ case S390_BFP_F128_TO_I64: return s390_emit_CGXBR(buf, rounding_mode,
+ r1, r2_hi); break;
+ default: break;
+ }
+
+ vpanic("s390_insn_bfp128_convert_from_emit");
+}
+
+
+Int
+emit_S390Instr(UChar *buf, Int nbuf, struct s390_insn *insn,
+ Bool mode64, void *dispatch)
+{
+ UChar *end;
+
+ switch (insn->tag) {
+ case S390_INSN_LOAD:
+ end = s390_insn_load_emit(buf, insn);
+ break;
+
+ case S390_INSN_STORE:
+ end = s390_insn_store_emit(buf, insn);
+ break;
+
+ case S390_INSN_MOVE:
+ end = s390_insn_move_emit(buf, insn);
+ break;
+
+ case S390_INSN_COND_MOVE:
+ end = s390_insn_cond_move_emit(buf, insn);
+ break;
+
+ case S390_INSN_LOAD_IMMEDIATE:
+ end = s390_insn_load_immediate_emit(buf, insn);
+ break;
+
+ case S390_INSN_ALU:
+ end = s390_insn_alu_emit(buf, insn);
+ break;
+
+ case S390_INSN_MUL:
+ end = s390_insn_mul_emit(buf, insn);
+ break;
+
+ case S390_INSN_DIV:
+ end = s390_insn_div_emit(buf, insn);
+ break;
+
+ case S390_INSN_DIVS:
+ end = s390_insn_divs_emit(buf, insn);
+ break;
+
+ case S390_INSN_FLOGR:
+ end = s390_insn_flogr_emit(buf, insn);
+ break;
+
+ case S390_INSN_UNOP:
+ end = s390_insn_unop_emit(buf, insn);
+ break;
+
+ case S390_INSN_TEST:
+ end = s390_insn_test_emit(buf, insn);
+ break;
+
+ case S390_INSN_CC2BOOL:
+ end = s390_insn_cc2bool_emit(buf, insn);
+ break;
+
+ case S390_INSN_CAS:
+ end = s390_insn_cas_emit(buf, insn);
+ break;
+
+ case S390_INSN_COMPARE:
+ end = s390_insn_compare_emit(buf, insn);
+ break;
+
+ case S390_INSN_BRANCH:
+ end = s390_insn_branch_emit(buf, insn);
+ break;
+
+ case S390_INSN_HELPER_CALL:
+ end = s390_insn_helper_call_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_TRIOP:
+ end = s390_insn_bfp_triop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_BINOP:
+ end = s390_insn_bfp_binop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_UNOP:
+ end = s390_insn_bfp_unop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP_COMPARE:
+ end = s390_insn_bfp_compare_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_BINOP:
+ end = s390_insn_bfp128_binop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_COMPARE:
+ end = s390_insn_bfp128_compare_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_UNOP:
+ end = s390_insn_bfp128_unop_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_TO:
+ end = s390_insn_bfp128_convert_to_emit(buf, insn);
+ break;
+
+ case S390_INSN_BFP128_CONVERT_FROM:
+ end = s390_insn_bfp128_convert_from_emit(buf, insn);
+ break;
+
+ default:
+ vpanic("s390_insn_emit");
+ }
+
+ vassert(end - buf <= nbuf);
+
+ return end - buf;
+}
+
+
+/*---------------------------------------------------------------*/
+/*--- end host_s390_defs.c ---*/
+/*---------------------------------------------------------------*/
projects / thirdparty / valgrind.git / commitdiff
