.last_bank_count = ATMEL_PIO_NPINS_PER_BANK,
};
+static const struct atmel_pioctrl_data microchip_sama7d65_pioctrl_data = {
+ .nbanks = 5,
+ .last_bank_count = 14, /* sama7d65 has only PE0 to PE13 */
+ .slew_rate_support = 1,
+};
+
static const struct atmel_pioctrl_data microchip_sama7g5_pioctrl_data = {
.nbanks = 5,
.last_bank_count = 8, /* sama7g5 has only PE0 to PE7 */
{
.compatible = "atmel,sama5d2-pinctrl",
.data = &atmel_sama5d2_pioctrl_data,
+ }, {
+ .compatible = "microchip,sama7d65-pinctrl",
+ .data = µchip_sama7d65_pioctrl_data,
}, {
.compatible = "microchip,sama7g5-pinctrl",
.data = µchip_sama7g5_pioctrl_data,