*/
static int
get_pi_vcpu_info(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
- struct vcpu_data *vcpu_info, struct vcpu_svm **svm)
+ struct vcpu_data *vcpu_info, struct kvm_vcpu **vcpu)
{
struct kvm_lapic_irq irq;
- struct kvm_vcpu *vcpu = NULL;
+ *vcpu = NULL;
kvm_set_msi_irq(kvm, e, &irq);
- if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) ||
+ if (!kvm_intr_is_single_vcpu(kvm, &irq, vcpu) ||
!kvm_irq_is_postable(&irq)) {
pr_debug("SVM: %s: use legacy intr remap mode for irq %u\n",
__func__, irq.vector);
pr_debug("SVM: %s: use GA mode for irq %u\n", __func__,
irq.vector);
- *svm = to_svm(vcpu);
- vcpu_info->pi_desc_addr = avic_get_backing_page_address(*svm);
vcpu_info->vector = irq.vector;
return 0;
{
bool enable_remapped_mode = true;
struct vcpu_data vcpu_info;
- struct vcpu_svm *svm = NULL;
+ struct kvm_vcpu *vcpu = NULL;
int ret = 0;
if (!kvm_arch_has_assigned_device(kvm) || !kvm_arch_has_irq_bypass())
* 4. IRQ has incompatible delivery mode (SMI, INIT, etc)
*/
if (new && new->type == KVM_IRQ_ROUTING_MSI &&
- !get_pi_vcpu_info(kvm, new, &vcpu_info, &svm) &&
- kvm_vcpu_apicv_active(&svm->vcpu)) {
+ !get_pi_vcpu_info(kvm, new, &vcpu_info, &vcpu) &&
+ kvm_vcpu_apicv_active(vcpu)) {
struct amd_iommu_pi_data pi;
enable_remapped_mode = false;
+ vcpu_info.pi_desc_addr = avic_get_backing_page_address(to_svm(vcpu));
+
/*
* Try to enable guest_mode in IRTE. Note, the address
* of the vCPU's AVIC backing page is passed to the
* IOMMU via vcpu_info->pi_desc_addr.
*/
- pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id,
- svm->vcpu.vcpu_id);
+ pi.ga_tag = AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, vcpu->vcpu_id);
pi.is_guest_mode = true;
pi.vcpu_data = &vcpu_info;
ret = irq_set_vcpu_affinity(host_irq, &pi);
* scheduling information in IOMMU irte.
*/
if (!ret)
- ret = svm_ir_list_add(svm, irqfd, &pi);
+ ret = svm_ir_list_add(to_svm(vcpu), irqfd, &pi);
}
- if (!ret && svm) {
- trace_kvm_pi_irte_update(host_irq, svm->vcpu.vcpu_id,
+ if (!ret && vcpu) {
+ trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id,
guest_irq, vcpu_info.vector,
vcpu_info.pi_desc_addr, !!new);
}