]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
mtd: rawnand: sunxi: introduce reg_spare_area in sunxi_nfc_caps
authorRichard Genoud <richard.genoud@bootlin.com>
Fri, 23 Jan 2026 11:44:51 +0000 (12:44 +0100)
committerMichael Trimarchi <michael@amarulasolutions.com>
Tue, 3 Feb 2026 20:45:00 +0000 (21:45 +0100)
Introduce NDFC Spare Area Register offset in SoC capabilities

The H6/H616 spare area register is not at the same offset as the
A10/A23 one, so move its offset into sunxi_nfc_caps.

No functional change.

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
drivers/mtd/nand/raw/sunxi_nand.c
drivers/mtd/nand/raw/sunxi_nand.h
drivers/mtd/nand/raw/sunxi_nand_spl.c

index c35dff75de0648b21bc70167471222c736e94282..aabfcdfe637f7e5b4a706c9618b29b8884029c78 100644 (file)
@@ -328,7 +328,7 @@ static void sunxi_nfc_select_chip(struct mtd_info *mtd, int chip)
                                ctl |= NFC_RB_SEL(sel->rb.info.nativeid);
                }
 
-               writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA);
+               writel(mtd->writesize, nfc->regs + NFC_REG_SPARE_AREA(nfc));
 
                if (nfc->clk_rate != sunxi_nand->clk_rate) {
                        sunxi_nfc_set_clk_rate(sunxi_nand->clk_rate);
@@ -1727,6 +1727,7 @@ static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
        .reg_ecc_err_cnt = NFC_REG_A10_ECC_ERR_CNT,
        .reg_user_data = NFC_REG_A10_USER_DATA,
        .reg_pat_found = NFC_REG_ECC_ST,
+       .reg_spare_area = NFC_REG_A10_SPARE_AREA,
        .reg_pat_id = NFC_REG_A10_PAT_ID,
        .pat_found_mask = GENMASK(31, 16),
        .ecc_mode_mask = GENMASK(15, 12),
index 2cbfc5c9c62a8789b5e6b2f891680c079bd9a9cf..b5a3800d33d25902fd32b0944978907786e560ff 100644 (file)
@@ -49,8 +49,9 @@
 #define NFC_REG_ECC_ERR_CNT(nfc, x)    (((nfc)->caps->reg_ecc_err_cnt + (x)) & ~0x3)
 #define NFC_REG_A10_USER_DATA  0x0050
 #define NFC_REG_USER_DATA(nfc, x)      ((nfc)->caps->reg_user_data + ((x) * 4))
-#define NFC_REG_SPARE_AREA     0x00A0
-#define NFC_REG_PAT_ID(nfc)    ((nfc)->caps->reg_pat_id)
+#define NFC_REG_SPARE_AREA(nfc) ((nfc)->caps->reg_spare_area)
+#define NFC_REG_A10_SPARE_AREA 0x00A0
+#define NFC_REG_PAT_ID(nfc) ((nfc)->caps->reg_pat_id)
 #define NFC_REG_A10_PAT_ID     0x00A4
 #define NFC_RAM0_BASE          0x0400
 #define NFC_RAM1_BASE          0x0800
  * @nstrengths:                Number of element of ECC strengths array
  * @reg_ecc_err_cnt:   ECC error counter register
  * @reg_user_data:     User data register
+ * @reg_spare_area:    Spare Area Register
  * @reg_pat_id:                Pattern ID Register
  * @reg_pat_found:     Data Pattern Status Register
  * @pat_found_mask:    ECC_PAT_FOUND mask in NFC_REG_PAT_FOUND register
@@ -184,6 +186,7 @@ struct sunxi_nfc_caps {
        unsigned int nstrengths;
        unsigned int reg_ecc_err_cnt;
        unsigned int reg_user_data;
+       unsigned int reg_spare_area;
        unsigned int reg_pat_id;
        unsigned int reg_pat_found;
        unsigned int pat_found_mask;
index 49ff56fb695ca1db97fed814dad7318d142d38b1..7f9ee14ffc3c235005412ddb3ea36f3cae84ead7 100644 (file)
@@ -54,6 +54,7 @@ const uint16_t random_seed[128] = {
 
 __maybe_unused static const struct sunxi_nfc_caps sunxi_nfc_a10_caps = {
        .has_ecc_block_512 = true,
+       .reg_spare_area = NFC_REG_A10_SPARE_AREA,
        .random_en_mask = BIT(9),
 };
 
@@ -151,7 +152,7 @@ static void nand_apply_config(const struct nfc_config *conf)
        writel(val | NFC_PAGE_SIZE(conf->page_size),
               SUNXI_NFC_BASE + NFC_REG_CTL);
        writel(conf->ecc_size, SUNXI_NFC_BASE + NFC_REG_CNT);
-       writel(conf->page_size, SUNXI_NFC_BASE + NFC_REG_SPARE_AREA);
+       writel(conf->page_size, SUNXI_NFC_BASE + NFC_REG_SPARE_AREA(conf));
 }
 
 static int nand_load_page(const struct nfc_config *conf, u32 offs)