[PATCH][GCC][AArch64] Fix incorrect INS in SIMD mov pattern

2017-03-21  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>)
	Change ins into fmov.

From-SVN: r246309

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 59912a231a7394db3a8af42c7adfd4d40daf0757..5e97338ebb2e98438bcad79fc0903955df8b715c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-03-21  Tamar Christina  <tamar.christina@arm.com>
+
+       * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>)
+       Change ins into fmov.
+
 2017-03-19  Dominique d'Humieres  <dominiq@lps.ens.fr>
 
        PR target/71017

diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md
index 2929043cbdbeca8bbcdc02f04afc14831145c3b7..6d403115c5442d8f7de5e83d3d17e1c2c836a1b8 100644 (file)
--- a/gcc/config/aarch64/aarch64-simd.md
+++ b/gcc/config/aarch64/aarch64-simd.md
@@ -106,7 +106,7 @@
      case 1: return "str\\t%d1, %0";
      case 2: return "orr\t%0.<Vbtype>, %1.<Vbtype>, %1.<Vbtype>";
      case 3: return "umov\t%0, %1.d[0]";
-     case 4: return "ins\t%0.d[0], %1";
+     case 4: return "fmov\t%d0, %1";
      case 5: return "mov\t%0, %1";
      case 6:
        return aarch64_output_simd_mov_immediate (operands[1],
@@ -115,8 +115,8 @@
      }
 }
   [(set_attr "type" "neon_load1_1reg<q>, neon_store1_1reg<q>,\
-                     neon_logic<q>, neon_to_gp<q>, neon_from_gp<q>,\
-                     mov_reg, neon_move<q>")]
+                    neon_logic<q>, neon_to_gp<q>, f_mcr,\
+                    mov_reg, neon_move<q>")]
 )
 
 (define_insn "*aarch64_simd_mov<mode>"