KVM: x86: Add wrapper APIs to reset dirty/available register masks

Add wrappers for setting regs_{avail,dirty} in anticipation of turning the
fields into proper bitmaps, at which point direct writes won't work so
well.

Deliberately leave the initialization in kvm_arch_vcpu_create() as-is,
because the regs_avail logic in particular is special in that it's the one
and only place where KVM marks eagerly synchronized registers as available.

No functional change intended.

Signed-off-by: Sean Christopherson <seanjc@google.com>
Reviewed-by: Kai Huang <kai.huang@intel.com>
Tested-by: Kai Huang <kai.huang@intel.com>
Message-ID: <20260409224236.2021562-5-seanjc@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/kvm_cache_regs.h b/arch/x86/kvm/kvm_cache_regs.h
index ac1f9867a2340a59d48e5bd67c32152c66d5456d..7f71d468178c3fd70167bf196ddcaed00c36ba46 100644 (file)
--- a/arch/x86/kvm/kvm_cache_regs.h
+++ b/arch/x86/kvm/kvm_cache_regs.h
@@ -105,6 +105,24 @@ static __always_inline bool kvm_register_test_and_mark_available(struct kvm_vcpu
        return arch___test_and_set_bit(reg, (unsigned long *)&vcpu->arch.regs_avail);
 }
 
+static __always_inline void kvm_clear_available_registers(struct kvm_vcpu *vcpu,
+                                                         u32 clear_mask)
+{
+       /*
+        * Note the bitwise-AND!  In practice, a straight write would also work
+        * as KVM initializes the mask to all ones and never clears registers
+        * that are eagerly synchronized.  Using a bitwise-AND adds a bit of
+        * sanity checking as incorrectly marking an eagerly sync'd register
+        * unavailable will generate a WARN due to an unexpected cache request.
+        */
+       vcpu->arch.regs_avail &= ~clear_mask;
+}
+
+static __always_inline void kvm_reset_dirty_registers(struct kvm_vcpu *vcpu)
+{
+       vcpu->arch.regs_dirty = 0;
+}
+
 /*
  * The "raw" register helpers are only for cases where the full 64 bits of a
  * register are read/written irrespective of current vCPU mode.  In other words,

diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c
index ee5749d8b3e839b8188d51593d7ea3feeef5030b..2b73d265015521c2fd0beefe12ede4c8ae0f81f1 100644 (file)
--- a/arch/x86/kvm/svm/svm.c
+++ b/arch/x86/kvm/svm/svm.c
@@ -4508,7 +4508,7 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu, u64 run_flags)
                vcpu->arch.regs[VCPU_REGS_RSP] = svm->vmcb->save.rsp;
                vcpu->arch.rip = svm->vmcb->save.rip;
        }
-       vcpu->arch.regs_dirty = 0;
+       kvm_reset_dirty_registers(vcpu);
 
        if (unlikely(svm->vmcb->control.exit_code == SVM_EXIT_NMI))
                kvm_before_interrupt(vcpu, KVM_HANDLING_NMI);
@@ -4554,7 +4554,7 @@ static __no_kcsan fastpath_t svm_vcpu_run(struct kvm_vcpu *vcpu, u64 run_flags)
                vcpu->arch.apf.host_apf_flags =
                        kvm_read_and_reset_apf_flags();
 
-       vcpu->arch.regs_avail &= ~SVM_REGS_LAZY_LOAD_SET;
+       kvm_clear_available_registers(vcpu, SVM_REGS_LAZY_LOAD_SET);
 
        if (!msr_write_intercepted(vcpu, MSR_AMD64_PERF_CNTR_GLOBAL_CTL))
                rdmsrq(MSR_AMD64_PERF_CNTR_GLOBAL_CTL, vcpu_to_pmu(vcpu)->global_ctrl);

diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index 63c4ca8c97d58308e8c2ba66a3155ee8d9c8a077..c4d2bc080add4bd6d50dd68746deaff60a4580be 100644 (file)
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -310,13 +310,13 @@ static void vmx_switch_vmcs(struct kvm_vcpu *vcpu, struct loaded_vmcs *vmcs)
        vmx_sync_vmcs_host_state(vmx, prev);
        put_cpu();
 
-       vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET;
+       kvm_clear_available_registers(vcpu, VMX_REGS_LAZY_LOAD_SET);
 
        /*
         * All lazily updated registers will be reloaded from VMCS12 on both
         * vmentry and vmexit.
         */
-       vcpu->arch.regs_dirty = 0;
+       kvm_reset_dirty_registers(vcpu);
 }
 
 static void nested_put_vmcs12_pages(struct kvm_vcpu *vcpu)

diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c
index c23ec4ac8bc842aa996e5259630bdd0dacdab76d..c9ab7902151f8a13462556b8f60769d8ead360ca 100644 (file)
--- a/arch/x86/kvm/vmx/tdx.c
+++ b/arch/x86/kvm/vmx/tdx.c
@@ -1098,7 +1098,7 @@ fastpath_t tdx_vcpu_run(struct kvm_vcpu *vcpu, u64 run_flags)
 
        tdx_load_host_xsave_state(vcpu);
 
-       vcpu->arch.regs_avail &= TDX_REGS_AVAIL_SET;
+       kvm_clear_available_registers(vcpu, ~(u32)TDX_REGS_AVAIL_SET);
 
        if (unlikely(tdx->vp_enter_ret == EXIT_REASON_EPT_MISCONFIG))
                return EXIT_FASTPATH_NONE;

diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c
index aa1c260184397ec9ce7c65719e1ec22bdcf3975b..61eeafcd70f126236810f4bef2d71f54f64884d6 100644 (file)
--- a/arch/x86/kvm/vmx/vmx.c
+++ b/arch/x86/kvm/vmx/vmx.c
@@ -7472,7 +7472,7 @@ static noinstr void vmx_vcpu_enter_exit(struct kvm_vcpu *vcpu,
                                   flags);
 
        vcpu->arch.cr2 = native_read_cr2();
-       vcpu->arch.regs_avail &= ~VMX_REGS_LAZY_LOAD_SET;
+       kvm_clear_available_registers(vcpu, VMX_REGS_LAZY_LOAD_SET);
 
        vmx->idt_vectoring_info = 0;
 
@@ -7538,7 +7538,7 @@ fastpath_t vmx_vcpu_run(struct kvm_vcpu *vcpu, u64 run_flags)
                vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
        if (kvm_register_is_dirty(vcpu, VCPU_REG_RIP))
                vmcs_writel(GUEST_RIP, vcpu->arch.rip);
-       vcpu->arch.regs_dirty = 0;
+       kvm_reset_dirty_registers(vcpu);
 
        if (run_flags & KVM_RUN_LOAD_GUEST_DR6)
                set_debugreg(vcpu->arch.dr6, 6);