i386: Remove bogus THREAD_ATOMIC_* macros

The x86 defines optimized THREAD_ATOMIC_* macros where reference always
the current thread instead of the one indicated by input 'descr' argument.
It work as long the input is the self thread pointer, however it generates
wrong code if the semantic is to set a bit atomicialy from another thread.

This is not an issue for current GLIBC usage, however the new cancellation
code expects that some synchronization code to atomically set bits from
different threads.

If some usage indeed proves to be a hotspot we can add an extra macro
with a more descriptive name (THREAD_ATOMIC_BIT_SET_SELF for instance)
where i386 might optimize it.

Checked on i686-linux-gnu.

	* sysdeps/i686/nptl/tls.h (THREAD_ATOMIC_CMPXCHG_VAL,
	THREAD_ATOMIC_AND, THREAD_ATOMIC_BIT_SET): Remove macros.

diff --git a/ChangeLog b/ChangeLog
index 8da62f1a12ded2487fd99631026e44ec0b21945a..159808db8566b310b7b213e56db97998dd8311b2 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,8 @@
 2019-01-03  Adhemerval Zanella  <adhemerval.zanella@linaro.org>
 
+       * sysdeps/i386/nptl/tls.h (THREAD_ATOMIC_CMPXCHG_VAL,
+       THREAD_ATOMIC_AND, THREAD_ATOMIC_BIT_SET): Remove macros.
+
        * sysdeps/x86_64/nptl/tls.h (THREAD_ATOMIC_CMPXCHG_VAL,
        THREAD_ATOMIC_AND, THREAD_ATOMIC_BIT_SET): Remove macros.
 

diff --git a/sysdeps/i386/nptl/tls.h b/sysdeps/i386/nptl/tls.h
index 5a528fc1deac0c91045a93cc0bacf7bc09285219..85a4b42bcea99cc3ca9f4d65a1f53a1cf6e76c82 100644 (file)
--- a/sysdeps/i386/nptl/tls.h
+++ b/sysdeps/i386/nptl/tls.h
@@ -362,43 +362,6 @@ tls_fill_user_desc (union user_desc_init *desc,
        }})
 
 
-/* Atomic compare and exchange on TLS, returning old value.  */
-#define THREAD_ATOMIC_CMPXCHG_VAL(descr, member, newval, oldval) \
-  ({ __typeof (descr->member) __ret;                                         \
-     __typeof (oldval) __old = (oldval);                                     \
-     if (sizeof (descr->member) == 4)                                        \
-       asm volatile (LOCK_PREFIX "cmpxchgl %2, %%gs:%P3"                     \
-                    : "=a" (__ret)                                           \
-                    : "0" (__old), "r" (newval),                             \
-                      "i" (offsetof (struct pthread, member)));              \
-     else                                                                    \
-       /* Not necessary for other sizes in the moment.  */                   \
-       abort ();                                                             \
-     __ret; })
-
-
-/* Atomic logical and.  */
-#define THREAD_ATOMIC_AND(descr, member, val) \
-  (void) ({ if (sizeof ((descr)->member) == 4)                               \
-             asm volatile (LOCK_PREFIX "andl %1, %%gs:%P0"                   \
-                           :: "i" (offsetof (struct pthread, member)),       \
-                              "ir" (val));                                   \
-           else                                                              \
-             /* Not necessary for other sizes in the moment.  */             \
-             abort (); })
-
-
-/* Atomic set bit.  */
-#define THREAD_ATOMIC_BIT_SET(descr, member, bit) \
-  (void) ({ if (sizeof ((descr)->member) == 4)                               \
-             asm volatile (LOCK_PREFIX "orl %1, %%gs:%P0"                    \
-                           :: "i" (offsetof (struct pthread, member)),       \
-                              "ir" (1 << (bit)));                            \
-           else                                                              \
-             /* Not necessary for other sizes in the moment.  */             \
-             abort (); })
-
-
 /* Set the stack guard field in TCB head.  */
 #define THREAD_SET_STACK_GUARD(value) \
   THREAD_SETMEM (THREAD_SELF, header.stack_guard, value)