return -EINVAL;
switch (me_id) {
- case 0:
- if (pipe_id == 0)
- amdgpu_fence_process(&adev->gfx.gfx_ring[0]);
- else
- amdgpu_fence_process(&adev->gfx.gfx_ring[1]);
- break;
case 1:
case 2:
for (i = 0; i < adev->gfx.num_compute_rings; i++) {
amdgpu_fence_process(ring);
}
break;
+ default:
+ dev_dbg(adev->dev, "Unexpected me %d in eop_irq\n", me_id);
+ break;
}
}
return;
switch (me_id) {
- case 0:
- for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
- ring = &adev->gfx.gfx_ring[i];
- /* we only enabled 1 gfx queue per pipe for now */
- if (ring->me == me_id && ring->pipe == pipe_id)
- drm_sched_fault(&ring->sched);
- }
- break;
case 1:
case 2:
for (i = 0; i < adev->gfx.num_compute_rings; i++) {
}
break;
default:
- BUG();
+ dev_dbg(adev->dev, "Unexpected me %d in priv_fault\n", me_id);
break;
}
}