re PR rtl-optimization/19296 (Range check on short miscompiled at -O)

	PR rtl-optimization/19296
	* combine.c (simplify_comparison): Rewrite the condition under
	which a non-paradoxical SUBREG of a PLUS can be lifted when
	compared against a constant.

From-SVN: r93822

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 772c301347b67eb318254acd28bb3cfe29c0f2b8..36b341273387ba9c5b4186877548f290e3b8994f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2005-01-18  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+       PR rtl-optimization/19296
+       * combine.c (simplify_comparison): Rewrite the condition under
+       which a non-paradoxical SUBREG of a PLUS can be lifted when
+       compared against a constant.
+
 2004-01-14  David Mosberger  <davidm@hpl.hp.com>
            James E Wilson  <wilson@specifixinc.com>
 

diff --git a/gcc/combine.c b/gcc/combine.c
index c8b5987faab52c16e7905c11a7b02d99bd011fd4..ff18634ec6d0dda6500933b8b3029190a53c884c 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -10813,34 +10813,61 @@ simplify_comparison (code, pop0, pop1)
          break;
 
        case SUBREG:
-         /* Check for the case where we are comparing A - C1 with C2,
-            both constants are smaller than 1/2 the maximum positive
-            value in MODE, and the comparison is equality or unsigned.
-            In that case, if A is either zero-extended to MODE or has
-            sufficient sign bits so that the high-order bit in MODE
-            is a copy of the sign in the inner mode, we can prove that it is
-            safe to do the operation in the wider mode.  This simplifies
-            many range checks.  */
+         /* Check for the case where we are comparing A - C1 with C2, that is
+
+              (subreg:MODE (plus (A) (-C1))) op (C2)
+
+            with C1 a constant, and try to lift the SUBREG, i.e. to do the
+            comparison in the wider mode.  One of the following two conditions
+            must be true in order for this to be valid:
+
+              1. The mode extension results in the same bit pattern being added
+                 on both sides and the comparison is equality or unsigned.  As
+                 C2 has been truncated to fit in MODE, the pattern can only be
+                 all 0s or all 1s.
+
+              2. The mode extension results in the sign bit being copied on
+                 each side.
+
+            The difficulty here is that we have predicates for A but not for
+            (A - C1) so we need to check that C1 is within proper bounds so
+            as to perturbate A as little as possible.  */
 
          if (mode_width <= HOST_BITS_PER_WIDE_INT
              && subreg_lowpart_p (op0)
+             && GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0))) > mode_width
              && GET_CODE (SUBREG_REG (op0)) == PLUS
-             && GET_CODE (XEXP (SUBREG_REG (op0), 1)) == CONST_INT
-             && INTVAL (XEXP (SUBREG_REG (op0), 1)) < 0
-             && (-INTVAL (XEXP (SUBREG_REG (op0), 1))
-                 < (HOST_WIDE_INT) (GET_MODE_MASK (mode) / 2))
-             && (unsigned HOST_WIDE_INT) const_op < GET_MODE_MASK (mode) / 2
-             && (0 == (nonzero_bits (XEXP (SUBREG_REG (op0), 0),
-                                     GET_MODE (SUBREG_REG (op0)))
-                       & ~GET_MODE_MASK (mode))
-                 || (num_sign_bit_copies (XEXP (SUBREG_REG (op0), 0),
-                                          GET_MODE (SUBREG_REG (op0)))
-                     > (unsigned int)
-                       (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (op0)))
-                        - GET_MODE_BITSIZE (mode)))))
-           {
-             op0 = SUBREG_REG (op0);
-             continue;
+             && GET_CODE (XEXP (SUBREG_REG (op0), 1)) == CONST_INT)
+           {
+             enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
+             rtx a = XEXP (SUBREG_REG (op0), 0);
+             HOST_WIDE_INT c1 = -INTVAL (XEXP (SUBREG_REG (op0), 1));
+
+             if ((c1 > 0
+                  && (unsigned HOST_WIDE_INT) c1
+                      < (unsigned HOST_WIDE_INT) 1 << (mode_width - 1)
+                  && (equality_comparison_p || unsigned_comparison_p)
+                  /* (A - C1) zero-extends if it is positive and sign-extends
+                     if it is negative, C2 both zero- and sign-extends.  */
+                  && ((0 == (nonzero_bits (a, inner_mode)
+                             & ~GET_MODE_MASK (mode))
+                       && const_op >= 0)
+                      /* (A - C1) sign-extends if it is positive and 1-extends
+                         if it is negative, C2 both sign- and 1-extends.  */
+                      || (num_sign_bit_copies (a, inner_mode)
+                          > (unsigned int) (GET_MODE_BITSIZE (inner_mode)
+                                            - mode_width)
+                          && const_op < 0)))
+                 || ((unsigned HOST_WIDE_INT) c1
+                      < (unsigned HOST_WIDE_INT) 1 << (mode_width - 2)
+                     /* (A - C1) always sign-extends, like C2.  */
+                     && num_sign_bit_copies (a, inner_mode)
+                        > (unsigned int) (GET_MODE_BITSIZE (inner_mode)
+                                          - mode_width - 1)))
+               {
+                 op0 = SUBREG_REG (op0);
+                 continue;
+               }
            }
 
          /* If the inner mode is narrower and we are extracting the low part,

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index db9c636b68af7352215af3e650bf3fcee267366e..bb002fd24ba374c455ceb549182aba0ee06f7650 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2005-01-18  Eric Botcazou  <ebotcazou@libertysurf.fr>
+
+       * gcc.dg/short-compare-1.c: New test.
+       * gcc.dg/short-compare-2.c: Likewise.
+
 2005-01-03  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
        Backport:

diff --git a/gcc/testsuite/gcc.dg/short-compare-1.c b/gcc/testsuite/gcc.dg/short-compare-1.c
index 6a4e388d179610613ef3b50bfce5f99d8c057ae9..d4be16b1c92818533857bf5012999c1ff1900cbb 100644 (file)
--- a/gcc/testsuite/gcc.dg/short-compare-1.c
+++ b/gcc/testsuite/gcc.dg/short-compare-1.c
@@ -3,8 +3,8 @@
 
 /* { dg-do run } */
 /* { dg-options "-O" } */
-/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
-/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
+/* { dg-options "-O -mcpu=i686" { target i?86-*-* } } */
+/* { dg-options "-O -m32 -mcpu=i686" { target x86_64-*-* } } */
 
 extern void abort(void);
 

diff --git a/gcc/testsuite/gcc.dg/short-compare-2.c b/gcc/testsuite/gcc.dg/short-compare-2.c
index 1c5963c5a2f231a50dc5b01a0853cb9d8eac6044..d0796b3582c527f8846a18d95354d0dbf1c302d3 100644 (file)
--- a/gcc/testsuite/gcc.dg/short-compare-2.c
+++ b/gcc/testsuite/gcc.dg/short-compare-2.c
@@ -4,8 +4,8 @@
 
 /* { dg-do run } */
 /* { dg-options "-O" } */
-/* { dg-options "-O -mtune=i686" { target i?86-*-* } } */
-/* { dg-options "-O -m32 -mtune=i686" { target x86_64-*-* } } */
+/* { dg-options "-O -mcpu=i686" { target i?86-*-* } } */
+/* { dg-options "-O -m32 -mcpu=i686" { target x86_64-*-* } } */
 
 extern void abort();