]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
ARM: dts: at91: sama7d65-curiosity: Add DT tweaks for sama7d65-curiosity board
authorRyan Wanner <Ryan.Wanner@microchip.com>
Mon, 7 Jul 2025 11:35:54 +0000 (17:05 +0530)
committerEugen Hristev <eugen.hristev@linaro.org>
Fri, 25 Jul 2025 08:54:43 +0000 (11:54 +0300)
Add u-boot device tree and tweaks for sama7d65-curiosity board on top of
the upstream DTS files in dts/upstream.

Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
[varshini.rajendran@microchip.com: align with Linux DT and add tweaks]
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
arch/arm/dts/at91-sama7d65_curiosity-u-boot.dtsi [new file with mode: 0644]

diff --git a/arch/arm/dts/at91-sama7d65_curiosity-u-boot.dtsi b/arch/arm/dts/at91-sama7d65_curiosity-u-boot.dtsi
new file mode 100644 (file)
index 0000000..343f10c
--- /dev/null
@@ -0,0 +1,80 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ *  at91-sama7d65_curiosity-u-boot.dtsi - Device Tree Include file for
+ *  SAMA7D65 CURIOSITY.
+ *
+ *  Copyright (c) 2023 Microchip Technology Inc. and its subsidiaries
+ *
+ *  Author: Ryan Wanner <ryan.wanner@microchip.com>
+ */
+
+/{
+       aliases {
+               serial0 = &uart6;
+       };
+
+       chosen {
+               bootph-all;
+       };
+
+       clocks {
+               slow_rc_osc: slow_rc_osc {
+                       compatible = "fixed-clock";
+                       #clock-cells = <0>;
+                       clock-frequency = <32000>;
+               };
+       };
+
+       cpus {
+               cpu@0 {
+                       clocks = <&pmc PMC_TYPE_CORE 8>, <&pmc PMC_TYPE_CORE 26>, <&main_xtal>;
+                       clock-names = "cpu", "master", "xtal";
+               };
+       };
+
+       soc {
+               bootph-all;
+       };
+};
+
+&clk32k {
+       clocks = <&slow_rc_osc>, <&slow_xtal>;
+};
+
+&main_xtal {
+       bootph-all;
+};
+
+&pioa {
+       bootph-all;
+};
+
+&pinctrl_uart6_default {
+       bootph-all;
+};
+
+&pit64b0 {
+       bootph-all;
+};
+
+&pmc {
+       bootph-all;
+};
+
+&sdmmc1 {
+       assigned-clock-parents = <&pmc PMC_TYPE_CORE 27>; /* MCK1 div */
+       microchip,sdcal-inverted;
+       no-1-8-v;
+};
+
+&slow_rc_osc {
+       bootph-all;
+};
+
+&slow_xtal {
+       bootph-all;
+};
+
+&uart6 {
+       bootph-all;
+};