[RS6000] PR94145, make PLT loads volatile

	PR target/94145
	* config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
	for PLT16_LO.
	* config/rs6000/rs6000.md (UNSPEC_PLT16_LO): Remove.
	(UNSPECV_PLT16_LO): Define.
	(pltseq_plt16_lo_): Use unspec_volatile.

(cherry picked from commit 19e5389debb03c3623f6a2ce8a8f6f4aa2118901)
minus the PLT_PCREL parts

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9598a49a702d7a6f72dba6891b9fd19aee1e0c4d..e8b3131e7dfd82c9b67e349d7e35201ae3d3c6fa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+2020-05-01  Alan Modra  <amodra@gmail.com>
+
+       PR target/94145
+       Backport from master
+       2020-03-27  Alan Modra   <amodra@gmail.com>
+
+       * config/rs6000/rs6000.c (rs6000_longcall_ref): Use unspec_volatile
+       for PLT16_LO.
+       * config/rs6000/rs6000.md (UNSPEC_PLT16_LO): Remove.
+       (UNSPECV_PLT16_LO): Define.
+       (pltseq_plt16_lo_): Use unspec_volatile.
+
 2020-04-30  Carl Love  <cel@us.ibm.com>
 
        * config/rs6000/emmintrin.h (_mm_movemask_epi8): Fix comment.
@@ -169,7 +181,7 @@
 
 2020-04-07  Will Schmidt  <will_schmidt@vnet.ibm.com>
 
-Backport from mainline.
+       Backport from mainline.
        2020-03-23  Will Schmidt  <will_schmidt@vnet.ibm.com>
 
        * config/rs6000/rs6000-call.c altivec_init_builtins(): Remove

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index f7c538c4d54eea5b18ef51e76103c8aa33e2953f..8043cbc875273d129ef3e57a0f8db7a02ffa950c 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -33049,8 +33049,9 @@ rs6000_longcall_ref (rtx call_ref, rtx arg)
       rtx reg = gen_rtx_REG (Pmode, regno);
       rtx hi = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, base, call_ref, arg),
                               UNSPEC_PLT16_HA);
-      rtx lo = gen_rtx_UNSPEC (Pmode, gen_rtvec (3, reg, call_ref, arg),
-                              UNSPEC_PLT16_LO);
+      rtx lo = gen_rtx_UNSPEC_VOLATILE (Pmode,
+                                       gen_rtvec (3, reg, call_ref, arg),
+                                       UNSPECV_PLT16_LO);
       emit_insn (gen_rtx_SET (reg, hi));
       emit_insn (gen_rtx_SET (reg, lo));
       return reg;

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index a768f5dd511ebf28ecb908fa7fe7a9694cb3850a..c8740bfdee85dfe10d755f45447169259f4f6aa6 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -152,7 +152,6 @@
    UNSPEC_SI_FROM_SF
    UNSPEC_PLTSEQ
    UNSPEC_PLT16_HA
-   UNSPEC_PLT16_LO
   ])
 
 ;;
@@ -181,6 +180,7 @@
    UNSPECV_MTFSB1              ; Set FPSCR Field bit to 1
    UNSPECV_SPLIT_STACK_RETURN   ; A camouflaged return
    UNSPECV_SPEC_BARRIER         ; Speculation barrier
+   UNSPECV_PLT16_LO
   ])
 
 \f
@@ -10162,10 +10162,10 @@
 
 (define_insn "*pltseq_plt16_lo_<mode>"
   [(set (match_operand:P 0 "gpc_reg_operand" "=r")
-       (unspec:P [(match_operand:P 1 "gpc_reg_operand" "b")
-                  (match_operand:P 2 "symbol_ref_operand" "s")
-                  (match_operand:P 3 "" "")]
-                 UNSPEC_PLT16_LO))]
+       (unspec_volatile:P [(match_operand:P 1 "gpc_reg_operand" "b")
+                           (match_operand:P 2 "symbol_ref_operand" "s")
+                           (match_operand:P 3 "" "")]
+                          UNSPECV_PLT16_LO))]
   "TARGET_PLTSEQ"
 {
   return rs6000_pltseq_template (operands, 2);