]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
PCI: qcom: Remove ASPM L0s support for MSM8996 SoC
authorManivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Wed, 26 Nov 2025 08:17:18 +0000 (13:47 +0530)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 30 Dec 2025 17:12:22 +0000 (11:12 -0600)
Though I couldn't confirm ASPM L0s support with the Qcom hardware team, a
bug report from Dmitry suggests that L0s is broken on this legacy SoC.
Hence, remove L0s support from the Root Port Link Capabilities in this SoC.

Since qcom_pcie_clear_aspm_l0s() is now used by more than one SoC config,
call it from qcom_pcie_host_init() instead.

Reported-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Closes: https://lore.kernel.org/linux-pci/4cp5pzmlkkht2ni7us6p3edidnk25l45xrp6w3fxguqcvhq2id@wjqqrdpkypkf
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://patch.msgid.link/20251126081718.8239-1-mani@kernel.org
drivers/pci/controller/dwc/pcie-qcom.c

index 7b92e7a1c0d9364a9cefe1450818f9cbfc7fd3ac..5a318487b2b3f6c61d8f5b1fd5cdf2738a1f1dcd 100644 (file)
@@ -1047,7 +1047,6 @@ static int qcom_pcie_post_init_2_7_0(struct qcom_pcie *pcie)
                writel(WR_NO_SNOOP_OVERRIDE_EN | RD_NO_SNOOP_OVERRIDE_EN,
                                pcie->parf + PARF_NO_SNOOP_OVERRIDE);
 
-       qcom_pcie_clear_aspm_l0s(pcie->pci);
        qcom_pcie_clear_hpc(pcie->pci);
 
        return 0;
@@ -1316,6 +1315,8 @@ static int qcom_pcie_host_init(struct dw_pcie_rp *pp)
                        goto err_disable_phy;
        }
 
+       qcom_pcie_clear_aspm_l0s(pcie->pci);
+
        qcom_ep_reset_deassert(pcie);
 
        if (pcie->cfg->ops->config_sid) {
@@ -1464,6 +1465,7 @@ static const struct qcom_pcie_cfg cfg_2_1_0 = {
 
 static const struct qcom_pcie_cfg cfg_2_3_2 = {
        .ops = &ops_2_3_2,
+       .no_l0s = true,
 };
 
 static const struct qcom_pcie_cfg cfg_2_3_3 = {