Implement missing FPU ops:

  FSTSW  m32
  FSAVE  m32
  FRSTOR m32

MERGE TO HEAD

git-svn-id: svn://svn.valgrind.org/valgrind/branches/VALGRIND_1_0_BRANCH@597

diff --git a/vg_memory.c b/vg_memory.c
index eea79cbe9ac797a828c044805a65a6ffd56f9fa0..e8e7770e8e75d0d8b5abd438a7f6524e98529909 100644 (file)
--- a/vg_memory.c
+++ b/vg_memory.c
@@ -1142,7 +1142,7 @@ void VGM_(fpu_read_check) ( Addr addr, Int size )
       return;
    }
 
-   if (size == 28) {
+   if (size == 28 || size == 108) {
       PROF_EVENT(84); /* XXX assign correct event number */
       fpu_read_check_SLOWLY ( addr, 28 );
       return;
@@ -1229,7 +1229,7 @@ void VGM_(fpu_write_check) ( Addr addr, Int size )
       return;
    }
 
-   if (size == 28) {
+   if (size == 28 || size == 108) {
       PROF_EVENT(89); /* XXX assign correct event number */
       fpu_write_check_SLOWLY ( addr, 28 );
       return;

diff --git a/vg_to_ucode.c b/vg_to_ucode.c
index e41280693508ccb3c25fca5a195ee88cee15c91a..10a4e8045051abe0ff4cc07254a83d34deab5fdc 100644 (file)
--- a/vg_to_ucode.c
+++ b/vg_to_ucode.c
@@ -2485,7 +2485,13 @@ Addr dis_fpu ( UCodeBlock* cb, UChar first_byte, Addr eip )
                return dis_fpu_mem(cb, 8, rd, eip, first_byte); 
             case 2: /* FST double-real */
             case 3: /* FSTP double-real */
-               return dis_fpu_mem(cb, 8, wr, eip, first_byte); 
+               return dis_fpu_mem(cb, 8, wr, eip, first_byte);
+            case 4: /* FRSTOR */
+               return dis_fpu_mem(cb, 108, rd, eip, first_byte);
+            case 6: /* FSAVE */
+               return dis_fpu_mem(cb, 108, wr, eip, first_byte);
+            case 7: /* FSTSW */
+               return dis_fpu_mem(cb, 2, wr, eip, first_byte);
             default: 
                goto unhandled;
          }