clk: renesas: r9a09g077: Propagate rate changes to parent clocks

[ Upstream commit 145dfd70b9c70e5bc03494a7ce8fa3748ac01af3 ]

Add the CLK_SET_RATE_PARENT flag to divider clock registration so that rate
changes can propagate to parent clocks when needed. This allows the CPG
divider clocks to request rate adjustments from their parent, ensuring
correct frequency scaling and improved flexibility in clock rate selection.

Fixes: 065fe720eec6e ("clk: renesas: Add support for R9A09G077 SoC")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251028165127.991351-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/clk/renesas/r9a09g077-cpg.c b/drivers/clk/renesas/r9a09g077-cpg.c
index af3ef6d58c87cdefb2de6c81c0aa9989e542e36d..d12975418a568177d8cf78dfbdc05cfbc5f176c3 100644 (file)
--- a/drivers/clk/renesas/r9a09g077-cpg.c
+++ b/drivers/clk/renesas/r9a09g077-cpg.c
@@ -217,7 +217,7 @@ r9a09g077_cpg_div_clk_register(struct device *dev,
 
        if (core->dtable)
                clk_hw = clk_hw_register_divider_table(dev, core->name,
-                                                      parent_name, 0,
+                                                      parent_name, CLK_SET_RATE_PARENT,
                                                       addr,
                                                       GET_SHIFT(core->conf),
                                                       GET_WIDTH(core->conf),
@@ -226,7 +226,7 @@ r9a09g077_cpg_div_clk_register(struct device *dev,
                                                       &pub->rmw_lock);
        else
                clk_hw = clk_hw_register_divider(dev, core->name,
-                                                parent_name, 0,
+                                                parent_name, CLK_SET_RATE_PARENT,
                                                 addr,
                                                 GET_SHIFT(core->conf),
                                                 GET_WIDTH(core->conf),