]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: tegra: Fix CPU compatible string to cortex-a78ae on Tegra234
authorSumit Gupta <sumitg@nvidia.com>
Wed, 21 Jan 2026 10:45:34 +0000 (16:15 +0530)
committerThierry Reding <treding@nvidia.com>
Thu, 25 Jun 2026 09:13:27 +0000 (11:13 +0200)
The Tegra234 SoC uses Cortex-A78AE cores, not Cortex-A78. Update the
compatible string for all CPU nodes to match the actual hardware.

Tegra234 hardware reports:
  # head /proc/cpuinfo | egrep 'implementer|part'
  CPU implementer : 0x41
  CPU part        : 0xd42

Which maps to (from arch/arm64/include/asm/cputype.h):
  #define ARM_CPU_IMP_ARM              0x41
  #define ARM_CPU_PART_CORTEX_A78AE    0xD42

Fixes: a12cf5c339b08 ("arm64: tegra: Describe Tegra234 CPU hierarchy")
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra234.dtsi

index 8e0c51e496e20d6510f0224b2486d7081c04b6bf..820670dd6042674778e64c0cb477964904218b30 100644 (file)
                #size-cells = <0>;
 
                cpu0_0: cpu@0 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x00000>;
 
                };
 
                cpu0_1: cpu@100 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x00100>;
 
                };
 
                cpu0_2: cpu@200 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x00200>;
 
                };
 
                cpu0_3: cpu@300 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x00300>;
 
                };
 
                cpu1_0: cpu@10000 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x10000>;
 
                };
 
                cpu1_1: cpu@10100 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x10100>;
 
                };
 
                cpu1_2: cpu@10200 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x10200>;
 
                };
 
                cpu1_3: cpu@10300 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x10300>;
 
                };
 
                cpu2_0: cpu@20000 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x20000>;
 
                };
 
                cpu2_1: cpu@20100 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x20100>;
 
                };
 
                cpu2_2: cpu@20200 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x20200>;
 
                };
 
                cpu2_3: cpu@20300 {
-                       compatible = "arm,cortex-a78";
+                       compatible = "arm,cortex-a78ae";
                        device_type = "cpu";
                        reg = <0x20300>;