re PR target/31388 (ICE building libiberty multilib for mips16 multilibs)

gcc/
	PR target/31388
	* config/mips/mips.md (load_const_gp_<mode>): New insns.
	* config/mips/mips.c (gen_load_const_gp): New function.
	(mips_split_symbol): Avoid using or creating the MIPS16 GP
	pseudo register if no_new_pseudos.
	(mips16_gp_pseudo_reg): Use gen_load_const_gp.

From-SVN: r132066

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8a8046938df3a7b3ef7f795f7d035e883d038f57..51ac67dc50323c07d74e00dda56ce5c23630a1a5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2008-02-02  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+       PR target/31388
+       * config/mips/mips.md (load_const_gp_<mode>): New insns.
+       * config/mips/mips.c (gen_load_const_gp): New function.
+       (mips_split_symbol): Avoid using or creating the MIPS16 GP
+       pseudo register if no_new_pseudos.
+       (mips16_gp_pseudo_reg): Use gen_load_const_gp.
+
 2008-02-01  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
        Backport:

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index da2fb255b8aa3b815436154aab82a137b64974d6..da3ddf836d0e0f8991ef53b27813e6b606d70ee9 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -1935,6 +1935,19 @@ mips_force_temporary (rtx dest, rtx value)
 }
 
 
+/* Return an instruction that copies $gp into register REG.  We want
+   GCC to treat the register's value as constant, so that its value
+   can be rematerialized on demand.  */
+
+static rtx
+gen_load_const_gp (rtx reg)
+{
+  return (Pmode == SImode
+         ? gen_load_const_gp_si (reg)
+         : gen_load_const_gp_di (reg));
+}
+
+
 /* Return a LO_SUM expression for ADDR.  TEMP is as for mips_force_temporary
    and is used to load the high part into a register.  */
 
@@ -1943,10 +1956,15 @@ mips_split_symbol (rtx temp, rtx addr)
 {
   rtx high;
 
-  if (TARGET_MIPS16)
-    high = mips16_gp_pseudo_reg ();
-  else
+  if (!TARGET_MIPS16)
     high = mips_force_temporary (temp, gen_rtx_HIGH (Pmode, copy_rtx (addr)));
+  else if (no_new_pseudos)
+    {
+      emit_insn (gen_load_const_gp (copy_rtx (temp)));
+      high = temp;
+    }
+  else
+    high = mips16_gp_pseudo_reg ();
   return gen_rtx_LO_SUM (Pmode, high, addr);
 }
 
@@ -7882,19 +7900,11 @@ mips16_gp_pseudo_reg (void)
 {
   if (cfun->machine->mips16_gp_pseudo_rtx == NULL_RTX)
     {
-      rtx unspec;
       rtx insn, scan;
 
       cfun->machine->mips16_gp_pseudo_rtx = gen_reg_rtx (Pmode);
 
-      /* We want to initialize this to a value which gcc will believe
-         is constant.  */
-      start_sequence ();
-      unspec = gen_rtx_UNSPEC (VOIDmode, gen_rtvec (1, const0_rtx), UNSPEC_GP);
-      emit_move_insn (cfun->machine->mips16_gp_pseudo_rtx,
-                     gen_rtx_CONST (Pmode, unspec));
-      insn = get_insns ();
-      end_sequence ();
+      insn = gen_load_const_gp (cfun->machine->mips16_gp_pseudo_rtx);
 
       push_topmost_sequence ();
       /* We need to emit the initialization after the FUNCTION_BEG

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index ccb75cbf3127a5ddf88ab6199759b2846f1352c5..af62a3399ac9b92c85aba4875e8ce27ca047fe7f 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -4001,6 +4001,11 @@
   [(set_attr "type"    "xfer,fpstore")
    (set_attr "mode"    "SF")])
 
+;; Move a constant that satisfies CONST_GP_P into operand 0.
+(define_expand "load_const_gp_<mode>"
+  [(set (match_operand:P 0 "register_operand" "=d")
+       (const:P (unspec:P [(const_int 0)] UNSPEC_GP)))])
+
 ;; Insn to initialize $gp for n32/n64 abicalls.  Operand 0 is the offset
 ;; of _gp from the start of this function.  Operand 1 is the incoming
 ;; function address.