+2016-01-29 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/69459
+ * config/i386/constraints.md (C): Only accept constant zero operand.
+ (BC): New constraint.
+ * config/i386/sse.md (*mov<mode>_internal): Use BC constraint
+ instead of C constraint.
+ * doc/md.texi (Machine Constraints): Update description
+ of C constraint.
+
2016-01-26 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/69110
2015-12-25 Andreas Tobler <andreast@gcc.gnu.org>
Backport from mainline
- 2015-12-25 Andreas Tobler <andreast@gcc.gnu.org>
+ 2015-12-25 Andreas Tobler <andreast@gcc.gnu.org>
* config/rs6000/freebsd64.h: Delete FREEBSD_DYNAMIC_LINKER32/64
defines. Use FBSD_DYNAMIC_LINKER instead.
* tree-sra.c (replace_removed_params_ssa_names): Do not distinguish
between types of statements but accept original definitions as a
parameter.
- (ipa_sra_modify_function_body): Use FOR_EACH_SSA_DEF_OPERAND to
- iterate over definitions.
+ (ipa_sra_modify_function_body): Use FOR_EACH_SSA_DEF_OPERAND to
+ iterate over definitions.
2015-10-27 Caroline Tice <cmtice@google.com>
2015-07-01 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Backport from mainline
- 2015-06-24 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+ 2015-06-24 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
PR target/63408
* config/arm/arm.c (vfp3_const_double_for_fract_bits): Disable
Backport from mainline r212178.
2014-06-30 Joseph Myers <joseph@codesourcery.com>
- * var-tracking.c (add_stores): Return instead of asserting if old
- and new values for conditional store are the same.
+ * var-tracking.c (add_stores): Return instead of asserting if old
+ and new values for conditional store are the same.
2015-06-23 Ludovic Courtès <ludo@gnu.org>
;; <http://www.gnu.org/licenses/>.
;;; Unused letters:
-;;; B H
+;;; H
;;; h j
;; Integer register constraints.
(and (not (match_test "TARGET_X32"))
(match_operand 0 "memory_operand")))
+(define_constraint "BC"
+ "@internal SSE constant operand."
+ (match_test "standard_sse_constant_p (op)"))
+
;; Integer constant constraints.
(define_constraint "I"
"Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
;; This can theoretically be any mode's CONST0_RTX.
(define_constraint "C"
- "Standard SSE floating point constant."
- (match_test "standard_sse_constant_p (op)"))
+ "SSE constant zero operand."
+ (match_test "standard_sse_constant_p (op) == 1"))
;; Constant-or-symbol-reference constraints.
(define_insn "*mov<mode>_internal"
[(set (match_operand:VMOVE 0 "nonimmediate_operand" "=v,v ,m")
- (match_operand:VMOVE 1 "nonimmediate_or_sse_const_operand" "C ,vm,v"))]
+ (match_operand:VMOVE 1 "nonimmediate_or_sse_const_operand" "BC,vm,v"))]
"TARGET_SSE
&& (register_operand (operands[0], <MODE>mode)
|| register_operand (operands[1], <MODE>mode))"
Standard 80387 floating point constant.
@item C
-Standard SSE floating point constant.
+SSE constant zero operand.
@item e
32-bit signed integer constant, or a symbolic reference known
+2016-01-29 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/69459
+ * gcc.target/i386/pr69459.c: New test.
+
2016-01-27 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.dg/and-1.c: Remove nand test for powerpc*-*-*.
--- /dev/null
+/* PR target/69549 */
+/* { dg-do run { target sse2_runtime } } */
+/* { dg-options "-O2 -msse2" } */
+
+typedef unsigned char u8;
+typedef unsigned short u16;
+typedef unsigned int u32;
+typedef unsigned long long u64;
+typedef unsigned char v16u8 __attribute__ ((vector_size (16)));
+typedef unsigned short v16u16 __attribute__ ((vector_size (16)));
+typedef unsigned int v16u32 __attribute__ ((vector_size (16)));
+typedef unsigned long long v16u64 __attribute__ ((vector_size (16)));
+
+u64 __attribute__((noinline, noclone))
+foo (u8 u8_0, u16 u16_3, v16u8 v16u8_0, v16u16 v16u16_0, v16u32 v16u32_0, v16u64 v16u64_0, v16u8 v16u8_1, v16u16 v16u16_1, v16u32 v16u32_1, v16u64 v16u64_1, v16u8 v16u8_2, v16u16 v16u16_2, v16u32 v16u32_2, v16u64 v16u64_2, v16u8 v16u8_3, v16u16 v16u16_3, v16u32 v16u32_3, v16u64 v16u64_3)
+{
+ v16u64_0 /= (v16u64){u16_3, ((0))} | 1;
+ v16u64_1 += (v16u64)~v16u32_0;
+ v16u16_1 /= (v16u16){-v16u64_3[1]} | 1;
+ v16u64_3[1] -= 0x1fffffff;
+ v16u32_2 /= (v16u32)-v16u64_0 | 1;
+ v16u32_1 += ~v16u32_1;
+ v16u16_3 %= (v16u16){0xfff, v16u32_2[3], v16u8_0[14]} | 1;
+ v16u64_3 -= (v16u64)v16u32_2;
+ if (v16u64_1[1] >= 1) {
+ v16u64_0 %= (v16u64){v16u32_0[1]} | 1;
+ v16u32_1[1] %= 0x5fb856;
+ v16u64_1 |= -v16u64_0;
+ }
+ v16u8_0 *= (v16u8)v16u32_1;
+ return u8_0 + v16u8_0 [12] + v16u8_0 [13] + v16u8_0 [14] + v16u8_0 [15] + v16u16_0 [0] + v16u16_0 [1] + v16u32_0 [0] + v16u32_0 [1] + v16u32_0 [2] + v16u32_0 [3] + v16u64_0 [0] + v16u64_0 [1] + v16u8_1 [9] + v16u8_1 [10] + v16u8_1 [11] + v16u8_1 [15] + v16u16_1 [0] + v16u16_1 [1] + v16u16_1 [3] + v16u64_1 [0] + v16u64_1 [1] + v16u8_2 [3] + v16u8_2 [4] + v16u8_2 [5] + v16u8_2 [0] + v16u32_2 [1] + v16u32_2 [2] + v16u32_2 [3] + v16u64_2 [0] + v16u64_2 [1] + v16u8_3 [0] + v16u16_3 [6] + v16u16_3[7] + v16u32_3[1] + v16u32_3[2] + v16u64_3[0] + v16u64_3[1];
+}
+
+int
+main ()
+{
+ u64 x = foo(1, 1, (v16u8){1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}, (v16u16){1, 1}, (v16u32){1}, (v16u64){1}, (v16u8){1}, (v16u16){1, 1}, (v16u32){1}, (v16u64){1}, (v16u8){1, 1, 1, 1, 1}, (v16u16){1}, (v16u32){1}, (v16u64){1}, (v16u8){1}, (v16u16){1}, (v16u32){1}, (v16u64){1});
+
+ if (x != 0xffffffffe0000209)
+ __builtin_abort();
+ return 0;
+}