#elif defined(VGA_amd64)
{ Bool have_sse3, have_cx8, have_cx16;
Bool have_lzcnt, have_avx /*, have_fma*/;
+ Bool have_rdtscp;
UInt eax, ebx, ecx, edx, max_extended;
HChar vstr[13];
vstr[0] = 0;
VG_(cpuid)(0x80000001, 0, &eax, &ebx, &ecx, &edx);
have_lzcnt = (ecx & (1<<5)) != 0; /* True => have LZCNT */
}
+ /* Can we do RDTSCP? */
+ have_rdtscp = False;
+ if (max_extended >= 0x80000001) {
+ VG_(cpuid)(0x80000001, 0, &eax, &ebx, &ecx, &edx);
+ have_rdtscp = (edx & (1<<27)) != 0; /* True => have RDTSVCP */
+ }
va = VexArchAMD64;
- vai.hwcaps = (have_sse3 ? VEX_HWCAPS_AMD64_SSE3 : 0)
- | (have_cx16 ? VEX_HWCAPS_AMD64_CX16 : 0)
- | (have_lzcnt ? VEX_HWCAPS_AMD64_LZCNT : 0)
- | (have_avx ? VEX_HWCAPS_AMD64_AVX : 0);
+ vai.hwcaps = (have_sse3 ? VEX_HWCAPS_AMD64_SSE3 : 0)
+ | (have_cx16 ? VEX_HWCAPS_AMD64_CX16 : 0)
+ | (have_lzcnt ? VEX_HWCAPS_AMD64_LZCNT : 0)
+ | (have_avx ? VEX_HWCAPS_AMD64_AVX : 0)
+ | (have_rdtscp ? VEX_HWCAPS_AMD64_RDTSCP : 0);
VG_(machine_get_cache_info)(&vai);