UInt shift = 0;
Bool ok = getLaneInfo_IMMH_IMMB(&shift, &size, immh, immb);
if (!ok) return False;
- vassert(size >= 0 && size <= 3);
+ vassert(size <= 3);
/* The shift encoding has opposite sign for the leftwards case.
Adjust shift to compensate. */
UInt lanebits = 8 << size;
Bool isQ = bitQ == 1;
Bool ok = getLaneInfo_IMMH_IMMB(&shift, &size, immh, immb);
if (!ok || (bitQ == 0 && size == X11)) return False;
- vassert(size >= 0 && size <= 3);
+ vassert(size <= 3);
UInt lanebits = 8 << size;
vassert(shift >= 1 && shift <= lanebits);
IRExpr* src = getQReg128(nn);
const HChar* iNames[4]
= { "aese", "aesd", "aesmc", "aesimc" };
- vassert(opc >= 0 && opc <= 3);
+ vassert(opc <= 3);
void* helper = helpers[opc];
const HChar* hname = hNames[opc];
acc_word[1] = 0xBAD;
acc_word[0] = 0xBEEF;
- vassert( (acc >= 0) && (acc < 8) );
- vassert( (reg >= 0) && (reg < 4) );
+ vassert(acc < 8);
+ vassert(reg < 4);
pU128_src = (U128*) (((UChar*)gst) + offset + acc*4*sizeof(U128)
+ reg*sizeof(U128));
IRDirty* d;
- vassert( (VSX_addr >= 0) && (VSX_addr < 64) );
+ vassert(VSX_addr < 64);
UInt reg_offset = offsetofPPCGuestState( guest_VSR0 )
+ sizeof(U128) * VSX_addr;
static void lookupIRTempPair ( HReg* vrHI, HReg* vrLO,
ISelEnv* env, IRTemp tmp )
{
- vassert(tmp >= 0);
vassert(tmp < env->n_vregmap);
vassert(! hregIsInvalid(env->vregmapHI[tmp]));
*vrLO = env->vregmap[tmp];
#define INVALID_RREG_NO ((Short)(-1))
#define IS_VALID_VREGNO(_zz) ((_zz) >= 0 && (_zz) < n_vregs)
+#define IS_VALID_UNSIGNED_VREGNO(_zz) ((_zz) < n_vregs)
#define IS_VALID_RREGNO(_zz) ((_zz) >= 0 && (_zz) < n_rregs)
/* Finally, we can do the coalescing. It's trivial -- merely
claim vregS's register for vregD. */
rreg_state[n].vreg = vregD;
- vassert(IS_VALID_VREGNO(hregIndex(vregD)));
- vassert(IS_VALID_VREGNO(hregIndex(vregS)));
+ vassert(IS_VALID_UNSIGNED_VREGNO(hregIndex(vregD)));
+ vassert(IS_VALID_UNSIGNED_VREGNO(hregIndex(vregS)));
vreg_state[hregIndex(vregD)] = toShort(n);
vreg_state[hregIndex(vregS)] = INVALID_RREG_NO;
if (rreg_state[j].disp != Bound)
continue;
UInt vregno = hregIndex(rreg_state[j].vreg);
- vassert(IS_VALID_VREGNO(vregno));
+ vassert(IS_VALID_UNSIGNED_VREGNO(vregno));
if (vreg_lrs[vregno].dead_before <= ii) {
rreg_state[j].disp = Free;
rreg_state[j].eq_spill_slot = False;
if (st->tag != Ist_WrTmp)
continue;
IRTemp t = st->Ist.WrTmp.tmp;
- vassert(t >= 0 && t < n_tmps);
+ vassert(t < n_tmps);
env[t] = st->Ist.WrTmp.data;
}
ULong img_szB = size;
ULong curr_off = 0;
while (1) {
- assert(curr_off >= 0 && curr_off <= img_szB);
+ assert(curr_off <= img_szB);
if (curr_off == img_szB) break;
ULong avail = img_szB - curr_off;
assert(avail > 0 && avail <= img_szB);
check_cache_or_override ("LL", LLc, DEFINED(clo_LLc));
// Then replace with any defined on the command line. (Already checked in
- // VG(parse_clo_cache_opt)().)
+ // VG(str_clo_cache_opt)().)
if (DEFINED(clo_I1c)) { *I1c = *clo_I1c; }
if (DEFINED(clo_D1c)) { *D1c = *clo_D1c; }
if (DEFINED(clo_LLc)) { *LLc = *clo_LLc; }
InstrInfo* next_InstrInfo ( ClgState* clgs, UInt instr_size )
{
InstrInfo* ii;
- tl_assert(clgs->ii_index >= 0);
tl_assert(clgs->ii_index < clgs->bb->instr_count);
ii = &clgs->bb->instr[ clgs->ii_index ];
sp = -1;
vg_assert(expr);
- vg_assert(exprszB >= 0);
limit = expr + exprszB;
/* Deal with the case where the entire expression is a single
if (!img->ces[i]->fromC)
break;
}
- vg_assert(i >= 0 && i < CACHE_N_ENTRIES);
+ vg_assert(i < CACHE_N_ENTRIES);
realloc_CEnt(img, i, size, /*fromC?*/cslc != NULL);
img->ces[i]->size = size;
vg_assert(is_in_CEnt(ce, offset));
SizeT nToCopy = size - 1;
SizeT nAvail = (SizeT)(ce->used - (offset + 1 - ce->off));
- vg_assert(nAvail >= 0 && nAvail <= ce->used-1);
+ vg_assert(nAvail <= ce->used-1);
if (nAvail < nToCopy) nToCopy = nAvail;
VG_(memcpy)(&dstU[1], &ce->data[offset + 1 - ce->off], nToCopy);
return nToCopy + 1;
/* Resize the hash table, maybe? */
if ( ((ULong)ec_totstored) > ((ULong)ec_htab_size) ) {
- vg_assert(ec_htab_size_idx >= 0 && ec_htab_size_idx < N_EC_PRIMES);
+ vg_assert(ec_htab_size_idx < N_EC_PRIMES);
if (ec_htab_size_idx < N_EC_PRIMES-1)
resize_ec_htab();
}
if (sector_search_order[ix] == sno)
break;
}
- vg_assert(ix >= 0 && ix < n_sectors);
+ vg_assert(ix < n_sectors);
if (VG_(clo_verbosity) > 2)
VG_(message)(Vg_DebugMsg, "TT/TC: recycle sector %d\n", sno);
/* sec and secNo are mutually redundant; cross-check. */
vg_assert(sec == §ors[secNo]);
- vg_assert(tteno >= 0 && tteno < N_TTES_PER_SECTOR);
+ vg_assert(tteno < N_TTES_PER_SECTOR);
TTEntryC* tteC = &sec->ttC[tteno];
TTEntryH* tteH = &sec->ttH[tteno];
vg_assert(tteH->status == InUse);
TTEno tteno;
SizeT numDeld = 0;
- vg_assert(ec >= 0 && ec < ECLASS_N);
+ vg_assert(ec < ECLASS_N);
for (i = 0; i < sec->ec2tte_used[ec]; i++) {
ThreadId tid;
tl_assert(HG_(is_sane_Thread)(thr));
/* Check nobody used the invalid-threadid slot */
- tl_assert(VG_INVALID_THREADID >= 0 && VG_INVALID_THREADID < VG_N_THREADS);
+ tl_assert(VG_INVALID_THREADID < VG_N_THREADS);
tl_assert(map_threads[VG_INVALID_THREADID] == NULL);
tid = thr->coretid;
tl_assert(HG_(is_sane_ThreadId)(tid));
WCache* _cache = &(_zzcache); \
tl_assert(_cache->dynMax >= 1); \
tl_assert(_cache->dynMax <= N_WCACHE_STAT_MAX); \
- tl_assert(_cache->inUse >= 0); \
tl_assert(_cache->inUse <= _cache->dynMax); \
if (_cache->inUse < _cache->dynMax) \
_cache->inUse++; \
}
/* So w is present in ws, and the new set will be one element
smaller. */
- tl_assert(i >= 0 && i < wv->size);
+ tl_assert(i < wv->size);
tl_assert(wv->size > 0);
wv_new = new_WV_of_size( wsu, wv->size - 1 );
inline
static void write_twobit_array ( UChar* arr, UWord ix, UWord b2 ) {
Word bix, shft, mask, prep;
- tl_assert(ix >= 0);
bix = ix >> 2;
shft = 2 * (ix & 3); /* 0, 2, 4 or 6 */
mask = 3 << shft;
inline
static UWord read_twobit_array ( UChar* arr, UWord ix ) {
Word bix, shft;
- tl_assert(ix >= 0);
bix = ix >> 2;
shft = 2 * (ix & 3); /* 0, 2, 4 or 6 */
return (arr[bix] >> shft) & 3;
copy it to the output but increment its timestamp value.
Then copy the remaining entries. (c) is the common case.
*/
- tl_assert(i >= 0 && i <= n);
+ tl_assert(i <= n);
if (i == n) { /* case (a) */
UInt hi = out->usedTS++;
out->ts[hi].thrid = me_thrid;
//// Set the origins for a+0 .. a+7
{ OCacheLine* line;
UWord lineoff = oc_line_offset(a);
- tl_assert(lineoff >= 0
- && lineoff < OC_W32S_PER_LINE -1/*'cos 8-aligned*/);
+ tl_assert(lineoff < OC_W32S_PER_LINE -1/*'cos 8-aligned*/);
line = find_OCacheLine( a );
line->u.main.descr[lineoff+0] = 0xF;
line->u.main.descr[lineoff+1] = 0xF;
(cgbs[arg[2]].start == 0 && cgbs[arg[2]].size == 0)) {
*ret = 1;
} else {
- tl_assert(arg[2] >= 0 && arg[2] < cgb_used);
+ tl_assert(arg[2] < cgb_used);
cgbs[arg[2]].start = cgbs[arg[2]].size = 0;
VG_(free)(cgbs[arg[2]].desc);
cgb_discards++;