[S_BROADCAST_CTRL] = 0x06,
[S_MULTICAST_CTRL] = 0x04,
[PTP_CLK_CTRL] = 0x0600,
+ [PTP_RTC_NANOSEC] = 0x0604,
};
static const u32 ksz8463_masks[] = {
[REG_PORT_PME_STATUS] = 0x0013,
[REG_PORT_PME_CTRL] = 0x0017,
[PTP_CLK_CTRL] = 0x0500,
+ [PTP_RTC_NANOSEC] = 0x0504,
};
static const u32 ksz9477_masks[] = {
if (ret)
return ret;
- ret = ksz_read32(dev, REG_PTP_RTC_NANOSEC, &nanoseconds);
+ ret = ksz_read32(dev, regs[PTP_RTC_NANOSEC], &nanoseconds);
if (ret)
return ret;
if (ret)
goto unlock;
- ret = ksz_write32(dev, REG_PTP_RTC_NANOSEC, ts->tv_nsec);
+ ret = ksz_write32(dev, regs[PTP_RTC_NANOSEC], ts->tv_nsec);
if (ret)
goto unlock;
*/
sec = div_s64_rem(delta, NSEC_PER_SEC, &nsec);
- ret = ksz_write32(dev, REG_PTP_RTC_NANOSEC, abs(nsec));
+ ret = ksz_write32(dev, regs[PTP_RTC_NANOSEC], abs(nsec));
if (ret)
goto unlock;
#define PTP_RTC_SUB_NANOSEC_M 0x0007
#define PTP_RTC_0NS 0x00
-#define REG_PTP_RTC_NANOSEC 0x0504
-
#define REG_PTP_RTC_SEC 0x0508
#define REG_PTP_SUBNANOSEC_RATE 0x050C