ret
-/* Bit test and set/reset/complement. Sets flags.
- On entry:
- src
- dst
- RA <- %esp
-
- NOTE all these are basically misimplemented, since for memory
- operands it appears the index value can be arbitrary, and the
- address should be calculated accordingly. Here, we assume (by
- forcing the register- and memory- versions to be handled by
- the same helper) that the offset is always in the range
- 0 .. word-size-1, or to be more precise by implementing the
- client's memory- version of this using the register- version,
- we impose the condition that the offset is used
- modulo-wordsize. This is just plain wrong and should be
- fixed.
-*/
-.global VG_(helper_bt)
-VG_(helper_bt):
- pushl %eax
- movl 12(%esp), %eax
- btl %eax, 8(%esp)
- popl %eax
- ret
-.global VG_(helper_bts)
-VG_(helper_bts):
- pushl %eax
- movl 12(%esp), %eax
- btsl %eax, 8(%esp)
- popl %eax
- ret
-.global VG_(helper_btr)
-VG_(helper_btr):
- pushl %eax
- movl 12(%esp), %eax
- btrl %eax, 8(%esp)
- popl %eax
- ret
-.global VG_(helper_btc)
-VG_(helper_btc):
- pushl %eax
- movl 12(%esp), %eax
- btcl %eax, 8(%esp)
- popl %eax
- ret
-
-
/* 32-bit double-length shift left/right.
On entry:
amount
extern void VG_(helper_RDTSC);
extern void VG_(helper_CPUID);
-extern void VG_(helper_bt);
-extern void VG_(helper_bts);
-extern void VG_(helper_btr);
-extern void VG_(helper_btc);
-
extern void VG_(helper_bsf);
extern void VG_(helper_bsr);
extern Int VGOFF_(helper_RDTSC);
extern Int VGOFF_(helper_CPUID);
-extern Int VGOFF_(helper_bt);
-extern Int VGOFF_(helper_bts);
-extern Int VGOFF_(helper_btr);
-extern Int VGOFF_(helper_btc);
-
extern Int VGOFF_(helper_bsf);
extern Int VGOFF_(helper_bsr);
Int VGOFF_(helper_RDTSC) = INVALID_OFFSET;
Int VGOFF_(helper_CPUID) = INVALID_OFFSET;
Int VGOFF_(helper_BSWAP) = INVALID_OFFSET;
-Int VGOFF_(helper_bt) = INVALID_OFFSET;
-Int VGOFF_(helper_bts) = INVALID_OFFSET;
-Int VGOFF_(helper_btr) = INVALID_OFFSET;
-Int VGOFF_(helper_btc) = INVALID_OFFSET;
Int VGOFF_(helper_bsf) = INVALID_OFFSET;
Int VGOFF_(helper_bsr) = INVALID_OFFSET;
Int VGOFF_(helper_fstsw_AX) = INVALID_OFFSET;
VGOFF_(helper_CPUID)
= alloc_BaB_1_set( (Addr) & VG_(helper_CPUID) );
- VGOFF_(helper_bt)
- = alloc_BaB_1_set( (Addr) & VG_(helper_bt) );
- VGOFF_(helper_bts)
- = alloc_BaB_1_set( (Addr) & VG_(helper_bts) );
- VGOFF_(helper_btr)
- = alloc_BaB_1_set( (Addr) & VG_(helper_btr) );
- VGOFF_(helper_btc)
- = alloc_BaB_1_set( (Addr) & VG_(helper_btc) );
-
VGOFF_(helper_bsf)
= alloc_BaB_1_set( (Addr) & VG_(helper_bsf) );
VGOFF_(helper_bsr)
}
-
+#if 0
/* Group 8 extended opcodes. */
static
Addr dis_Grp8 ( UCodeBlock* cb, Addr eip, UChar modrm,
uInstr0(cb, CALLM_E, 0);
return eip;
}
-
+#endif
}
}
-#if 0
-static
-Addr dis_bt_G_E ( UCodeBlock* cb, Int sz, Addr eip, BtOp op )
-{
- Int t, t2, ta, helper;
- UInt pair;
- UChar dis_buf[50];
- UChar modrm;
-
- vg_assert(sz == 2 || sz == 4);
- vg_assert(sz == 4);
- switch (op) {
- case BtOpNone: helper = VGOFF_(helper_bt); break;
- case BtOpSet: helper = VGOFF_(helper_bts); break;
- case BtOpReset: helper = VGOFF_(helper_btr); break;
- case BtOpComp: helper = VGOFF_(helper_btc); break;
- default: VG_(panic)("dis_bt_G_E");
- }
-
- modrm = getUChar(eip);
-
- t = newTemp(cb);
- t2 = newTemp(cb);
- uInstr0(cb, CALLM_S, 0);
- uInstr2(cb, GET, sz, ArchReg, gregOfRM(modrm), TempReg, t);
- uInstr1(cb, PUSH, sz, TempReg, t);
-
- if (epartIsReg(modrm)) {
- eip++;
- uInstr2(cb, GET, sz, ArchReg, eregOfRM(modrm), TempReg, t2);
- uInstr1(cb, PUSH, sz, TempReg, t2);
- uInstr1(cb, CALLM, 0, Lit16, helper);
- uFlagsRWU(cb, FlagsEmpty, FlagC, FlagsOSZAP);
- uInstr1(cb, POP, sz, TempReg, t);
- uInstr2(cb, PUT, sz, TempReg, t, ArchReg, eregOfRM(modrm));
- if (dis)
- VG_(printf)("bt%s%c %s, %s\n",
- nameBtOp(op),
- nameISize(sz), nameIReg(sz, gregOfRM(modrm)),
- nameIReg(sz, eregOfRM(modrm)));
- } else {
- pair = disAMode ( cb, eip, dis?dis_buf:NULL );
- ta = LOW24(pair);
- eip += HI8(pair);
- uInstr2(cb, LOAD, sz, TempReg, ta, TempReg, t2);
- uInstr1(cb, PUSH, sz, TempReg, t2);
- uInstr1(cb, CALLM, 0, Lit16, helper);
- uFlagsRWU(cb, FlagsEmpty, FlagC, FlagsOSZAP);
- uInstr1(cb, POP, sz, TempReg, t);
- uInstr2(cb, STORE, sz, TempReg, t, TempReg, ta);
- SMC_IF_ALL(cb);
- if (dis)
- VG_(printf)("bt%s%c %s, %s\n",
- nameBtOp(op),
- nameISize(sz), nameIReg(sz, gregOfRM(modrm)),
- dis_buf);
- }
-
- uInstr1(cb, CLEAR, 0, Lit16, 4);
- uInstr0(cb, CALLM_E, 0);
-
- return eip;
-}
-#endif
-
static
Addr dis_bt_G_E ( UCodeBlock* cb, Int sz, Addr eip, BtOp op )
/* =-=-=-=-=-=-=-=-=- Grp8 =-=-=-=-=-=-=-=-=-=-=-= */
+#if 0
case 0xBA: /* Grp8 Ib,Ev */
modrm = getUChar(eip);
am_sz = lengthAMode(eip);
d32 = getSDisp8(eip + am_sz);
eip = dis_Grp8 ( cb, eip, modrm, am_sz, sz, d32 );
break;
-
+#endif
/* =-=-=-=-=-=-=-=-=- BSF/BSR -=-=-=-=-=-=-=-=-=-= */
case 0xBC: /* BSF Gv,Ev */
ret
-/* Bit test and set/reset/complement. Sets flags.
- On entry:
- src
- dst
- RA <- %esp
-
- NOTE all these are basically misimplemented, since for memory
- operands it appears the index value can be arbitrary, and the
- address should be calculated accordingly. Here, we assume (by
- forcing the register- and memory- versions to be handled by
- the same helper) that the offset is always in the range
- 0 .. word-size-1, or to be more precise by implementing the
- client's memory- version of this using the register- version,
- we impose the condition that the offset is used
- modulo-wordsize. This is just plain wrong and should be
- fixed.
-*/
-.global VG_(helper_bt)
-VG_(helper_bt):
- pushl %eax
- movl 12(%esp), %eax
- btl %eax, 8(%esp)
- popl %eax
- ret
-.global VG_(helper_bts)
-VG_(helper_bts):
- pushl %eax
- movl 12(%esp), %eax
- btsl %eax, 8(%esp)
- popl %eax
- ret
-.global VG_(helper_btr)
-VG_(helper_btr):
- pushl %eax
- movl 12(%esp), %eax
- btrl %eax, 8(%esp)
- popl %eax
- ret
-.global VG_(helper_btc)
-VG_(helper_btc):
- pushl %eax
- movl 12(%esp), %eax
- btcl %eax, 8(%esp)
- popl %eax
- ret
-
-
/* 32-bit double-length shift left/right.
On entry:
amount
extern void VG_(helper_RDTSC);
extern void VG_(helper_CPUID);
-extern void VG_(helper_bt);
-extern void VG_(helper_bts);
-extern void VG_(helper_btr);
-extern void VG_(helper_btc);
-
extern void VG_(helper_bsf);
extern void VG_(helper_bsr);
extern Int VGOFF_(helper_RDTSC);
extern Int VGOFF_(helper_CPUID);
-extern Int VGOFF_(helper_bt);
-extern Int VGOFF_(helper_bts);
-extern Int VGOFF_(helper_btr);
-extern Int VGOFF_(helper_btc);
-
extern Int VGOFF_(helper_bsf);
extern Int VGOFF_(helper_bsr);
Int VGOFF_(helper_RDTSC) = INVALID_OFFSET;
Int VGOFF_(helper_CPUID) = INVALID_OFFSET;
Int VGOFF_(helper_BSWAP) = INVALID_OFFSET;
-Int VGOFF_(helper_bt) = INVALID_OFFSET;
-Int VGOFF_(helper_bts) = INVALID_OFFSET;
-Int VGOFF_(helper_btr) = INVALID_OFFSET;
-Int VGOFF_(helper_btc) = INVALID_OFFSET;
Int VGOFF_(helper_bsf) = INVALID_OFFSET;
Int VGOFF_(helper_bsr) = INVALID_OFFSET;
Int VGOFF_(helper_fstsw_AX) = INVALID_OFFSET;
VGOFF_(helper_CPUID)
= alloc_BaB_1_set( (Addr) & VG_(helper_CPUID) );
- VGOFF_(helper_bt)
- = alloc_BaB_1_set( (Addr) & VG_(helper_bt) );
- VGOFF_(helper_bts)
- = alloc_BaB_1_set( (Addr) & VG_(helper_bts) );
- VGOFF_(helper_btr)
- = alloc_BaB_1_set( (Addr) & VG_(helper_btr) );
- VGOFF_(helper_btc)
- = alloc_BaB_1_set( (Addr) & VG_(helper_btc) );
-
VGOFF_(helper_bsf)
= alloc_BaB_1_set( (Addr) & VG_(helper_bsf) );
VGOFF_(helper_bsr)
}
-
+#if 0
/* Group 8 extended opcodes. */
static
Addr dis_Grp8 ( UCodeBlock* cb, Addr eip, UChar modrm,
uInstr0(cb, CALLM_E, 0);
return eip;
}
-
+#endif
}
}
-#if 0
-static
-Addr dis_bt_G_E ( UCodeBlock* cb, Int sz, Addr eip, BtOp op )
-{
- Int t, t2, ta, helper;
- UInt pair;
- UChar dis_buf[50];
- UChar modrm;
-
- vg_assert(sz == 2 || sz == 4);
- vg_assert(sz == 4);
- switch (op) {
- case BtOpNone: helper = VGOFF_(helper_bt); break;
- case BtOpSet: helper = VGOFF_(helper_bts); break;
- case BtOpReset: helper = VGOFF_(helper_btr); break;
- case BtOpComp: helper = VGOFF_(helper_btc); break;
- default: VG_(panic)("dis_bt_G_E");
- }
-
- modrm = getUChar(eip);
-
- t = newTemp(cb);
- t2 = newTemp(cb);
- uInstr0(cb, CALLM_S, 0);
- uInstr2(cb, GET, sz, ArchReg, gregOfRM(modrm), TempReg, t);
- uInstr1(cb, PUSH, sz, TempReg, t);
-
- if (epartIsReg(modrm)) {
- eip++;
- uInstr2(cb, GET, sz, ArchReg, eregOfRM(modrm), TempReg, t2);
- uInstr1(cb, PUSH, sz, TempReg, t2);
- uInstr1(cb, CALLM, 0, Lit16, helper);
- uFlagsRWU(cb, FlagsEmpty, FlagC, FlagsOSZAP);
- uInstr1(cb, POP, sz, TempReg, t);
- uInstr2(cb, PUT, sz, TempReg, t, ArchReg, eregOfRM(modrm));
- if (dis)
- VG_(printf)("bt%s%c %s, %s\n",
- nameBtOp(op),
- nameISize(sz), nameIReg(sz, gregOfRM(modrm)),
- nameIReg(sz, eregOfRM(modrm)));
- } else {
- pair = disAMode ( cb, eip, dis?dis_buf:NULL );
- ta = LOW24(pair);
- eip += HI8(pair);
- uInstr2(cb, LOAD, sz, TempReg, ta, TempReg, t2);
- uInstr1(cb, PUSH, sz, TempReg, t2);
- uInstr1(cb, CALLM, 0, Lit16, helper);
- uFlagsRWU(cb, FlagsEmpty, FlagC, FlagsOSZAP);
- uInstr1(cb, POP, sz, TempReg, t);
- uInstr2(cb, STORE, sz, TempReg, t, TempReg, ta);
- SMC_IF_ALL(cb);
- if (dis)
- VG_(printf)("bt%s%c %s, %s\n",
- nameBtOp(op),
- nameISize(sz), nameIReg(sz, gregOfRM(modrm)),
- dis_buf);
- }
-
- uInstr1(cb, CLEAR, 0, Lit16, 4);
- uInstr0(cb, CALLM_E, 0);
-
- return eip;
-}
-#endif
-
static
Addr dis_bt_G_E ( UCodeBlock* cb, Int sz, Addr eip, BtOp op )
/* =-=-=-=-=-=-=-=-=- Grp8 =-=-=-=-=-=-=-=-=-=-=-= */
+#if 0
case 0xBA: /* Grp8 Ib,Ev */
modrm = getUChar(eip);
am_sz = lengthAMode(eip);
d32 = getSDisp8(eip + am_sz);
eip = dis_Grp8 ( cb, eip, modrm, am_sz, sz, d32 );
break;
-
+#endif
/* =-=-=-=-=-=-=-=-=- BSF/BSR -=-=-=-=-=-=-=-=-=-= */
case 0xBC: /* BSF Gv,Ev */