]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
net: qed: Disable aRFS for NPAR and 100G
authorDmitry Bogdanov <dbogdanov@marvell.com>
Wed, 9 Sep 2020 17:43:08 +0000 (20:43 +0300)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 1 Oct 2020 15:36:27 +0000 (17:36 +0200)
[ Upstream commit 2d2fe8433796603091ac8ea235b9165ac5a85f9a ]

In CMT and NPAR the PF is unknown when the GFS block processes the
packet. Therefore cannot use searcher as it has a per PF database,
and thus ARFS must be disabled.

Fixes: d51e4af5c209 ("qed: aRFS infrastructure support")
Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Michal Kalderon <michal.kalderon@marvell.com>
Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/net/ethernet/qlogic/qed/qed_dev.c
drivers/net/ethernet/qlogic/qed/qed_l2.c
drivers/net/ethernet/qlogic/qed/qed_main.c
include/linux/qed/qed_if.h

index dbdac983ccde55aac270ed8dae95edbd1cb0d77c..105d9afe825f1e6696412eef0a2df08ded6dc595 100644 (file)
@@ -4191,7 +4191,8 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
                        cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) |
                                        BIT(QED_MF_LLH_PROTO_CLSS) |
                                        BIT(QED_MF_LL2_NON_UNICAST) |
-                                       BIT(QED_MF_INTER_PF_SWITCH);
+                                       BIT(QED_MF_INTER_PF_SWITCH) |
+                                       BIT(QED_MF_DISABLE_ARFS);
                        break;
                case NVM_CFG1_GLOB_MF_MODE_DEFAULT:
                        cdev->mf_bits = BIT(QED_MF_LLH_MAC_CLSS) |
@@ -4204,6 +4205,14 @@ static int qed_hw_get_nvm_info(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
 
                DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n",
                        cdev->mf_bits);
+
+               /* In CMT the PF is unknown when the GFS block processes the
+                * packet. Therefore cannot use searcher as it has a per PF
+                * database, and thus ARFS must be disabled.
+                *
+                */
+               if (QED_IS_CMT(cdev))
+                       cdev->mf_bits |= BIT(QED_MF_DISABLE_ARFS);
        }
 
        DP_INFO(p_hwfn, "Multi function mode is 0x%lx\n",
index 29810a1aa21060b4eb4059228f78225c50a6bdde..b2cd153321720bca1a83fdfcf6567dde6b4ed19c 100644 (file)
@@ -2001,6 +2001,9 @@ void qed_arfs_mode_configure(struct qed_hwfn *p_hwfn,
                             struct qed_ptt *p_ptt,
                             struct qed_arfs_config_params *p_cfg_params)
 {
+       if (test_bit(QED_MF_DISABLE_ARFS, &p_hwfn->cdev->mf_bits))
+               return;
+
        if (p_cfg_params->mode != QED_FILTER_CONFIG_MODE_DISABLE) {
                qed_gft_config(p_hwfn, p_ptt, p_hwfn->rel_pf_id,
                               p_cfg_params->tcp,
index 11367a248d55efbc6e402f60f81968211141ca0d..05eff348b22a86ab32e18aed50f190e1d7a4fde0 100644 (file)
@@ -289,6 +289,8 @@ int qed_fill_dev_info(struct qed_dev *cdev,
                dev_info->fw_eng = FW_ENGINEERING_VERSION;
                dev_info->b_inter_pf_switch = test_bit(QED_MF_INTER_PF_SWITCH,
                                                       &cdev->mf_bits);
+               if (!test_bit(QED_MF_DISABLE_ARFS, &cdev->mf_bits))
+                       dev_info->b_arfs_capable = true;
                dev_info->tx_switching = true;
 
                if (hw_info->b_wol_support == QED_WOL_SUPPORT_PME)
index 8cb76405cbce1e4530e7a66d01ad8eded6e3bf51..78ba1dc54fd577b592545f5b08c61e481752a71c 100644 (file)
@@ -648,6 +648,7 @@ struct qed_dev_info {
 #define QED_MFW_VERSION_3_OFFSET       24
 
        u32             flash_size;
+       bool            b_arfs_capable;
        bool            b_inter_pf_switch;
        bool            tx_switching;
        bool            rdma_supported;