if (!crtc_state->vrr.enable)
return;
- intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder),
+ intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder),
TRANS_PUSH_EN | TRANS_PUSH_SEND);
}
if (!crtc_state->vrr.enable)
return false;
- return intel_de_read(dev_priv, TRANS_PUSH(cpu_transcoder)) & TRANS_PUSH_SEND;
+ return intel_de_read(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder)) & TRANS_PUSH_SEND;
}
void intel_vrr_enable(const struct intel_crtc_state *crtc_state)
if (!crtc_state->vrr.enable)
return;
- intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), TRANS_PUSH_EN);
+ intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder),
+ TRANS_PUSH_EN);
if (HAS_AS_SDP(dev_priv))
intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder),
intel_de_wait_for_clear(dev_priv,
TRANS_VRR_STATUS(dev_priv, cpu_transcoder),
VRR_STATUS_VRR_EN_LIVE, 1000);
- intel_de_write(dev_priv, TRANS_PUSH(cpu_transcoder), 0);
+ intel_de_write(dev_priv, TRANS_PUSH(dev_priv, cpu_transcoder), 0);
if (HAS_AS_SDP(dev_priv))
intel_de_write(dev_priv, TRANS_VRR_VSYNC(cpu_transcoder), 0);
#define _TRANS_PUSH_B 0x61A70
#define _TRANS_PUSH_C 0x62A70
#define _TRANS_PUSH_D 0x63A70
-#define TRANS_PUSH(trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_PUSH_A)
+#define TRANS_PUSH(dev_priv, trans) _MMIO_TRANS2(dev_priv, trans, _TRANS_PUSH_A)
#define TRANS_PUSH_EN REG_BIT(31)
#define TRANS_PUSH_SEND REG_BIT(30)