serial: imx: Fix clearing of receiver overrun flag

[ Upstream commit 91555ce9012557b2d621d7b0b6ec694218a2a9bc ]

The writeable bits in the USR2 register are all "write 1 to
clear" so only write the bits that actually should be cleared.

Fixes: f1f836e4209e ("serial: imx: Add Rx Fifo overrun error message")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sasha.levin@oracle.com>

diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index 7c91f2fd880b6ddad60636749a0dba60c68c3858..369e18d9ab48fc55918e7b756d8f5e9a26eecb20 100644 (file)
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -764,7 +764,7 @@ static irqreturn_t imx_int(int irq, void *dev_id)
        if (sts2 & USR2_ORE) {
                dev_err(sport->port.dev, "Rx FIFO overrun\n");
                sport->port.icount.overrun++;
-               writel(sts2 | USR2_ORE, sport->port.membase + USR2);
+               writel(USR2_ORE, sport->port.membase + USR2);
        }
 
        return IRQ_HANDLED;
@@ -1134,10 +1134,12 @@ static int imx_startup(struct uart_port *port)
        }
 
        spin_lock_irqsave(&sport->port.lock, flags);
+
        /*
         * Finally, clear and enable interrupts
         */
        writel(USR1_RTSD, sport->port.membase + USR1);
+       writel(USR2_ORE, sport->port.membase + USR2);
 
        temp = readl(sport->port.membase + UCR1);
        temp |= UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN;
@@ -1149,10 +1151,6 @@ static int imx_startup(struct uart_port *port)
 
        writel(temp, sport->port.membase + UCR1);
 
-       /* Clear any pending ORE flag before enabling interrupt */
-       temp = readl(sport->port.membase + USR2);
-       writel(temp | USR2_ORE, sport->port.membase + USR2);
-
        temp = readl(sport->port.membase + UCR4);
        temp |= UCR4_OREN;
        writel(temp, sport->port.membase + UCR4);