case ARMneon_VQRDMULH: return "vqrdmulh";
case ARMneon_VQDMULL: return "vqdmull";
case ARMneon_VTBL: return "vtbl";
- case ARMneon_SETELEM: return "vmov";
- case ARMneon_VABSFP: return "vabsfp";
- case ARMneon_VRSQRTEFP: return "vrsqrtefp";
- case ARMneon_VRSQRTE: return "vrsqrte";
+ case ARMneon_VRECPS: return "vrecps";
+ case ARMneon_VRSQRTS: return "vrecps";
/* ... */
default: vpanic("showARMNeonBinOp");
}
case ARMneon_VSUB:
case ARMneon_VEXT:
case ARMneon_VMUL:
- case ARMneon_SETELEM:
case ARMneon_VPADD:
case ARMneon_VTBL:
case ARMneon_VCEQ:
case ARMneon_VMULLU:
case ARMneon_VPMINU:
case ARMneon_VPMAXU:
- case ARMneon_VRSQRTE:
return ".u";
case ARMneon_VRHADDS:
case ARMneon_VMINS:
case ARMneon_VMULFP:
case ARMneon_VMINF:
case ARMneon_VMAXF:
- case ARMneon_VABSFP:
- case ARMneon_VRSQRTEFP:
case ARMneon_VPMINF:
case ARMneon_VPMAXF:
case ARMneon_VCGTF:
case ARMneon_VCGEF:
case ARMneon_VCEQF:
+ case ARMneon_VRECPS:
+ case ARMneon_VRSQRTS:
return ".f";
/* ... */
default: vpanic("showARMNeonBinOpDataType");
case ARMneon_VCVTF16toF32: return "vcvt";
case ARMneon_VRECIP: return "vrecip";
case ARMneon_VRECIPF: return "vrecipf";
- case ARMneon_VRECPS: return "vrecps";
case ARMneon_VNEGF: return "vneg";
- case ARMneon_VRSQRTS: return "vrecps";
case ARMneon_ABS: return "vabs";
+ case ARMneon_VABSFP: return "vabsfp";
+ case ARMneon_VRSQRTEFP: return "vrsqrtefp";
+ case ARMneon_VRSQRTE: return "vrsqrte";
/* ... */
default: vpanic("showARMNeonUnOp");
}
case ARMneon_COPYQNUU:
case ARMneon_VQSHLNUU:
case ARMneon_VRECIP:
+ case ARMneon_VRSQRTE:
return ".u";
case ARMneon_CLS:
case ARMneon_CLZ:
case ARMneon_ABS:
return ".s";
case ARMneon_VRECIPF:
- case ARMneon_VRECPS:
case ARMneon_VNEGF:
- case ARMneon_VRSQRTS:
+ case ARMneon_VABSFP:
+ case ARMneon_VRSQRTEFP:
return ".f";
case ARMneon_VCVTFtoU: return ".u32.f32";
case ARMneon_VCVTFtoS: return ".s32.f32";
UInt insn;
UInt opc, opc1, opc2;
switch (i->ARMin.NUnaryS.op) {
- case ARMneon_VDUP:
+ case ARMneon_VDUP:
if (i->ARMin.NUnaryS.size >= 16)
goto bad;
if (i->ARMin.NUnaryS.dst->tag != ARMNRS_Reg)
(i->ARMin.NUnaryS.size & 0xf), regD,
X1100, BITS4(0,Q,M,0), regM);
*p++ = insn;
- goto done;
+ goto done;
case ARMneon_SETELEM:
regD = Q ? (qregNo(i->ARMin.NUnaryS.dst->reg) << 1) :
dregNo(i->ARMin.NUnaryS.dst->reg);
insn = XXXXXXXX(0xF, X0011, BITS4(1,D,1,1), X1001, regD, X0111,
BITS4(1,Q,M,0), regM);
break;
+
default:
goto bad;
}