arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C

The Radxa E20C has two GbE ports, LAN and WAN. The LAN port is provided
using a GMAC controller and a YT8531C PHY and the WAN port is provided
by an RTL8111H PCIe Ethernet controller.

Enable support for the LAN port on Radxa E20C.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Tested-by: Yao Zi <ziyao@disroot.org>
Link: https://lore.kernel.org/r/20250509202402.260038-3-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
index d45b6594b2dec090e684386e1dac151ca13fa64d..506d54337ecedf2f9862450423cbaafc0da176df 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
@@ -17,6 +17,7 @@
        compatible = "radxa,e20c", "rockchip,rk3528";
 
        aliases {
+               ethernet0 = &gmac1;
                mmc0 = &sdhci;
                mmc1 = &sdmmc;
        };
@@ -184,6 +185,17 @@
        cpu-supply = <&vdd_arm>;
 };
 
+&gmac1 {
+       clock_in_out = "output";
+       phy-handle = <&rgmii_phy>;
+       phy-mode = "rgmii-id";
+       phy-supply = <&vcc_3v3>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&rgmii_miim>, <&rgmii_tx_bus2>, <&rgmii_rx_bus2>,
+                   <&rgmii_rgmii_clk>, <&rgmii_rgmii_bus>;
+       status = "okay";
+};
+
 &i2c1 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c1m0_xfer>;
@@ -198,7 +210,25 @@
        };
 };
 
+&mdio1 {
+       rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <0x1>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&gmac1_rstn_l>;
+               reset-assert-us = <20000>;
+               reset-deassert-us = <100000>;
+               reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+       };
+};
+
 &pinctrl {
+       ethernet {
+               gmac1_rstn_l: gmac1-rstn-l {
+                       rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+               };
+       };
+
        gpio-keys {
                user_key: user-key {
                        rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;