]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: r9a08g045: Add missing hypervisor virtual timer IRQ
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 20 Jun 2024 13:57:37 +0000 (15:57 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 1 Jul 2024 09:35:08 +0000 (11:35 +0200)
Add the missing fifth interrupt to the device node that represents the
ARM architected timer.  While at it, add an interrupt-names property for
clarity,

Fixes: e20396d65b959a65 ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/884c683fb6c1d1bf7d0d383a8df8f65a0a424dc7.1718890849.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r9a08g045.dtsi

index 2162c247d6deb170555a06284c5d8f23c83bcf5f..0d5c47a65e46c584f79a1ec3a3dac011413520a7 100644 (file)
                interrupts-extended = <&gic GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
                                      <&gic GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
                                      <&gic GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
-                                     <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
+                                     <&gic GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>,
+                                     <&gic GIC_PPI 12 IRQ_TYPE_LEVEL_LOW>;
+               interrupt-names = "sec-phys", "phys", "virt", "hyp-phys",
+                                 "hyp-virt";
        };
 };