Check optimize_insn_for_speed_p in *fixuns_trunc<mode>_1

Since fixuns_trunc<mode>si2 expander checks optimize_insn_for_size_p
before generating *fixuns_trunc<mode>_1,  we should use
optimize_insn_for_speed_p in *fixuns_trunc<mode>_1 for consistency.

	PR target/60827
	* config/i386/i386.md (*fixuns_trunc<mode>_1): Check
	optimize_insn_for_speed_p instead of
	optimize_function_for_speed_p.

From-SVN: r209383

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5a7832bc02ccfbedb18759d69ae858a3f5095957..e3a566014f6e12b438222eb9bfb5f821e413673c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2014-04-14  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR target/60827
+       * config/i386/i386.md (*fixuns_trunc<mode>_1): Check
+       optimize_insn_for_speed_p instead of
+       optimize_function_for_speed_p.
+
 2014-04-14  Yufeng Zhang  <yufeng.zhang@arm.com>
 
        * doc/invoke.texi (free): Document AArch64.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 25e2e93e31781ae8a3a63ef3317d288e7f7a0257..80ebe54a74482b72af51338652d49305009cd6fb 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -4367,7 +4367,7 @@
    (clobber (match_scratch:<ssevecmode> 1 "=x,&x"))
    (clobber (match_scratch:<ssevecmode> 2 "=x,x"))]
   "!TARGET_64BIT && TARGET_SSE2 && TARGET_SSE_MATH
-   && optimize_function_for_speed_p (cfun)"
+   && optimize_insn_for_speed_p ()"
   "#"
   "&& reload_completed"
   [(const_int 0)]